llvm.org GIT mirror llvm / e4f2739
Freeze the reserved registers as soon as isel is complete. Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 7 years ago
3 changed file(s) with 38 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
9494 /// started.
9595 BitVector ReservedRegs;
9696
97 /// AllocatableRegs - From TRI->getAllocatableSet.
98 mutable BitVector AllocatableRegs;
99
10097 /// LiveIns/LiveOuts - Keep track of the physical registers that are
10198 /// livein/liveout of the function. Live in values are typically arguments in
10299 /// registers, live out values are typically return values in registers.
426423 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
427424 }
428425
426 /// getReservedRegs - Returns a reference to the frozen set of reserved
427 /// registers. This method should always be preferred to calling
428 /// TRI::getReservedRegs() when possible.
429 const BitVector &getReservedRegs() const {
430 assert(reservedRegsFrozen() &&
431 "Reserved registers haven't been frozen yet. "
432 "Use TRI::getReservedRegs().");
433 return ReservedRegs;
434 }
435
436 /// isReserved - Returns true when PhysReg is a reserved register.
437 ///
438 /// Reserved registers may belong to an allocatable register class, but the
439 /// target has explicitly requested that they are not used.
440 ///
441 bool isReserved(unsigned PhysReg) const {
442 return getReservedRegs().test(PhysReg);
443 }
444
445 /// isAllocatable - Returns true when PhysReg belongs to an allocatable
446 /// register class and it hasn't been reserved.
447 ///
448 /// Allocatable registers may show up in the allocation order of some virtual
449 /// register, so a register allocator needs to track its liveness and
450 /// availability.
451 bool isAllocatable(unsigned PhysReg) const {
452 return TRI->isInAllocatableClass(PhysReg) && !isReserved(PhysReg);
453 }
429454
430455 //===--------------------------------------------------------------------===//
431456 // LiveIn/LiveOut Management
305305
306306 void MachineRegisterInfo::freezeReservedRegs(const MachineFunction &MF) {
307307 ReservedRegs = TRI->getReservedRegs(MF);
308 assert(ReservedRegs.size() == TRI->getNumRegs() &&
309 "Invalid ReservedRegs vector from target");
308310 }
309311
310312 bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg,
311313 const MachineFunction &MF) const {
312314 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg));
313315
314 // Check if any overlapping register is modified.
316 // Check if any overlapping register is modified, or allocatable so it may be
317 // used later.
315318 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI)
316 if (!def_empty(*AI))
317 return false;
318
319 // Check if any overlapping register is allocatable so it may be used later.
320 if (AllocatableRegs.empty())
321 AllocatableRegs = TRI->getAllocatableSet(MF);
322 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI)
323 if (AllocatableRegs.test(*AI))
319 if (!def_empty(*AI) || isAllocatable(*AI))
324320 return false;
325321 return true;
326322 }
472472 // Replace it.
473473 MRI.replaceRegWith(From, To);
474474 }
475
476 // Freeze the set of reserved registers now that MachineFrameInfo has been
477 // set up. All the information required by getReservedRegs() should be
478 // available now.
479 MRI.freezeReservedRegs(*MF);
475480
476481 // Release function-specific state. SDB and CurDAG are already cleared
477482 // at this point.