llvm.org GIT mirror llvm / e4e1c32
[globalisel][tablegen] Demote OptForSize/OptForMinSize/ForCodeSize to per-function predicates. Summary: This causes them to be re-computed more often than necessary but resolves objections that were raised post-commit on r301750. Reviewers: qcolombet, ab, t.p.northover, rovka, kristof.beyls Reviewed By: qcolombet Subscribers: igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D32861 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303418 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 3 years ago
9 changed file(s) with 29 addition(s) and 41 deletion(s). Raw diff Collapse all Expand all
314314 // AArch64 Instruction Predicate Definitions.
315315 def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
316316 def IsNotDarwin: Predicate<"!Subtarget->isTargetDarwin()">;
317 def ForCodeSize : Predicate<"Subtarget->getForCodeSize()">;
318 def NotForCodeSize : Predicate<"!Subtarget->getForCodeSize()">;
317
318 // We could compute these on a per-module basis but doing so requires accessing
319 // the Function object through the Subtarget and objections were raised
320 // to that (see post-commit review comments for r301750).
321 let RecomputePerFunction = 1 in {
322 def ForCodeSize : Predicate<"MF->getFunction()->optForSize()">;
323 def NotForCodeSize : Predicate<"!MF->getFunction()->optForSize()">;
324 }
319325
320326 include "AArch64InstrFormats.td"
321327
163163
164164 AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU,
165165 const std::string &FS,
166 const TargetMachine &TM, bool LittleEndian,
167 bool ForCodeSize)
166 const TargetMachine &TM, bool LittleEndian)
168167 : AArch64GenSubtargetInfo(TT, CPU, FS), ReserveX18(TT.isOSDarwin()),
169168 IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(),
170169 InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
171 TLInfo(TM, *this), GISel(), ForCodeSize(ForCodeSize) {
170 TLInfo(TM, *this), GISel() {
172171 #ifndef LLVM_BUILD_GLOBAL_ISEL
173172 GISelAccessor *AArch64GISel = new GISelAccessor();
174173 #else
127127 /// an optional library.
128128 std::unique_ptr GISel;
129129
130 bool ForCodeSize;
131
132130 private:
133131 /// initializeSubtargetDependencies - Initializes using CPUString and the
134132 /// passed in feature string so that we can use initializer lists for
144142 /// of the specified triple.
145143 AArch64Subtarget(const Triple &TT, const std::string &CPU,
146144 const std::string &FS, const TargetMachine &TM,
147 bool LittleEndian, bool ForCodeSize);
145 bool LittleEndian);
148146
149147 /// This object will take onwership of \p GISelAccessor.
150148 void setGISelAccessor(GISelAccessor &GISel) {
273271 }
274272 }
275273
276 bool getForCodeSize() const { return ForCodeSize; }
277
278274 /// ParseSubtargetFeatures - Parses features string setting specified
279275 /// subtarget options. Definition of function is auto generated by tblgen.
280276 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
213213 AArch64TargetMachine::getSubtargetImpl(const Function &F) const {
214214 Attribute CPUAttr = F.getFnAttribute("target-cpu");
215215 Attribute FSAttr = F.getFnAttribute("target-features");
216 bool ForCodeSize = F.optForSize();
217216
218217 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
219218 ? CPUAttr.getValueAsString().str()
221220 std::string FS = !FSAttr.hasAttribute(Attribute::None)
222221 ? FSAttr.getValueAsString().str()
223222 : TargetFS;
224 std::string ForCodeSizeStr =
225 std::string(ForCodeSize ? "+" : "-") + "forcodesize";
226
227 auto &I = SubtargetMap[CPU + FS + ForCodeSizeStr];
223
224 auto &I = SubtargetMap[CPU + FS];
228225 if (!I) {
229226 // This needs to be done before we create a new subtarget since any
230227 // creation will depend on the TM and the code generation flags on the
231228 // function that reside in TargetOptions.
232229 resetTargetOptions(F);
233230 I = llvm::make_unique(TargetTriple, CPU, FS, *this,
234 isLittle, ForCodeSize);
231 isLittle);
235232 }
236233 return I.get();
237234 }
895895 def NearData : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
896896 "TM.getCodeModel() == CodeModel::Kernel">;
897897 def IsNotPIC : Predicate<"!TM.isPositionIndependent()">;
898 def OptForSize : Predicate<"Subtarget->getOptForSize()">;
899 def OptForMinSize : Predicate<"Subtarget->getOptForMinSize()">;
900 def OptForSpeed : Predicate<"!Subtarget->getOptForSize()">;
898
899 // We could compute these on a per-module basis but doing so requires accessing
900 // the Function object through the Subtarget and objections were raised
901 // to that (see post-commit review comments for r301750).
902 let RecomputePerFunction = 1 in {
903 def OptForSize : Predicate<"MF->getFunction()->optForSize()">;
904 def OptForMinSize : Predicate<"MF->getFunction()->optForMinSize()">;
905 def OptForSpeed : Predicate<"!MF->getFunction()->optForSize()">;
906 }
907
901908 def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">;
902909 def CallImmAddr : Predicate<"Subtarget->isLegalToCallImmediateAddr()">;
903910 def FavorMemIndirectCall : Predicate<"!Subtarget->callRegIndirect()">;
336336
337337 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
338338 const X86TargetMachine &TM,
339 unsigned StackAlignOverride, bool OptForSize,
340 bool OptForMinSize)
339 unsigned StackAlignOverride)
341340 : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
342341 PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
343342 StackAlignOverride(StackAlignOverride),
347346 In16BitMode(TargetTriple.getArch() == Triple::x86 &&
348347 TargetTriple.getEnvironment() == Triple::CODE16),
349348 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
350 FrameLowering(*this, getStackAlignment()), OptForSize(OptForSize),
351 OptForMinSize(OptForMinSize) {
349 FrameLowering(*this, getStackAlignment()) {
352350 // Determine the PICStyle based on the target selected.
353351 if (!isPositionIndependent())
354352 setPICStyle(PICStyles::None);
335335 X86TargetLowering TLInfo;
336336 X86FrameLowering FrameLowering;
337337
338 bool OptForSize;
339 bool OptForMinSize;
340
341338 public:
342339 /// This constructor initializes the data members to match that
343340 /// of the specified triple.
344341 ///
345342 X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
346 const X86TargetMachine &TM, unsigned StackAlignOverride,
347 bool OptForSize, bool OptForMinSize);
343 const X86TargetMachine &TM, unsigned StackAlignOverride);
348344
349345 /// This object will take onwership of \p GISelAccessor.
350346 void setGISelAccessor(GISelAccessor &GISel) { this->GISel.reset(&GISel); }
512508 bool isSLM() const { return X86ProcFamily == IntelSLM; }
513509 bool useSoftFloat() const { return UseSoftFloat; }
514510
515 bool getOptForSize() const { return OptForSize; }
516 bool getOptForMinSize() const { return OptForMinSize; }
517
518511 /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
519512 /// no-sse2). There isn't any reason to disable it if the target processor
520513 /// supports it.
269269
270270 FS = Key.substr(CPU.size());
271271
272 bool OptForSize = F.optForSize();
273 bool OptForMinSize = F.optForMinSize();
274
275 Key += std::string(OptForSize ? "+" : "-") + "optforsize";
276 Key += std::string(OptForMinSize ? "+" : "-") + "optforminsize";
277
278272 auto &I = SubtargetMap[Key];
279273 if (!I) {
280274 // This needs to be done before we create a new subtarget since any
282276 // function that reside in TargetOptions.
283277 resetTargetOptions(F);
284278 I = llvm::make_unique(TargetTriple, CPU, FS, *this,
285 Options.StackAlignmentOverride,
286 OptForSize, OptForMinSize);
279 Options.StackAlignmentOverride);
287280 #ifndef LLVM_BUILD_GLOBAL_ISEL
288281 GISelAccessor *GISel = new GISelAccessor();
289282 #else
2929
3030 std::unique_ptr createInstrInfo(TargetMachine *TM) {
3131 AArch64Subtarget ST(TM->getTargetTriple(), TM->getTargetCPU(),
32 TM->getTargetFeatureString(), *TM, /* isLittle */ false,
33 /* ForCodeSize */ false);
32 TM->getTargetFeatureString(), *TM, /* isLittle */ false);
3433 return llvm::make_unique(ST);
3534 }
3635