llvm.org GIT mirror llvm / e45ab8a
For aligned load/store instructions, it's only required to know whether a function can support dynamic stack realignment. That's a much easier question to answer at instruction selection stage than whether the function actually will have dynamic alignment prologue. This allows the removal of the stack alignment heuristic pass, and improves code quality for cases where the heuristic would result in dynamic alignment code being generated when it was not strictly necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93885 91177308-0d34-0410-b5e6-96231b3b80d8 Jim Grosbach 10 years ago
10 changed file(s) with 21 addition(s) and 87 deletion(s). Raw diff Collapse all Expand all
194194 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
195195 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
196196
197 /// createMaxStackAlignmentCalculatorPass() - Determine the maximum required
198 /// alignment for a function.
199 FunctionPass* createMaxStackAlignmentCalculatorPass();
200
201197 } // End llvm namespace
202198
203199 #endif
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lib/CodeGen/MaxStackAlignment.cpp less more
None //===-- MaxStackAlignment.cpp - Compute the required stack alignment -- ---===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass looks for vector register usage and aligned local objects to
10 // calculate the maximum required alignment for a function. This is used by
11 // targets which support it to determine if dynamic stack realignment is
12 // necessary.
13 //
14 //===----------------------------------------------------------------------===//
15
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/Passes.h"
20
21 using namespace llvm;
22
23 namespace {
24 struct MaximalStackAlignmentCalculator : public MachineFunctionPass {
25 static char ID;
26 MaximalStackAlignmentCalculator() : MachineFunctionPass(&ID) {}
27
28 virtual bool runOnMachineFunction(MachineFunction &MF) {
29 MachineFrameInfo *FFI = MF.getFrameInfo();
30 MachineRegisterInfo &RI = MF.getRegInfo();
31
32 // Calculate max stack alignment of all already allocated stack objects.
33 FFI->calculateMaxStackAlignment();
34 unsigned MaxAlign = FFI->getMaxAlignment();
35
36 // Be over-conservative: scan over all vreg defs and find whether vector
37 // registers are used. If yes, there is probability that vector registers
38 // will be spilled and thus the stack needs to be aligned properly.
39 // FIXME: It would be better to only do this if a spill actually
40 // happens rather than conseratively aligning the stack regardless.
41 for (unsigned RegNum = TargetRegisterInfo::FirstVirtualRegister;
42 RegNum < RI.getLastVirtReg(); ++RegNum)
43 MaxAlign = std::max(MaxAlign, RI.getRegClass(RegNum)->getAlignment());
44
45 if (FFI->getMaxAlignment() == MaxAlign)
46 return false;
47
48 FFI->setMaxAlignment(MaxAlign);
49 return true;
50 }
51
52 virtual const char *getPassName() const {
53 return "Stack Alignment Requirements Auto-Detector";
54 }
55
56 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
57 AU.setPreservesCFG();
58 MachineFunctionPass::getAnalysisUsage(AU);
59 }
60 };
61
62 char MaximalStackAlignmentCalculator::ID = 0;
63 }
64
65 FunctionPass*
66 llvm::createMaxStackAlignmentCalculatorPass() {
67 return new MaximalStackAlignmentCalculator();
68 }
69
714714 RC == ARM::QPR_VFP2RegisterClass) && "Unknown regclass!");
715715 // FIXME: Neon instructions should support predicates
716716 if (Align >= 16
717 && (getRegisterInfo().needsStackRealignment(MF))) {
717 && (getRegisterInfo().canRealignStack(MF))) {
718718 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1q64))
719719 .addFrameIndex(FI).addImm(0).addImm(0).addImm(128)
720720 .addMemOperand(MMO)
759759 RC == ARM::QPR_VFP2RegisterClass ||
760760 RC == ARM::QPR_8RegisterClass) && "Unknown regclass!");
761761 if (Align >= 16
762 && (getRegisterInfo().needsStackRealignment(MF))) {
762 && (getRegisterInfo().canRealignStack(MF))) {
763763 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q64), DestReg)
764764 .addFrameIndex(FI).addImm(0).addImm(0).addImm(128)
765765 .addMemOperand(MMO));
481481 needsStackRealignment(MF) ||
482482 MFI->hasVarSizedObjects() ||
483483 MFI->isFrameAddressTaken());
484 }
485
486 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
487 const MachineFrameInfo *MFI = MF.getFrameInfo();
488 const ARMFunctionInfo *AFI = MF.getInfo();
489 return (RealignStack &&
490 !AFI->isThumb1OnlyFunction() &&
491 !MFI->hasVarSizedObjects());
484492 }
485493
486494 bool ARMBaseRegisterInfo::
9595
9696 bool hasFP(const MachineFunction &MF) const;
9797
98 bool canRealignStack(const MachineFunction &MF) const;
9899 bool needsStackRealignment(const MachineFunction &MF) const;
99100
100101 bool cannotEliminateFrame(const MachineFunction &MF) const;
9191 CodeGenOpt::Level OptLevel) {
9292 if (Subtarget.hasNEON())
9393 PM.add(createNEONPreAllocPass());
94
95 // Calculate and set max stack object alignment early, so we can decide
96 // whether we will need stack realignment (and thus FP).
97 PM.add(createMaxStackAlignmentCalculatorPass());
9894
9995 // FIXME: temporarily disabling load / store optimization pass for Thumb1.
10096 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
20762076 unsigned SrcReg, bool isKill, int FrameIdx,
20772077 const TargetRegisterClass *RC) const {
20782078 const MachineFunction &MF = *MBB.getParent();
2079 bool isAligned = (RI.getStackAlignment() >= 16) ||
2080 RI.needsStackRealignment(MF);
2079 bool isAligned = (RI.getStackAlignment() >= 16) || RI.canRealignStack(MF);
20812080 unsigned Opc = getStoreRegOpcode(SrcReg, RC, isAligned, TM);
20822081 DebugLoc DL = DebugLoc::getUnknownLoc();
20832082 if (MI != MBB.end()) DL = MI->getDebugLoc();
21712170 unsigned DestReg, int FrameIdx,
21722171 const TargetRegisterClass *RC) const{
21732172 const MachineFunction &MF = *MBB.getParent();
2174 bool isAligned = (RI.getStackAlignment() >= 16) ||
2175 RI.needsStackRealignment(MF);
2173 bool isAligned = (RI.getStackAlignment() >= 16) || RI.canRealignStack(MF);
21762174 unsigned Opc = getLoadRegOpcode(DestReg, RC, isAligned, TM);
21772175 DebugLoc DL = DebugLoc::getUnknownLoc();
21782176 if (MI != MBB.end()) DL = MI->getDebugLoc();
435435 MFI->isFrameAddressTaken() ||
436436 MF.getInfo()->getForceFramePointer() ||
437437 (MMI && MMI->callsUnwindInit()));
438 }
439
440 bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {
441 const MachineFrameInfo *MFI = MF.getFrameInfo();
442 return (RealignStack &&
443 !MFI->hasVarSizedObjects());
438444 }
439445
440446 bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
127127
128128 bool hasFP(const MachineFunction &MF) const;
129129
130 bool canRealignStack(const MachineFunction &MF) const;
131
130132 bool needsStackRealignment(const MachineFunction &MF) const;
131133
132134 bool hasReservedCallFrame(MachineFunction &MF) const;
156156
157157 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
158158 CodeGenOpt::Level OptLevel) {
159 // Calculate and set max stack object alignment early, so we can decide
160 // whether we will need stack realignment (and thus FP).
161 PM.add(createMaxStackAlignmentCalculatorPass());
162159 return false; // -print-machineinstr shouldn't print after this.
163160 }
164161