llvm.org GIT mirror llvm / e428ba7
WebAssembly: handle more than int32 argument/return Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11699 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243822 91177308-0d34-0410-b5e6-96231b3b80d8 JF Bastien 5 years ago
9 changed file(s) with 371 addition(s) and 176 deletion(s). Raw diff Collapse all Expand all
9191
9292 bool PrintOperands = true;
9393 switch (MI->getOpcode()) {
94 case WebAssembly::ARGUMENT:
94 case WebAssembly::ARGUMENT_Int32:
95 case WebAssembly::ARGUMENT_Int64:
96 case WebAssembly::ARGUMENT_Float32:
97 case WebAssembly::ARGUMENT_Float64:
9598 OS << "argument " << MI->getOperand(1).getImm();
9699 PrintOperands = false;
100 break;
101 case WebAssembly::RETURN_Int32:
102 case WebAssembly::RETURN_Int64:
103 case WebAssembly::RETURN_Float32:
104 case WebAssembly::RETURN_Float64:
105 case WebAssembly::RETURN_VOID:
106 // FIXME This is here only so "return" prints nicely, instead of printing
107 // the isel name. Other operations have the same problem, fix this in
108 // a generic way instead.
109 OS << "return";
97110 break;
98111 default:
99112 OS << TII->getName(MI->getOpcode());
187187 fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
188188 if (In.Flags.isSplit())
189189 fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
190 if (In.VT != MVT::i32)
191 fail(DL, DAG, "WebAssembly hasn't implemented non-i32 arguments");
192190 // FIXME Do something with In.getOrigAlign()?
193191 InVals.push_back(
194192 In.Used
2424 * switch: switch statement with fallthrough
2525 */
2626
27 multiclass RETURN {
28 def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)]>;
29 }
2730 let hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
2831 isBarrier = 1 in {
29 //FIXME return more than just int32.
30 def RETURN : I<(outs), (ins Int32:$val), [(WebAssemblyreturn Int32:$val)]>;
31 def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
32 defm : RETURN>;
33 defm : RETURN;
34 defm : RETURN;
35 defm : RETURN;
36 def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
3237 } // hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
3338 // isBarrier = 1
5454
5555 include "WebAssemblyInstrFormats.td"
5656
57 def ARGUMENT : I<(outs Int32:$res), (ins i32imm:$argno),
58 [(set Int32:$res, (WebAssemblyargument timm:$argno))]>;
57 multiclass ARGUMENT {
58 def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
59 [(set vt:$res, (WebAssemblyargument timm:$argno))]>;
60 }
61 defm : ARGUMENT;
62 defm : ARGUMENT;
63 defm : ARGUMENT;
64 defm : ARGUMENT;
5965
6066 //===----------------------------------------------------------------------===//
6167 // Additional sets of instructions.
+0
-165
test/CodeGen/WebAssembly/integer.ll less more
None ; RUN: llc < %s -asm-verbose=false | FileCheck %s
1
2 target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
3 target triple = "wasm32-unknown-unknown"
4
5 declare i32 @llvm.ctlz.i32(i32, i1)
6 declare i32 @llvm.cttz.i32(i32, i1)
7 declare i32 @llvm.ctpop.i32(i32)
8
9 ; CHECK-LABEL: add32:
10 ; CHECK-NEXT: (setlocal @0 (argument 1))
11 ; CHECK-NEXT: (setlocal @1 (argument 0))
12 ; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
13 ; CHECK-NEXT: (RETURN @2)
14 define i32 @add32(i32 %x, i32 %y) {
15 %a = add i32 %x, %y
16 ret i32 %a
17 }
18
19 ; CHECK-LABEL: sub32:
20 ; CHECK-NEXT: (setlocal @0 (argument 1))
21 ; CHECK-NEXT: (setlocal @1 (argument 0))
22 ; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
23 ; CHECK-NEXT: (RETURN @2)
24 define i32 @sub32(i32 %x, i32 %y) {
25 %a = sub i32 %x, %y
26 ret i32 %a
27 }
28
29 ; CHECK-LABEL: mul32:
30 ; CHECK-NEXT: (setlocal @0 (argument 1))
31 ; CHECK-NEXT: (setlocal @1 (argument 0))
32 ; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
33 ; CHECK-NEXT: (RETURN @2)
34 define i32 @mul32(i32 %x, i32 %y) {
35 %a = mul i32 %x, %y
36 ret i32 %a
37 }
38
39 ; CHECK-LABEL: sdiv32:
40 ; CHECK-NEXT: (setlocal @0 (argument 1))
41 ; CHECK-NEXT: (setlocal @1 (argument 0))
42 ; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
43 ; CHECK-NEXT: (RETURN @2)
44 define i32 @sdiv32(i32 %x, i32 %y) {
45 %a = sdiv i32 %x, %y
46 ret i32 %a
47 }
48
49 ; CHECK-LABEL: udiv32:
50 ; CHECK-NEXT: (setlocal @0 (argument 1))
51 ; CHECK-NEXT: (setlocal @1 (argument 0))
52 ; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
53 ; CHECK-NEXT: (RETURN @2)
54 define i32 @udiv32(i32 %x, i32 %y) {
55 %a = udiv i32 %x, %y
56 ret i32 %a
57 }
58
59 ; CHECK-LABEL: srem32:
60 ; CHECK-NEXT: (setlocal @0 (argument 1))
61 ; CHECK-NEXT: (setlocal @1 (argument 0))
62 ; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
63 ; CHECK-NEXT: (RETURN @2)
64 define i32 @srem32(i32 %x, i32 %y) {
65 %a = srem i32 %x, %y
66 ret i32 %a
67 }
68
69 ; CHECK-LABEL: urem32:
70 ; CHECK-NEXT: (setlocal @0 (argument 1))
71 ; CHECK-NEXT: (setlocal @1 (argument 0))
72 ; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
73 ; CHECK-NEXT: (RETURN @2)
74 define i32 @urem32(i32 %x, i32 %y) {
75 %a = urem i32 %x, %y
76 ret i32 %a
77 }
78
79 ; CHECK-LABEL: and32:
80 ; CHECK-NEXT: (setlocal @0 (argument 1))
81 ; CHECK-NEXT: (setlocal @1 (argument 0))
82 ; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
83 ; CHECK-NEXT: (RETURN @2)
84 define i32 @and32(i32 %x, i32 %y) {
85 %a = and i32 %x, %y
86 ret i32 %a
87 }
88
89 ; CHECK-LABEL: ior32:
90 ; CHECK-NEXT: (setlocal @0 (argument 1))
91 ; CHECK-NEXT: (setlocal @1 (argument 0))
92 ; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
93 ; CHECK-NEXT: (RETURN @2)
94 define i32 @ior32(i32 %x, i32 %y) {
95 %a = or i32 %x, %y
96 ret i32 %a
97 }
98
99 ; CHECK-LABEL: xor32:
100 ; CHECK-NEXT: (setlocal @0 (argument 1))
101 ; CHECK-NEXT: (setlocal @1 (argument 0))
102 ; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
103 ; CHECK-NEXT: (RETURN @2)
104 define i32 @xor32(i32 %x, i32 %y) {
105 %a = xor i32 %x, %y
106 ret i32 %a
107 }
108
109 ; CHECK-LABEL: shl32:
110 ; CHECK-NEXT: (setlocal @0 (argument 1))
111 ; CHECK-NEXT: (setlocal @1 (argument 0))
112 ; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
113 ; CHECK-NEXT: (RETURN @2)
114 define i32 @shl32(i32 %x, i32 %y) {
115 %a = shl i32 %x, %y
116 ret i32 %a
117 }
118
119 ; CHECK-LABEL: shr32:
120 ; CHECK-NEXT: (setlocal @0 (argument 1))
121 ; CHECK-NEXT: (setlocal @1 (argument 0))
122 ; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
123 ; CHECK-NEXT: (RETURN @2)
124 define i32 @shr32(i32 %x, i32 %y) {
125 %a = lshr i32 %x, %y
126 ret i32 %a
127 }
128
129 ; CHECK-LABEL: sar32:
130 ; CHECK-NEXT: (setlocal @0 (argument 1))
131 ; CHECK-NEXT: (setlocal @1 (argument 0))
132 ; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
133 ; CHECK-NEXT: (RETURN @2)
134 define i32 @sar32(i32 %x, i32 %y) {
135 %a = ashr i32 %x, %y
136 ret i32 %a
137 }
138
139 ; CHECK-LABEL: clz32:
140 ; CHECK-NEXT: (setlocal @0 (argument 0))
141 ; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
142 ; CHECK-NEXT: (RETURN @1)
143 define i32 @clz32(i32 %x) {
144 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
145 ret i32 %a
146 }
147
148 ; CHECK-LABEL: ctz32:
149 ; CHECK-NEXT: (setlocal @0 (argument 0))
150 ; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
151 ; CHECK-NEXT: (RETURN @1)
152 define i32 @ctz32(i32 %x) {
153 %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
154 ret i32 %a
155 }
156
157 ; CHECK-LABEL: popcnt32:
158 ; CHECK-NEXT: (setlocal @0 (argument 0))
159 ; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
160 ; CHECK-NEXT: (RETURN @1)
161 define i32 @popcnt32(i32 %x) {
162 %a = call i32 @llvm.ctpop.i32(i32 %x)
163 ret i32 %a
164 }
0 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
1
2 ; Test that basic 32-bit integer operations assemble as expected.
3
4 target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
5 target triple = "wasm32-unknown-unknown"
6
7 declare i32 @llvm.ctlz.i32(i32, i1)
8 declare i32 @llvm.cttz.i32(i32, i1)
9 declare i32 @llvm.ctpop.i32(i32)
10
11 ; CHECK-LABEL: add32:
12 ; CHECK-NEXT: (setlocal @0 (argument 1))
13 ; CHECK-NEXT: (setlocal @1 (argument 0))
14 ; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
15 ; CHECK-NEXT: (return @2)
16 define i32 @add32(i32 %x, i32 %y) {
17 %a = add i32 %x, %y
18 ret i32 %a
19 }
20
21 ; CHECK-LABEL: sub32:
22 ; CHECK-NEXT: (setlocal @0 (argument 1))
23 ; CHECK-NEXT: (setlocal @1 (argument 0))
24 ; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
25 ; CHECK-NEXT: (return @2)
26 define i32 @sub32(i32 %x, i32 %y) {
27 %a = sub i32 %x, %y
28 ret i32 %a
29 }
30
31 ; CHECK-LABEL: mul32:
32 ; CHECK-NEXT: (setlocal @0 (argument 1))
33 ; CHECK-NEXT: (setlocal @1 (argument 0))
34 ; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
35 ; CHECK-NEXT: (return @2)
36 define i32 @mul32(i32 %x, i32 %y) {
37 %a = mul i32 %x, %y
38 ret i32 %a
39 }
40
41 ; CHECK-LABEL: sdiv32:
42 ; CHECK-NEXT: (setlocal @0 (argument 1))
43 ; CHECK-NEXT: (setlocal @1 (argument 0))
44 ; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
45 ; CHECK-NEXT: (return @2)
46 define i32 @sdiv32(i32 %x, i32 %y) {
47 %a = sdiv i32 %x, %y
48 ret i32 %a
49 }
50
51 ; CHECK-LABEL: udiv32:
52 ; CHECK-NEXT: (setlocal @0 (argument 1))
53 ; CHECK-NEXT: (setlocal @1 (argument 0))
54 ; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
55 ; CHECK-NEXT: (return @2)
56 define i32 @udiv32(i32 %x, i32 %y) {
57 %a = udiv i32 %x, %y
58 ret i32 %a
59 }
60
61 ; CHECK-LABEL: srem32:
62 ; CHECK-NEXT: (setlocal @0 (argument 1))
63 ; CHECK-NEXT: (setlocal @1 (argument 0))
64 ; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
65 ; CHECK-NEXT: (return @2)
66 define i32 @srem32(i32 %x, i32 %y) {
67 %a = srem i32 %x, %y
68 ret i32 %a
69 }
70
71 ; CHECK-LABEL: urem32:
72 ; CHECK-NEXT: (setlocal @0 (argument 1))
73 ; CHECK-NEXT: (setlocal @1 (argument 0))
74 ; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
75 ; CHECK-NEXT: (return @2)
76 define i32 @urem32(i32 %x, i32 %y) {
77 %a = urem i32 %x, %y
78 ret i32 %a
79 }
80
81 ; CHECK-LABEL: and32:
82 ; CHECK-NEXT: (setlocal @0 (argument 1))
83 ; CHECK-NEXT: (setlocal @1 (argument 0))
84 ; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
85 ; CHECK-NEXT: (return @2)
86 define i32 @and32(i32 %x, i32 %y) {
87 %a = and i32 %x, %y
88 ret i32 %a
89 }
90
91 ; CHECK-LABEL: ior32:
92 ; CHECK-NEXT: (setlocal @0 (argument 1))
93 ; CHECK-NEXT: (setlocal @1 (argument 0))
94 ; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
95 ; CHECK-NEXT: (return @2)
96 define i32 @ior32(i32 %x, i32 %y) {
97 %a = or i32 %x, %y
98 ret i32 %a
99 }
100
101 ; CHECK-LABEL: xor32:
102 ; CHECK-NEXT: (setlocal @0 (argument 1))
103 ; CHECK-NEXT: (setlocal @1 (argument 0))
104 ; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
105 ; CHECK-NEXT: (return @2)
106 define i32 @xor32(i32 %x, i32 %y) {
107 %a = xor i32 %x, %y
108 ret i32 %a
109 }
110
111 ; CHECK-LABEL: shl32:
112 ; CHECK-NEXT: (setlocal @0 (argument 1))
113 ; CHECK-NEXT: (setlocal @1 (argument 0))
114 ; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
115 ; CHECK-NEXT: (return @2)
116 define i32 @shl32(i32 %x, i32 %y) {
117 %a = shl i32 %x, %y
118 ret i32 %a
119 }
120
121 ; CHECK-LABEL: shr32:
122 ; CHECK-NEXT: (setlocal @0 (argument 1))
123 ; CHECK-NEXT: (setlocal @1 (argument 0))
124 ; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
125 ; CHECK-NEXT: (return @2)
126 define i32 @shr32(i32 %x, i32 %y) {
127 %a = lshr i32 %x, %y
128 ret i32 %a
129 }
130
131 ; CHECK-LABEL: sar32:
132 ; CHECK-NEXT: (setlocal @0 (argument 1))
133 ; CHECK-NEXT: (setlocal @1 (argument 0))
134 ; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
135 ; CHECK-NEXT: (return @2)
136 define i32 @sar32(i32 %x, i32 %y) {
137 %a = ashr i32 %x, %y
138 ret i32 %a
139 }
140
141 ; CHECK-LABEL: clz32:
142 ; CHECK-NEXT: (setlocal @0 (argument 0))
143 ; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
144 ; CHECK-NEXT: (return @1)
145 define i32 @clz32(i32 %x) {
146 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
147 ret i32 %a
148 }
149
150 ; CHECK-LABEL: ctz32:
151 ; CHECK-NEXT: (setlocal @0 (argument 0))
152 ; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
153 ; CHECK-NEXT: (return @1)
154 define i32 @ctz32(i32 %x) {
155 %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
156 ret i32 %a
157 }
158
159 ; CHECK-LABEL: popcnt32:
160 ; CHECK-NEXT: (setlocal @0 (argument 0))
161 ; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
162 ; CHECK-NEXT: (return @1)
163 define i32 @popcnt32(i32 %x) {
164 %a = call i32 @llvm.ctpop.i32(i32 %x)
165 ret i32 %a
166 }
0 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
1
2 ; Test that basic 64-bit integer operations assemble as expected.
3
4 target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
5 target triple = "wasm32-unknown-unknown"
6
7 declare i64 @llvm.ctlz.i64(i64, i1)
8 declare i64 @llvm.cttz.i64(i64, i1)
9 declare i64 @llvm.ctpop.i64(i64)
10
11 ; CHECK-LABEL: add64:
12 ; CHECK-NEXT: (setlocal @0 (argument 1))
13 ; CHECK-NEXT: (setlocal @1 (argument 0))
14 ; CHECK-NEXT: (setlocal @2 (ADD_I64 @1 @0))
15 ; CHECK-NEXT: (return @2)
16 define i64 @add64(i64 %x, i64 %y) {
17 %a = add i64 %x, %y
18 ret i64 %a
19 }
20
21 ; CHECK-LABEL: sub64:
22 ; CHECK-NEXT: (setlocal @0 (argument 1))
23 ; CHECK-NEXT: (setlocal @1 (argument 0))
24 ; CHECK-NEXT: (setlocal @2 (SUB_I64 @1 @0))
25 ; CHECK-NEXT: (return @2)
26 define i64 @sub64(i64 %x, i64 %y) {
27 %a = sub i64 %x, %y
28 ret i64 %a
29 }
30
31 ; CHECK-LABEL: mul64:
32 ; CHECK-NEXT: (setlocal @0 (argument 1))
33 ; CHECK-NEXT: (setlocal @1 (argument 0))
34 ; CHECK-NEXT: (setlocal @2 (MUL_I64 @1 @0))
35 ; CHECK-NEXT: (return @2)
36 define i64 @mul64(i64 %x, i64 %y) {
37 %a = mul i64 %x, %y
38 ret i64 %a
39 }
40
41 ; CHECK-LABEL: sdiv64:
42 ; CHECK-NEXT: (setlocal @0 (argument 1))
43 ; CHECK-NEXT: (setlocal @1 (argument 0))
44 ; CHECK-NEXT: (setlocal @2 (SDIV_I64 @1 @0))
45 ; CHECK-NEXT: (return @2)
46 define i64 @sdiv64(i64 %x, i64 %y) {
47 %a = sdiv i64 %x, %y
48 ret i64 %a
49 }
50
51 ; CHECK-LABEL: udiv64:
52 ; CHECK-NEXT: (setlocal @0 (argument 1))
53 ; CHECK-NEXT: (setlocal @1 (argument 0))
54 ; CHECK-NEXT: (setlocal @2 (UDIV_I64 @1 @0))
55 ; CHECK-NEXT: (return @2)
56 define i64 @udiv64(i64 %x, i64 %y) {
57 %a = udiv i64 %x, %y
58 ret i64 %a
59 }
60
61 ; CHECK-LABEL: srem64:
62 ; CHECK-NEXT: (setlocal @0 (argument 1))
63 ; CHECK-NEXT: (setlocal @1 (argument 0))
64 ; CHECK-NEXT: (setlocal @2 (SREM_I64 @1 @0))
65 ; CHECK-NEXT: (return @2)
66 define i64 @srem64(i64 %x, i64 %y) {
67 %a = srem i64 %x, %y
68 ret i64 %a
69 }
70
71 ; CHECK-LABEL: urem64:
72 ; CHECK-NEXT: (setlocal @0 (argument 1))
73 ; CHECK-NEXT: (setlocal @1 (argument 0))
74 ; CHECK-NEXT: (setlocal @2 (UREM_I64 @1 @0))
75 ; CHECK-NEXT: (return @2)
76 define i64 @urem64(i64 %x, i64 %y) {
77 %a = urem i64 %x, %y
78 ret i64 %a
79 }
80
81 ; CHECK-LABEL: and64:
82 ; CHECK-NEXT: (setlocal @0 (argument 1))
83 ; CHECK-NEXT: (setlocal @1 (argument 0))
84 ; CHECK-NEXT: (setlocal @2 (AND_I64 @1 @0))
85 ; CHECK-NEXT: (return @2)
86 define i64 @and64(i64 %x, i64 %y) {
87 %a = and i64 %x, %y
88 ret i64 %a
89 }
90
91 ; CHECK-LABEL: ior64:
92 ; CHECK-NEXT: (setlocal @0 (argument 1))
93 ; CHECK-NEXT: (setlocal @1 (argument 0))
94 ; CHECK-NEXT: (setlocal @2 (IOR_I64 @1 @0))
95 ; CHECK-NEXT: (return @2)
96 define i64 @ior64(i64 %x, i64 %y) {
97 %a = or i64 %x, %y
98 ret i64 %a
99 }
100
101 ; CHECK-LABEL: xor64:
102 ; CHECK-NEXT: (setlocal @0 (argument 1))
103 ; CHECK-NEXT: (setlocal @1 (argument 0))
104 ; CHECK-NEXT: (setlocal @2 (XOR_I64 @1 @0))
105 ; CHECK-NEXT: (return @2)
106 define i64 @xor64(i64 %x, i64 %y) {
107 %a = xor i64 %x, %y
108 ret i64 %a
109 }
110
111 ; FIXME: 64-bit shifts have an extra truncate of the input shift value, which
112 ; WebAssembly hasn't taught isel to match yet. Fix with
113 ; getScalarShiftAmountTy.
114
115 ; C;HECK-LABEL: shl64:
116 ; C;HECK-NEXT: (setlocal @0 (argument 1))
117 ; C;HECK-NEXT: (setlocal @1 (argument 0))
118 ; C;HECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
119 ; C;HECK-NEXT: (return @2)
120 ;define i64 @shl64(i64 %x, i64 %y) {
121 ; %a = shl i64 %x, %y
122 ; ret i64 %a
123 ;}
124
125 ; C;HECK-LABEL: shr64:
126 ; C;HECK-NEXT: (setlocal @0 (argument 1))
127 ; C;HECK-NEXT: (setlocal @1 (argument 0))
128 ; C;HECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
129 ; C;HECK-NEXT: (return @2)
130 ;define i64 @shr64(i64 %x, i64 %y) {
131 ; %a = lshr i64 %x, %y
132 ; ret i64 %a
133 ;}
134
135 ; C;HECK-LABEL: sar64:
136 ; C;HECK-NEXT: (setlocal @0 (argument 1))
137 ; C;HECK-NEXT: (setlocal @1 (argument 0))
138 ; C;HECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
139 ; C;HECK-NEXT: (return @2)
140 ;define i64 @sar64(i64 %x, i64 %y) {
141 ; %a = ashr i64 %x, %y
142 ; ret i64 %a
143 ;}
144
145 ; CHECK-LABEL: clz64:
146 ; CHECK-NEXT: (setlocal @0 (argument 0))
147 ; CHECK-NEXT: (setlocal @1 (CLZ_I64 @0))
148 ; CHECK-NEXT: (return @1)
149 define i64 @clz64(i64 %x) {
150 %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
151 ret i64 %a
152 }
153
154 ; CHECK-LABEL: ctz64:
155 ; CHECK-NEXT: (setlocal @0 (argument 0))
156 ; CHECK-NEXT: (setlocal @1 (CTZ_I64 @0))
157 ; CHECK-NEXT: (return @1)
158 define i64 @ctz64(i64 %x) {
159 %a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
160 ret i64 %a
161 }
162
163 ; CHECK-LABEL: popcnt64:
164 ; CHECK-NEXT: (setlocal @0 (argument 0))
165 ; CHECK-NEXT: (setlocal @1 (POPCNT_I64 @0))
166 ; CHECK-NEXT: (return @1)
167 define i64 @popcnt64(i64 %x) {
168 %a = call i64 @llvm.ctpop.i64(i64 %x)
169 ret i64 %a
170 }
33 target triple = "wasm32-unknown-unknown"
44
55 ; CHECK-LABEL: return_void:
6 ; CHECK-NEXT: (RETURN_VOID)
6 ; CHECK-NEXT: (return)
77 define void @return_void() {
88 ret void
99 }
66
77 ; CHECK-LABEL: unused_first:
88 ; CHECK-NEXT: (setlocal @0 (argument 1))
9 ; CHECK-NEXT: (RETURN @0)
9 ; CHECK-NEXT: (return @0)
1010 define i32 @unused_first(i32 %x, i32 %y) {
1111 ret i32 %y
1212 }
1313
1414 ; CHECK-LABEL: unused_second:
1515 ; CHECK-NEXT: (setlocal @0 (argument 0))
16 ; CHECK-NEXT: (RETURN @0)
16 ; CHECK-NEXT: (return @0)
1717 define i32 @unused_second(i32 %x, i32 %y) {
1818 ret i32 %x
1919 }