llvm.org GIT mirror llvm / e1ecc5b
Second pass at addressing PR15351 by explicitly checking for AVX support when getting the host processor information. It emits a .byte sequence on GNUC compilers to work around lack of xgetbv support with older assemblers, and resolves a comment typo found in the previous patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178636 91177308-0d34-0410-b5e6-96231b3b80d8 Aaron Ballman 7 years ago
1 changed file(s) with 25 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
111111 #endif
112112 }
113113
114 static bool OSHasAVXSupport() {
115 #if defined( __GNUC__ )
116 // Check xgetbv; this uses a .byte sequence instead of the instruction
117 // directly because older assemblers do not include support for xgetbv and
118 // there is no easy way to conditionally compile based on the assembler used.
119 int rEAX, rEDX;
120 __asm__ (".byte 0x0f, 0x01, 0xd0" : "=a" (rEAX), "=d" (rEDX) : "c" (0));
121 #elif defined(_MSC_VER)
122 unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
123 #else
124 int rEAX = 0; // Ensures we return false
125 #endif
126 return (rEAX & 6) == 6;
127 }
128
114129 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family,
115130 unsigned &Model) {
116131 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
133148 DetectX86FamilyModel(EAX, Family, Model);
134149
135150 bool HasSSE3 = (ECX & 0x1);
151 // If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
152 // indicates that the AVX registers will be saved and restored on context
153 // switch, then we have full AVX support.
154 bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
136155 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
137156 bool Em64T = (EDX >> 29) & 0x1;
138157
242261 case 42: // Intel Core i7 processor. All processors are manufactured
243262 // using the 32 nm process.
244263 case 45:
245 return "corei7-avx";
264 // Not all Sandy Bridge processors support AVX (such as the Pentium
265 // versions instead of the i7 versions).
266 return HasAVX ? "corei7-avx" : "corei7";
246267
247268 // Ivy Bridge:
248269 case 58:
249 return "core-avx-i";
270 // Not all Ivy Bridge processors support AVX (such as the Pentium
271 // versions instead of the i7 versions).
272 return HasAVX ? "core-avx-i" : "corei7";
250273
251274 case 28: // Most 45 nm Intel Atom processors
252275 case 38: // 45 nm Atom Lincroft