llvm.org GIT mirror llvm / e1274de
Implement initial prolog/epilog code insertion methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 15 years ago
4 changed file(s) with 34 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
1212
1313 #include "SparcV8.h"
1414 #include "SparcV8RegisterInfo.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineFunction.h"
1517 #include "llvm/Type.h"
18 #include "Support/STLExtras.h"
1619 using namespace llvm;
1720
1821 SparcV8RegisterInfo::SparcV8RegisterInfo()
5962 abort();
6063 }
6164
62 void SparcV8RegisterInfo::processFunctionBeforeFrameFinalized(
63 MachineFunction &MF) const {
64 abort();
65 }
65 void SparcV8RegisterInfo::
66 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
6667
6768 void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const {
68 abort();
69 MachineBasicBlock &MBB = MF.front();
70
71 // Eventually this should emit the correct save instruction based on the
72 // number of bytes in the frame. For now we just hardcode it.
73 BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
6974 }
7075
7176 void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
7277 MachineBasicBlock &MBB) const {
73 abort();
78 MachineBasicBlock::iterator MBBI = prior(MBB.end());
79 assert(MBBI->getOpcode() == V8::JMPLi &&
80 "Can only put epilog before return instruction!");
81 BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
7482 }
7583
7684
2525 def I0 : Ri<24>; def I1 : Ri<25>; def I2 : Ri<26>; def I3 : Ri<27>;
2626 def I4 : Ri<28>; def I5 : Ri<29>; def I6 : Ri<30>; def I7 : Ri<31>;
2727
28 // Standard register aliases.
29 def SP : Ri<14>; def FP : Ri<30>;
30
2831 // Floating-point registers?
2932 // ...
3033 }
1212
1313 #include "SparcV8.h"
1414 #include "SparcV8RegisterInfo.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineFunction.h"
1517 #include "llvm/Type.h"
18 #include "Support/STLExtras.h"
1619 using namespace llvm;
1720
1821 SparcV8RegisterInfo::SparcV8RegisterInfo()
5962 abort();
6063 }
6164
62 void SparcV8RegisterInfo::processFunctionBeforeFrameFinalized(
63 MachineFunction &MF) const {
64 abort();
65 }
65 void SparcV8RegisterInfo::
66 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
6667
6768 void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const {
68 abort();
69 MachineBasicBlock &MBB = MF.front();
70
71 // Eventually this should emit the correct save instruction based on the
72 // number of bytes in the frame. For now we just hardcode it.
73 BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
6974 }
7075
7176 void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
7277 MachineBasicBlock &MBB) const {
73 abort();
78 MachineBasicBlock::iterator MBBI = prior(MBB.end());
79 assert(MBBI->getOpcode() == V8::JMPLi &&
80 "Can only put epilog before return instruction!");
81 BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
7482 }
7583
7684
2525 def I0 : Ri<24>; def I1 : Ri<25>; def I2 : Ri<26>; def I3 : Ri<27>;
2626 def I4 : Ri<28>; def I5 : Ri<29>; def I6 : Ri<30>; def I7 : Ri<31>;
2727
28 // Standard register aliases.
29 def SP : Ri<14>; def FP : Ri<30>;
30
2831 // Floating-point registers?
2932 // ...
3033 }