llvm.org GIT mirror llvm / e0e970b
[InstSimplify] Add test case to show bad sign bit handling for integer abs idiom in computeKnownBits. computeKnownBits will indicate the sign bit of abs is 0 if the the RHS operand returned by matchSelectPattern has the nsw flag set. For abs idioms like (X >= 0) ? X : -X, the RHS returns -X. But we can also match ((X-Y) >= 0 ? X-Y : Y-X as abs. In this case RHS will be the Y-X operand. According to Alive, the sign bit for this is only 0 if both the X-Y and Y-X operands have the nsw flag. But we're only checking the Y-X operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367747 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper a month ago
1 changed file(s) with 12 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
400400 ret i1 %r
401401 }
402402
403 ; We can't fold this to false unless both subs have nsw.
404 define i1 @abs_sub_sub_missing_nsw(i32 %x, i32 %y) {
405 ; CHECK-LABEL: @abs_sub_sub_missing_nsw(
406 ; CHECK-NEXT: ret i1 false
407 ;
408 %a = sub i32 %x, %y
409 %b = sub nsw i32 %y, %x
410 %c = icmp sgt i32 %a, -1
411 %d = select i1 %c, i32 %a, i32 %b
412 %e = icmp slt i32 %d, 0
413 ret i1 %e
414 }