llvm.org GIT mirror llvm / e0cbf97
Change live variables from using multimaps to using maps of vectors and rearrange some of the accessors to be more efficient. This makes it much more efficient to iterate over all of the things with the same value. This speeds up liveintervals analysis from 8.63s to 3.79s with a release build of llc on kc++ with -march=ia64. This also speeds up live var from 1.66s -> 0.87s as well, reducing total llc time from 20.1s->15.2s. This also speeds up other targets slightly, e.g. llc time on X86 from 16.84 -> 16.45s, and PPC from 17.64->17.03s. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22990 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 15 years ago
1 changed file(s) with 64 addition(s) and 48 deletion(s). Raw diff Collapse all Expand all
3939 public:
4040 struct VarInfo {
4141 /// DefInst - The machine instruction that defines this register.
42 MachineInstr *DefInst;
42 ///
43 MachineInstr *DefInst;
4344
4445 /// AliveBlocks - Set of blocks of which this value is alive completely
4546 /// through. This is a bit set which uses the basic block number as an
7576 ///
7677 std::vector VirtRegInfo;
7778
78 /// RegistersKilled - This multimap keeps track of all of the registers that
79 /// RegistersKilled - This map keeps track of all of the registers that
7980 /// are dead immediately after an instruction reads its operands. If an
8081 /// instruction does not have an entry in this map, it kills no registers.
8182 ///
82 std::multimap RegistersKilled;
83
84 /// RegistersDead - This multimap keeps track of all of the registers that are
83 std::map > RegistersKilled;
84
85 /// RegistersDead - This map keeps track of all of the registers that are
8586 /// dead immediately after an instruction executes, which are not dead after
8687 /// the operands are evaluated. In practice, this only contains registers
8788 /// which are defined by an instruction, but never used.
8889 ///
89 std::multimap> RegistersDead;
90 std::map > RegistersDead;
91
92 /// Dummy - An always empty vector used for instructions without dead or
93 /// killed operands.
94 std::vector Dummy;
9095
9196 /// AllocatablePhysicalRegisters - This vector keeps track of which registers
9297 /// are actually register allocatable by the target machine. We can not track
109114
110115 /// killed_iterator - Iterate over registers killed by a machine instruction
111116 ///
112 typedef std::multimap::iterator killed_iterator;
113
117 typedef std::vector::iterator killed_iterator;
118
119 std::vector &getKillsVector(MachineInstr *MI) {
120 std::map >::iterator I =
121 RegistersKilled.find(MI);
122 return I != RegistersKilled.end() ? I->second : Dummy;
123 }
124 std::vector &getDeadDefsVector(MachineInstr *MI) {
125 std::map >::iterator I =
126 RegistersDead.find(MI);
127 return I != RegistersDead.end() ? I->second : Dummy;
128 }
129
130
114131 /// killed_begin/end - Get access to the range of registers killed by a
115132 /// machine instruction.
116133 killed_iterator killed_begin(MachineInstr *MI) {
117 return RegistersKilled.lower_bound(MI);
134 return getKillsVector(MI).begin();
118135 }
119136 killed_iterator killed_end(MachineInstr *MI) {
120 return RegistersKilled.upper_bound(MI);
137 return getKillsVector(MI).end();
121138 }
122139 std::pair
123140 killed_range(MachineInstr *MI) {
124 return RegistersKilled.equal_range(MI);
141 std::vector &V = getKillsVector(MI);
142 return std::make_pair(V.begin(), V.end());
125143 }
126144
127145 /// KillsRegister - Return true if the specified instruction kills the
128146 /// specified register.
129147 bool KillsRegister(MachineInstr *MI, unsigned Reg) const {
130 typedef std::multimap::const_iterator cki;
131 std::pair KIP = RegistersKilled.equal_range(MI);
132 for (; KIP.first != KIP.second; ++KIP.first)
133 if (KIP.first->second == Reg)
134 return true;
148 std::map >::const_iterator I =
149 RegistersKilled.find(MI);
150 if (I != RegistersKilled.end())
151 for (std::vector::const_iterator CI = I->second.begin(),
152 E = I->second.end(); CI != E; ++CI)
153 if (*CI == Reg) return true;
135154 return false;
136155 }
137156
138157 killed_iterator dead_begin(MachineInstr *MI) {
139 return RegistersDead.lower_bound(MI);
158 return getDeadDefsVector(MI).begin();
140159 }
141160 killed_iterator dead_end(MachineInstr *MI) {
142 return RegistersDead.upper_bound(MI);
161 return getDeadDefsVector(MI).end();
143162 }
144163 std::pair
145164 dead_range(MachineInstr *MI) {
146 return RegistersDead.equal_range(MI);
165 std::vector &V = getDeadDefsVector(MI);
166 return std::make_pair(V.begin(), V.end());
147167 }
148168
149169 /// RegisterDefIsDead - Return true if the specified instruction defines the
150170 /// specified register, but that definition is dead.
151171 bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const {
152 typedef std::multimap::const_iterator cki;
153 std::pair KIP = RegistersDead.equal_range(MI);
154 for (; KIP.first != KIP.second; ++KIP.first)
155 if (KIP.first->second == Reg)
156 return true;
172 std::map >::const_iterator I =
173 RegistersDead.find(MI);
174 if (I != RegistersDead.end())
175 for (std::vector::const_iterator CI = I->second.begin(),
176 E = I->second.end(); CI != E; ++CI)
177 if (*CI == Reg) return true;
157178 return false;
158179 }
159180
184205 MachineInstr *MI) {
185206 if (!getVarInfo(reg).removeKill(MI))
186207 return false;
187 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
188 if (i->second == reg)
189 RegistersKilled.erase(i++);
190 else
191 ++i;
192 }
208
209 std::vector &V = getKillsVector(MI);
210 for (unsigned i = 0, e = V.size(); i != e; ++i)
211 if (V[i] == reg) {
212 V.erase(V.begin()+i);
213 return true;
214 }
193215 return true;
194216 }
195217
196 /// removeVirtualRegistersKilled - Remove all of the specified killed
197 /// registers from the live variable information.
198 void removeVirtualRegistersKilled(killed_iterator B, killed_iterator E) {
199 for (killed_iterator I = B; I != E; ++I) { // Remove VarInfo entries...
200 bool removed = getVarInfo(I->second).removeKill(I->first);
201 assert(removed && "kill not in register's VarInfo?");
202 }
203 RegistersKilled.erase(B, E);
218 /// removeVirtualRegistersKilled - Remove all killed info for the specified
219 /// instruction.
220 void removeVirtualRegistersKilled(MachineInstr *MI) {
221 RegistersKilled.erase(MI);
204222 }
205223
206224 /// addVirtualRegisterDead - Add information about the fact that the specified
221239 if (!getVarInfo(reg).removeKill(MI))
222240 return false;
223241
224 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
225 if (i->second == reg)
226 RegistersKilled.erase(i++);
227 else
228 ++i;
229 }
242 std::vector &V = getDeadDefsVector(MI);
243 for (unsigned i = 0, e = V.size(); i != e; ++i)
244 if (V[i] == reg) {
245 V.erase(V.begin()+i);
246 return true;
247 }
230248 return true;
231249 }
232250
233251 /// removeVirtualRegistersDead - Remove all of the specified dead
234252 /// registers from the live variable information.
235 void removeVirtualRegistersDead(killed_iterator B, killed_iterator E) {
236 for (killed_iterator I = B; I != E; ++I) // Remove VarInfo entries...
237 getVarInfo(I->second).removeKill(I->first);
238 RegistersDead.erase(B, E);
253 void removeVirtualRegistersDead(MachineInstr *MI) {
254 RegistersDead.erase(MI);
239255 }
240256
241257 virtual void getAnalysisUsage(AnalysisUsage &AU) const {