llvm.org GIT mirror llvm / dfca6ee
CriticalAntiDepBreaker is no longer needed for armv7 scheduling. This is being disabled because it is no longer needed for performance. It is only used by postRAscheduler which is also planned for removal, and it is implemented with an out-dated view of register liveness. It consideres aliases instead of register units, assumes valid kill flags, and assumes implicit uses on partial register defs. Kill flags and implicit operands are error prone and impossible to verify. We should gradually eliminate dependence on them in the postRA phases. Targets that still benefit from this should move to the MI scheduler. If that doesn't solve the problem, then we should add a hook to regalloc to optimize reload placement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191348 91177308-0d34-0410-b5e6-96231b3b80d8 Andrew Trick 6 years ago
4 changed file(s) with 6 addition(s) and 8 deletion(s). Raw diff Collapse all Expand all
281281 CodeGenOpt::Level OptLevel,
282282 TargetSubtargetInfo::AntiDepBreakMode& Mode,
283283 RegClassVector& CriticalPathRCs) const {
284 Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
285 CriticalPathRCs.clear();
286 CriticalPathRCs.push_back(&ARM::GPRRegClass);
284 Mode = TargetSubtargetInfo::ANTIDEP_NONE;
287285 return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
288286 }
99 ; CHECK-GENERIT-NEXT: strb
1010 ; CHECK-GENERIT-NEXT: strb
1111 ; CHECK-GENERIT-NEXT: strb
12 ; CHECK-UNALIGNED: strb
13 ; CHECK-UNALIGNED-NEXT: str
12 ; CHECK-UNALIGNED: strb
13 ; CHECK-UNALIGNED: str
1414 define void @foo(i8* nocapture %c) nounwind optsize {
1515 entry:
1616 call void @llvm.memset.p0i8.i64(i8* %c, i8 -1, i64 5, i32 1, i1 false)
0 ; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s
11
22 ; Trigger multiple NEON stores.
3 ; CHECK: vst1.64
4 ; CHECK-NEXT: vst1.64
3 ; CHECK: vst1.64
4 ; CHECK: vst1.64
55 define void @f_0_40(i8* nocapture %c) nounwind optsize {
66 entry:
77 call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false)
1212 ;Check for a post-increment updating store.
1313 define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
1414 ;CHECK-LABEL: vst1lanei8_update:
15 ;CHECK: vst1.8 {d16[3]}, [r2]!
15 ;CHECK: vst1.8 {d16[3]}, [{{r[0-9]}}]!
1616 %A = load i8** %ptr
1717 %tmp1 = load <8 x i8>* %B
1818 %tmp2 = extractelement <8 x i8> %tmp1, i32 3