llvm.org GIT mirror llvm / de8f33c
Build system infrastructure for multiple tblgens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266 91177308-0d34-0410-b5e6-96231b3b80d8 Peter Collingbourne 8 years ago
21 changed file(s) with 219 addition(s) and 194 deletion(s). Raw diff Collapse all Expand all
186186 include(AddLLVM)
187187 include(TableGen)
188188
189 macro(llvm_tablegen)
190 tablegen(LLVM ${ARGN})
191 endmacro()
192
189193 if( MINGW )
190194 # People report that -O3 is unreliable on MinGW. The traditional
191195 # build also uses -O2 for that reason:
196200 add_subdirectory(lib/Support)
197201 add_subdirectory(lib/TableGen)
198202
199 set(LLVM_TABLEGEN "tblgen" CACHE
200 STRING "Native TableGen executable. Saves building one when cross-compiling.")
201 # Effective tblgen executable to be used:
202 set(LLVM_TABLEGEN_EXE ${LLVM_TABLEGEN})
203
204203 add_subdirectory(utils/TableGen)
205
206 if( CMAKE_CROSSCOMPILING )
207 # This adds a dependency on target `tblgen', so must go after utils/TableGen
208 include( CrossCompileLLVM )
209 endif( CMAKE_CROSSCOMPILING )
210204
211205 add_subdirectory(include/llvm)
212206
449449 ifndef LLVMAS
450450 LLVMAS := $(LLVMToolDir)/llvm-as$(EXEEXT)
451451 endif
452 ifndef TBLGEN
452 ifndef LLVM_TBLGEN
453453 ifeq ($(LLVM_CROSS_COMPILING),1)
454 TBLGEN := $(BuildLLVMToolDir)/tblgen$(BUILD_EXEEXT)
454 LLVM_TBLGEN := $(BuildLLVMToolDir)/llvm-tblgen$(BUILD_EXEEXT)
455455 else
456 TBLGEN := $(LLVMToolDir)/tblgen$(EXEEXT)
456 LLVM_TBLGEN := $(LLVMToolDir)/llvm-tblgen$(EXEEXT)
457457 endif
458458 endif
459459 LLVM_CONFIG := $(LLVMToolDir)/llvm-config
683683 # When compiling under Mingw/Cygwin, the tblgen tool expects Windows
684684 # paths. In this case, the SYSPATH function (defined in
685685 # Makefile.config) transforms Unix paths into Windows paths.
686 TableGen = $(TBLGEN) -I $(call SYSPATH, $(PROJ_SRC_DIR)) \
686 TableGen.Flags= -I $(call SYSPATH, $(PROJ_SRC_DIR)) \
687687 -I $(call SYSPATH, $(LLVM_SRC_ROOT)/include) \
688688 -I $(call SYSPATH, $(PROJ_SRC_ROOT)/include) \
689689 -I $(call SYSPATH, $(PROJ_SRC_ROOT)/lib/Target)
690 LLVMTableGen = $(LLVM_TBLGEN) $(TableGen.Flags)
690691
691692 Archive = $(AR) $(AR.Flags)
692693 LArchive = $(LLVMToolDir)/llvm-ar rcsf
16991700 $(LLVM_SRC_ROOT)/include/llvm/CodeGen/ValueTypes.td) \
17001701 $(wildcard $(LLVM_SRC_ROOT)/include/llvm/Intrinsics*.td)
17011702
1702 # All of these files depend on tblgen and the .td files.
1703 $(INCTMPFiles) : $(TBLGEN) $(TDFiles)
1703 # All .inc.tmp files depend on the .td files.
1704 $(INCTMPFiles) : $(TDFiles)
17041705
17051706 $(TARGET:%=$(ObjDir)/%GenRegisterInfo.inc.tmp): \
1706 $(ObjDir)/%GenRegisterInfo.inc.tmp : %.td $(ObjDir)/.dir
1707 $(ObjDir)/%GenRegisterInfo.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17071708 $(Echo) "Building $(
1708 $(Verb) $(TableGen) -gen-register-info -o $(call SYSPATH, $@) $<
1709 $(Verb) $(LLVMTableGen) -gen-register-info -o $(call SYSPATH, $@) $<
17091710
17101711 $(TARGET:%=$(ObjDir)/%GenInstrInfo.inc.tmp): \
1711 $(ObjDir)/%GenInstrInfo.inc.tmp : %.td $(ObjDir)/.dir
1712 $(ObjDir)/%GenInstrInfo.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17121713 $(Echo) "Building $(
1713 $(Verb) $(TableGen) -gen-instr-info -o $(call SYSPATH, $@) $<
1714 $(Verb) $(LLVMTableGen) -gen-instr-info -o $(call SYSPATH, $@) $<
17141715
17151716 $(TARGET:%=$(ObjDir)/%GenAsmWriter.inc.tmp): \
1716 $(ObjDir)/%GenAsmWriter.inc.tmp : %.td $(ObjDir)/.dir
1717 $(ObjDir)/%GenAsmWriter.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17171718 $(Echo) "Building $(
1718 $(Verb) $(TableGen) -gen-asm-writer -o $(call SYSPATH, $@) $<
1719 $(Verb) $(LLVMTableGen) -gen-asm-writer -o $(call SYSPATH, $@) $<
17191720
17201721 $(TARGET:%=$(ObjDir)/%GenAsmWriter1.inc.tmp): \
1721 $(ObjDir)/%GenAsmWriter1.inc.tmp : %.td $(ObjDir)/.dir
1722 $(ObjDir)/%GenAsmWriter1.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17221723 $(Echo) "Building $(
1723 $(Verb) $(TableGen) -gen-asm-writer -asmwriternum=1 -o $(call SYSPATH, $@) $<
1724 $(Verb) $(LLVMTableGen) -gen-asm-writer -asmwriternum=1 -o $(call SYSPATH, $@) $<
17241725
17251726 $(TARGET:%=$(ObjDir)/%GenAsmMatcher.inc.tmp): \
1726 $(ObjDir)/%GenAsmMatcher.inc.tmp : %.td $(ObjDir)/.dir
1727 $(ObjDir)/%GenAsmMatcher.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17271728 $(Echo) "Building $(
1728 $(Verb) $(TableGen) -gen-asm-matcher -o $(call SYSPATH, $@) $<
1729 $(Verb) $(LLVMTableGen) -gen-asm-matcher -o $(call SYSPATH, $@) $<
17291730
17301731 $(TARGET:%=$(ObjDir)/%GenMCCodeEmitter.inc.tmp): \
1731 $(ObjDir)/%GenMCCodeEmitter.inc.tmp: %.td $(ObjDir)/.dir
1732 $(ObjDir)/%GenMCCodeEmitter.inc.tmp: %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17321733 $(Echo) "Building $(
1733 $(Verb) $(TableGen) -gen-emitter -mc-emitter -o $(call SYSPATH, $@) $<
1734 $(Verb) $(LLVMTableGen) -gen-emitter -mc-emitter -o $(call SYSPATH, $@) $<
17341735
17351736 $(TARGET:%=$(ObjDir)/%GenMCPseudoLowering.inc.tmp): \
1736 $(ObjDir)/%GenMCPseudoLowering.inc.tmp: %.td $(ObjDir)/.dir
1737 $(ObjDir)/%GenMCPseudoLowering.inc.tmp: %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17371738 $(Echo) "Building $(
1738 $(Verb) $(TableGen) -gen-pseudo-lowering -o $(call SYSPATH, $@) $<
1739 $(Verb) $(LLVMTableGen) -gen-pseudo-lowering -o $(call SYSPATH, $@) $<
17391740
17401741 $(TARGET:%=$(ObjDir)/%GenCodeEmitter.inc.tmp): \
1741 $(ObjDir)/%GenCodeEmitter.inc.tmp: %.td $(ObjDir)/.dir
1742 $(ObjDir)/%GenCodeEmitter.inc.tmp: %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17421743 $(Echo) "Building $(
1743 $(Verb) $(TableGen) -gen-emitter -o $(call SYSPATH, $@) $<
1744 $(Verb) $(LLVMTableGen) -gen-emitter -o $(call SYSPATH, $@) $<
17441745
17451746 $(TARGET:%=$(ObjDir)/%GenDAGISel.inc.tmp): \
1746 $(ObjDir)/%GenDAGISel.inc.tmp : %.td $(ObjDir)/.dir
1747 $(ObjDir)/%GenDAGISel.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17471748 $(Echo) "Building $(
1748 $(Verb) $(TableGen) -gen-dag-isel -o $(call SYSPATH, $@) $<
1749 $(Verb) $(LLVMTableGen) -gen-dag-isel -o $(call SYSPATH, $@) $<
17491750
17501751 $(TARGET:%=$(ObjDir)/%GenDisassemblerTables.inc.tmp): \
1751 $(ObjDir)/%GenDisassemblerTables.inc.tmp : %.td $(ObjDir)/.dir
1752 $(ObjDir)/%GenDisassemblerTables.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17521753 $(Echo) "Building $(
1753 $(Verb) $(TableGen) -gen-disassembler -o $(call SYSPATH, $@) $<
1754 $(Verb) $(LLVMTableGen) -gen-disassembler -o $(call SYSPATH, $@) $<
17541755
17551756 $(TARGET:%=$(ObjDir)/%GenEDInfo.inc.tmp): \
1756 $(ObjDir)/%GenEDInfo.inc.tmp : %.td $(ObjDir)/.dir
1757 $(ObjDir)/%GenEDInfo.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17571758 $(Echo) "Building $(
1758 $(Verb) $(TableGen) -gen-enhanced-disassembly-info -o $(call SYSPATH, $@) $<
1759 $(Verb) $(LLVMTableGen) -gen-enhanced-disassembly-info -o $(call SYSPATH, $@) $<
17591760
17601761 $(TARGET:%=$(ObjDir)/%GenFastISel.inc.tmp): \
1761 $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir
1762 $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17621763 $(Echo) "Building $(
1763 $(Verb) $(TableGen) -gen-fast-isel -o $(call SYSPATH, $@) $<
1764 $(Verb) $(LLVMTableGen) -gen-fast-isel -o $(call SYSPATH, $@) $<
17641765
17651766 $(TARGET:%=$(ObjDir)/%GenSubtargetInfo.inc.tmp): \
1766 $(ObjDir)/%GenSubtargetInfo.inc.tmp : %.td $(ObjDir)/.dir
1767 $(ObjDir)/%GenSubtargetInfo.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17671768 $(Echo) "Building $(
1768 $(Verb) $(TableGen) -gen-subtarget -o $(call SYSPATH, $@) $<
1769 $(Verb) $(LLVMTableGen) -gen-subtarget -o $(call SYSPATH, $@) $<
17691770
17701771 $(TARGET:%=$(ObjDir)/%GenCallingConv.inc.tmp): \
1771 $(ObjDir)/%GenCallingConv.inc.tmp : %.td $(ObjDir)/.dir
1772 $(ObjDir)/%GenCallingConv.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17721773 $(Echo) "Building $(
1773 $(Verb) $(TableGen) -gen-callingconv -o $(call SYSPATH, $@) $<
1774 $(Verb) $(LLVMTableGen) -gen-callingconv -o $(call SYSPATH, $@) $<
17741775
17751776 $(TARGET:%=$(ObjDir)/%GenIntrinsics.inc.tmp): \
1776 $(ObjDir)/%GenIntrinsics.inc.tmp : %.td $(ObjDir)/.dir
1777 $(ObjDir)/%GenIntrinsics.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17771778 $(Echo) "Building $(
1778 $(Verb) $(TableGen) -gen-tgt-intrinsic -o $(call SYSPATH, $@) $<
1779
1780 $(ObjDir)/ARMGenDecoderTables.inc.tmp : ARM.td $(ObjDir)/.dir
1779 $(Verb) $(LLVMTableGen) -gen-tgt-intrinsic -o $(call SYSPATH, $@) $<
1780
1781 $(ObjDir)/ARMGenDecoderTables.inc.tmp : ARM.td $(ObjDir)/.dir $(LLVM_TBLGEN)
17811782 $(Echo) "Building $(
1782 $(Verb) $(TableGen) -gen-arm-decoder -o $(call SYSPATH, $@) $<
1783 $(Verb) $(LLVMTableGen) -gen-arm-decoder -o $(call SYSPATH, $@) $<
17831784
17841785
17851786 clean-local::
+0
-26
cmake/modules/CrossCompileLLVM.cmake less more
None
1 if( ${LLVM_TABLEGEN} STREQUAL "tblgen" )
2 set(CX_NATIVE_TG_DIR "${CMAKE_BINARY_DIR}/native")
3 set(LLVM_TABLEGEN_EXE "${CX_NATIVE_TG_DIR}/bin/tblgen")
4
5 add_custom_command(OUTPUT ${CX_NATIVE_TG_DIR}
6 COMMAND ${CMAKE_COMMAND} -E make_directory ${CX_NATIVE_TG_DIR}
7 COMMENT "Creating ${CX_NATIVE_TG_DIR}...")
8
9 add_custom_command(OUTPUT ${CX_NATIVE_TG_DIR}/CMakeCache.txt
10 COMMAND ${CMAKE_COMMAND} -UMAKE_TOOLCHAIN_FILE -DCMAKE_BUILD_TYPE=Release ${CMAKE_SOURCE_DIR}
11 WORKING_DIRECTORY ${CX_NATIVE_TG_DIR}
12 DEPENDS ${CX_NATIVE_TG_DIR}
13 COMMENT "Configuring native TableGen...")
14
15 add_custom_command(OUTPUT ${LLVM_TABLEGEN_EXE}
16 COMMAND ${CMAKE_BUILD_TOOL}
17 DEPENDS ${CX_NATIVE_TG_DIR}/CMakeCache.txt
18 WORKING_DIRECTORY ${CX_NATIVE_TG_DIR}/utils/TableGen
19 COMMENT "Building native TableGen...")
20 add_custom_target(NativeTableGen DEPENDS ${LLVM_TABLEGEN_EXE})
21
22 add_dependencies(tblgen NativeTableGen)
23
24 set_directory_properties(PROPERTIES ADDITIONAL_MAKE_CLEAN_FILES ${CX_NATIVE_TG_DIR})
25 endif()
11 # Extra parameters for `tblgen' may come after `ofn' parameter.
22 # Adds the name of the generated file to TABLEGEN_OUTPUT.
33
4 macro(tablegen ofn)
4 macro(tablegen project ofn)
55 file(GLOB local_tds "*.td")
66 file(GLOB_RECURSE global_tds "${LLVM_MAIN_SRC_DIR}/include/llvm/*.td")
77
1313 endif()
1414 add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
1515 # Generate tablegen output in a temporary file.
16 COMMAND ${LLVM_TABLEGEN_EXE} ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR}
16 COMMAND ${${project}_TABLEGEN_EXE} ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR}
1717 -I ${LLVM_MAIN_SRC_DIR}/lib/Target -I ${LLVM_MAIN_INCLUDE_DIR}
1818 ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
1919 -o ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
2020 # The file in LLVM_TARGET_DEFINITIONS may be not in the current
2121 # directory and local_tds may not contain it, so we must
2222 # explicitly list it here:
23 DEPENDS ${LLVM_TABLEGEN_EXE} ${local_tds} ${global_tds}
23 DEPENDS ${${project}_TABLEGEN_EXE} ${local_tds} ${global_tds}
2424 ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
2525 COMMENT "Building ${ofn}..."
2626 )
5252 add_dependencies(${target} ${LLVM_COMMON_DEPENDS})
5353 endif( TABLEGEN_OUTPUT )
5454 endfunction()
55
56 if(CMAKE_CROSSCOMPILING)
57 set(CX_NATIVE_TG_DIR "${CMAKE_BINARY_DIR}/native")
58
59 add_custom_command(OUTPUT ${CX_NATIVE_TG_DIR}
60 COMMAND ${CMAKE_COMMAND} -E make_directory ${CX_NATIVE_TG_DIR}
61 COMMENT "Creating ${CX_NATIVE_TG_DIR}...")
62
63 add_custom_command(OUTPUT ${CX_NATIVE_TG_DIR}/CMakeCache.txt
64 COMMAND ${CMAKE_COMMAND} -UMAKE_TOOLCHAIN_FILE -DCMAKE_BUILD_TYPE=Release
65 -DLLVM_BUILD_POLLY=OFF ${CMAKE_SOURCE_DIR}
66 WORKING_DIRECTORY ${CX_NATIVE_TG_DIR}
67 DEPENDS ${CX_NATIVE_TG_DIR}
68 COMMENT "Configuring native TableGen...")
69
70 add_custom_target(ConfigureNativeTableGen DEPENDS ${CX_NATIVE_TG_DIR}/CMakeCache.txt)
71
72 set_directory_properties(PROPERTIES ADDITIONAL_MAKE_CLEAN_FILES ${CX_NATIVE_TG_DIR})
73 endif()
74
75 macro(add_tablegen target project)
76 set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${LLVM_TOOLS_BINARY_DIR})
77
78 add_llvm_utility(${target} ${ARGN})
79
80 set(${project}_TABLEGEN "${target}" CACHE
81 STRING "Native TableGen executable. Saves building one when cross-compiling.")
82
83 # Upgrade existing LLVM_TABLEGEN setting.
84 if(${project} STREQUAL LLVM)
85 if(${LLVM_TABLEGEN} STREQUAL tblgen)
86 set(LLVM_TABLEGEN "${target}" CACHE
87 STRING "Native TableGen executable. Saves building one when cross-compiling."
88 FORCE)
89 endif()
90 endif()
91
92 # Effective tblgen executable to be used:
93 set(${project}_TABLEGEN_EXE ${${project}_TABLEGEN} PARENT_SCOPE)
94
95 if(CMAKE_CROSSCOMPILING)
96 if( ${${project}_TABLEGEN} STREQUAL "${target}" )
97 set(${project}_TABLEGEN_EXE "${CX_NATIVE_TG_DIR}/bin/${target}")
98 set(${project}_TABLEGEN_EXE ${${project}_TABLEGEN_EXE} PARENT_SCOPE)
99
100 add_custom_command(OUTPUT ${${project}_TABLEGEN_EXE}
101 COMMAND ${CMAKE_BUILD_TOOL} ${target}
102 DEPENDS ${CX_NATIVE_TG_DIR}/CMakeCache.txt
103 WORKING_DIRECTORY ${CX_NATIVE_TG_DIR}
104 COMMENT "Building native TableGen...")
105 add_custom_target(${project}NativeTableGen DEPENDS ${${project}_TABLEGEN_EXE})
106 add_dependencies(${project}NativeTableGen ConfigureNativeTableGen)
107
108 add_dependencies(${target} ${project}NativeTableGen)
109 endif()
110 endif()
111
112 target_link_libraries(${target} LLVMSupport LLVMTableGen)
113 if( MINGW )
114 target_link_libraries(${target} imagehlp psapi)
115 if(CMAKE_SIZEOF_VOID_P MATCHES "8")
116 set_target_properties(${target} PROPERTIES LINK_FLAGS -Wl,--stack,16777216)
117 endif(CMAKE_SIZEOF_VOID_P MATCHES "8")
118 endif( MINGW )
119 if( LLVM_ENABLE_THREADS AND HAVE_LIBPTHREAD AND NOT BEOS )
120 target_link_libraries(${target} pthread)
121 endif()
122
123 install(TARGETS ${target} RUNTIME DESTINATION bin)
124 endmacro()
0 set(LLVM_TARGET_DEFINITIONS Intrinsics.td)
11
2 tablegen(Intrinsics.gen -gen-intrinsic)
2 llvm_tablegen(Intrinsics.gen -gen-intrinsic)
33
44 add_custom_target(intrinsics_gen ALL
55 DEPENDS ${llvm_builded_incs_dir}/Intrinsics.gen)
0 set(LLVM_TARGET_DEFINITIONS ARM.td)
11
2 tablegen(ARMGenRegisterInfo.inc -gen-register-info)
3 tablegen(ARMGenInstrInfo.inc -gen-instr-info)
4 tablegen(ARMGenCodeEmitter.inc -gen-emitter)
5 tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
6 tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
7 tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
8 tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
9 tablegen(ARMGenDAGISel.inc -gen-dag-isel)
10 tablegen(ARMGenFastISel.inc -gen-fast-isel)
11 tablegen(ARMGenCallingConv.inc -gen-callingconv)
12 tablegen(ARMGenSubtargetInfo.inc -gen-subtarget)
13 tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
14 tablegen(ARMGenDisassemblerTables.inc -gen-disassembler)
2 llvm_tablegen(ARMGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(ARMGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(ARMGenCodeEmitter.inc -gen-emitter)
5 llvm_tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
6 llvm_tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
7 llvm_tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
8 llvm_tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
9 llvm_tablegen(ARMGenDAGISel.inc -gen-dag-isel)
10 llvm_tablegen(ARMGenFastISel.inc -gen-fast-isel)
11 llvm_tablegen(ARMGenCallingConv.inc -gen-callingconv)
12 llvm_tablegen(ARMGenSubtargetInfo.inc -gen-subtarget)
13 llvm_tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
14 llvm_tablegen(ARMGenDisassemblerTables.inc -gen-disassembler)
1515 add_public_tablegen_target(ARMCommonTableGen)
1616
1717 add_llvm_target(ARMCodeGen
0 set(LLVM_TARGET_DEFINITIONS Alpha.td)
11
2 tablegen(AlphaGenRegisterInfo.inc -gen-register-info)
3 tablegen(AlphaGenInstrInfo.inc -gen-instr-info)
4 tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
5 tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
6 tablegen(AlphaGenCallingConv.inc -gen-callingconv)
7 tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(AlphaGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(AlphaGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(AlphaGenCallingConv.inc -gen-callingconv)
7 llvm_tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget)
88 add_public_tablegen_target(AlphaCommonTableGen)
99
1010 add_llvm_target(AlphaCodeGen
0 set(LLVM_TARGET_DEFINITIONS Blackfin.td)
11
2 tablegen(BlackfinGenRegisterInfo.inc -gen-register-info)
3 tablegen(BlackfinGenInstrInfo.inc -gen-instr-info)
4 tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer)
5 tablegen(BlackfinGenDAGISel.inc -gen-dag-isel)
6 tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget)
7 tablegen(BlackfinGenCallingConv.inc -gen-callingconv)
8 tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic)
2 llvm_tablegen(BlackfinGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(BlackfinGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(BlackfinGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget)
7 llvm_tablegen(BlackfinGenCallingConv.inc -gen-callingconv)
8 llvm_tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic)
99 add_public_tablegen_target(BlackfinCommonTableGen)
1010
1111 add_llvm_target(BlackfinCodeGen
0 set(LLVM_TARGET_DEFINITIONS SPU.td)
11
2 tablegen(SPUGenAsmWriter.inc -gen-asm-writer)
3 tablegen(SPUGenCodeEmitter.inc -gen-emitter)
4 tablegen(SPUGenRegisterInfo.inc -gen-register-info)
5 tablegen(SPUGenInstrInfo.inc -gen-instr-info)
6 tablegen(SPUGenDAGISel.inc -gen-dag-isel)
7 tablegen(SPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(SPUGenCallingConv.inc -gen-callingconv)
2 llvm_tablegen(SPUGenAsmWriter.inc -gen-asm-writer)
3 llvm_tablegen(SPUGenCodeEmitter.inc -gen-emitter)
4 llvm_tablegen(SPUGenRegisterInfo.inc -gen-register-info)
5 llvm_tablegen(SPUGenInstrInfo.inc -gen-instr-info)
6 llvm_tablegen(SPUGenDAGISel.inc -gen-dag-isel)
7 llvm_tablegen(SPUGenSubtargetInfo.inc -gen-subtarget)
8 llvm_tablegen(SPUGenCallingConv.inc -gen-callingconv)
99 add_public_tablegen_target(CellSPUCommonTableGen)
1010
1111 add_llvm_target(CellSPUCodeGen
0 set(LLVM_TARGET_DEFINITIONS MBlaze.td)
11
2 tablegen(MBlazeGenRegisterInfo.inc -gen-register-info)
3 tablegen(MBlazeGenInstrInfo.inc -gen-instr-info)
4 tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
5 tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
6 tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
7 tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
8 tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
9 tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
10 tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
11 tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
2 llvm_tablegen(MBlazeGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(MBlazeGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
5 llvm_tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
6 llvm_tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
7 llvm_tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
8 llvm_tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
9 llvm_tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
10 llvm_tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
11 llvm_tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
1212 add_public_tablegen_target(MBlazeCommonTableGen)
1313
1414 add_llvm_target(MBlazeCodeGen
0 set(LLVM_TARGET_DEFINITIONS MSP430.td)
11
2 tablegen(MSP430GenRegisterInfo.inc -gen-register-info)
3 tablegen(MSP430GenInstrInfo.inc -gen-instr-info)
4 tablegen(MSP430GenAsmWriter.inc -gen-asm-writer)
5 tablegen(MSP430GenDAGISel.inc -gen-dag-isel)
6 tablegen(MSP430GenCallingConv.inc -gen-callingconv)
7 tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(MSP430GenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(MSP430GenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(MSP430GenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(MSP430GenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(MSP430GenCallingConv.inc -gen-callingconv)
7 llvm_tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget)
88 add_public_tablegen_target(MSP430CommonTableGen)
99
1010 add_llvm_target(MSP430CodeGen
0 set(LLVM_TARGET_DEFINITIONS Mips.td)
11
2 tablegen(MipsGenRegisterInfo.inc -gen-register-info)
3 tablegen(MipsGenInstrInfo.inc -gen-instr-info)
4 tablegen(MipsGenAsmWriter.inc -gen-asm-writer)
5 tablegen(MipsGenDAGISel.inc -gen-dag-isel)
6 tablegen(MipsGenCallingConv.inc -gen-callingconv)
7 tablegen(MipsGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(MipsGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(MipsGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(MipsGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(MipsGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(MipsGenCallingConv.inc -gen-callingconv)
7 llvm_tablegen(MipsGenSubtargetInfo.inc -gen-subtarget)
88 add_public_tablegen_target(MipsCommonTableGen)
99
1010 add_llvm_target(MipsCodeGen
0 set(LLVM_TARGET_DEFINITIONS PTX.td)
11
2 tablegen(PTXGenAsmWriter.inc -gen-asm-writer)
3 tablegen(PTXGenDAGISel.inc -gen-dag-isel)
4 tablegen(PTXGenInstrInfo.inc -gen-instr-info)
5 tablegen(PTXGenRegisterInfo.inc -gen-register-info)
6 tablegen(PTXGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(PTXGenAsmWriter.inc -gen-asm-writer)
3 llvm_tablegen(PTXGenDAGISel.inc -gen-dag-isel)
4 llvm_tablegen(PTXGenInstrInfo.inc -gen-instr-info)
5 llvm_tablegen(PTXGenRegisterInfo.inc -gen-register-info)
6 llvm_tablegen(PTXGenSubtargetInfo.inc -gen-subtarget)
77 add_public_tablegen_target(PTXCommonTableGen)
88
99 add_llvm_target(PTXCodeGen
0 set(LLVM_TARGET_DEFINITIONS PPC.td)
11
2 tablegen(PPCGenAsmWriter.inc -gen-asm-writer)
3 tablegen(PPCGenCodeEmitter.inc -gen-emitter)
4 tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
5 tablegen(PPCGenRegisterInfo.inc -gen-register-info)
6 tablegen(PPCGenInstrInfo.inc -gen-instr-info)
7 tablegen(PPCGenDAGISel.inc -gen-dag-isel)
8 tablegen(PPCGenCallingConv.inc -gen-callingconv)
9 tablegen(PPCGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(PPCGenAsmWriter.inc -gen-asm-writer)
3 llvm_tablegen(PPCGenCodeEmitter.inc -gen-emitter)
4 llvm_tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
5 llvm_tablegen(PPCGenRegisterInfo.inc -gen-register-info)
6 llvm_tablegen(PPCGenInstrInfo.inc -gen-instr-info)
7 llvm_tablegen(PPCGenDAGISel.inc -gen-dag-isel)
8 llvm_tablegen(PPCGenCallingConv.inc -gen-callingconv)
9 llvm_tablegen(PPCGenSubtargetInfo.inc -gen-subtarget)
1010 add_public_tablegen_target(PowerPCCommonTableGen)
1111
1212 add_llvm_target(PowerPCCodeGen
0 set(LLVM_TARGET_DEFINITIONS Sparc.td)
11
2 tablegen(SparcGenRegisterInfo.inc -gen-register-info)
3 tablegen(SparcGenInstrInfo.inc -gen-instr-info)
4 tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
5 tablegen(SparcGenDAGISel.inc -gen-dag-isel)
6 tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
7 tablegen(SparcGenCallingConv.inc -gen-callingconv)
2 llvm_tablegen(SparcGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(SparcGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(SparcGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
7 llvm_tablegen(SparcGenCallingConv.inc -gen-callingconv)
88 add_public_tablegen_target(SparcCommonTableGen)
99
1010 add_llvm_target(SparcCodeGen
0 set(LLVM_TARGET_DEFINITIONS SystemZ.td)
11
2 tablegen(SystemZGenRegisterInfo.inc -gen-register-info)
3 tablegen(SystemZGenInstrInfo.inc -gen-instr-info)
4 tablegen(SystemZGenAsmWriter.inc -gen-asm-writer)
5 tablegen(SystemZGenDAGISel.inc -gen-dag-isel)
6 tablegen(SystemZGenCallingConv.inc -gen-callingconv)
7 tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(SystemZGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(SystemZGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(SystemZGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(SystemZGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(SystemZGenCallingConv.inc -gen-callingconv)
7 llvm_tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget)
88 add_public_tablegen_target(SystemZCommonTableGen)
99
1010 add_llvm_target(SystemZCodeGen
0 set(LLVM_TARGET_DEFINITIONS X86.td)
11
2 tablegen(X86GenRegisterInfo.inc -gen-register-info)
3 tablegen(X86GenDisassemblerTables.inc -gen-disassembler)
4 tablegen(X86GenInstrInfo.inc -gen-instr-info)
5 tablegen(X86GenAsmWriter.inc -gen-asm-writer)
6 tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
7 tablegen(X86GenAsmMatcher.inc -gen-asm-matcher)
8 tablegen(X86GenDAGISel.inc -gen-dag-isel)
9 tablegen(X86GenFastISel.inc -gen-fast-isel)
10 tablegen(X86GenCallingConv.inc -gen-callingconv)
11 tablegen(X86GenSubtargetInfo.inc -gen-subtarget)
12 tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
2 llvm_tablegen(X86GenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(X86GenDisassemblerTables.inc -gen-disassembler)
4 llvm_tablegen(X86GenInstrInfo.inc -gen-instr-info)
5 llvm_tablegen(X86GenAsmWriter.inc -gen-asm-writer)
6 llvm_tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
7 llvm_tablegen(X86GenAsmMatcher.inc -gen-asm-matcher)
8 llvm_tablegen(X86GenDAGISel.inc -gen-dag-isel)
9 llvm_tablegen(X86GenFastISel.inc -gen-fast-isel)
10 llvm_tablegen(X86GenCallingConv.inc -gen-callingconv)
11 llvm_tablegen(X86GenSubtargetInfo.inc -gen-subtarget)
12 llvm_tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
1313 add_public_tablegen_target(X86CommonTableGen)
1414
1515 set(sources
0 set(LLVM_TARGET_DEFINITIONS XCore.td)
11
2 tablegen(XCoreGenRegisterInfo.inc -gen-register-info)
3 tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
4 tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
5 tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
6 tablegen(XCoreGenCallingConv.inc -gen-callingconv)
7 tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)
2 llvm_tablegen(XCoreGenRegisterInfo.inc -gen-register-info)
3 llvm_tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
4 llvm_tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
5 llvm_tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
6 llvm_tablegen(XCoreGenCallingConv.inc -gen-callingconv)
7 llvm_tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)
88 add_public_tablegen_target(XCoreCommonTableGen)
99
1010 add_llvm_target(XCoreCodeGen
1919 INTRINSICTD := $(PROJ_SRC_ROOT)/include/llvm/Intrinsics.td
2020 INTRINSICTDS := $(wildcard $(PROJ_SRC_ROOT)/include/llvm/Intrinsics*.td)
2121
22 $(ObjDir)/Intrinsics.gen.tmp: $(ObjDir)/.dir $(INTRINSICTDS) $(TBLGEN)
22 $(ObjDir)/Intrinsics.gen.tmp: $(ObjDir)/.dir $(INTRINSICTDS) $(LLVM_TBLGEN)
2323 $(Echo) Building Intrinsics.gen.tmp from Intrinsics.td
24 $(Verb) $(TableGen) $(call SYSPATH, $(INTRINSICTD)) -o $(call SYSPATH, $@) -gen-intrinsic
24 $(Verb) $(LLVMTableGen) $(call SYSPATH, $(INTRINSICTD)) -o $(call SYSPATH, $@) -gen-intrinsic
2525
2626 $(GENFILE): $(ObjDir)/Intrinsics.gen.tmp
2727 $(Verb) $(CMP) -s $@ $< || ( $(CP) $< $@ && \
0 set(LLVM_REQUIRES_EH 1)
11 set(LLVM_REQUIRES_RTTI 1)
22
3 set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${LLVM_TOOLS_BINARY_DIR})
4
5 add_llvm_utility(tblgen
3 add_tablegen(llvm-tblgen LLVM
64 ARMDecoderEmitter.cpp
75 AsmMatcherEmitter.cpp
86 AsmWriterEmitter.cpp
4139 X86DisassemblerTables.cpp
4240 X86RecognizableInstr.cpp
4341 )
44 target_link_libraries(tblgen LLVMSupport LLVMTableGen)
45 if( MINGW )
46 target_link_libraries(tblgen imagehlp psapi)
47 if(CMAKE_SIZEOF_VOID_P MATCHES "8")
48 set_target_properties(tblgen PROPERTIES LINK_FLAGS -Wl,--stack,16777216)
49 endif(CMAKE_SIZEOF_VOID_P MATCHES "8")
50 endif( MINGW )
51 if( LLVM_ENABLE_THREADS AND HAVE_LIBPTHREAD AND NOT BEOS )
52 target_link_libraries(tblgen pthread)
53 endif()
54
55 install(TARGETS tblgen RUNTIME DESTINATION bin)
77 ##===----------------------------------------------------------------------===##
88
99 LEVEL = ../..
10 TOOLNAME = tblgen
10 TOOLNAME = llvm-tblgen
1111 USEDLIBS = LLVMTableGen.a LLVMSupport.a
1212 REQUIRES_EH := 1
1313 REQUIRES_RTTI := 1