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AMDGPU/GlobalISel: Define instruction mapping for @llvm.maxnum Patch by Tom Stellard git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326567 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
2 changed file(s) with 67 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
358358 switch(MI.getOperand(1).getIntrinsicID()) {
359359 default:
360360 return getInvalidInstructionMapping();
361 case Intrinsic::maxnum:
361362 case Intrinsic::amdgcn_cvt_pkrtz:
362363 return getDefaultMappingVOP(MI);
363364 }
0 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
1 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
2 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
3
4 ---
5 name: maxnum_ss
6 legalized: true
7
8 body: |
9 bb.0:
10 liveins: $sgpr0, $sgpr1
11 ; CHECK-LABEL: name: maxnum_ss
12 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
13 ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
14 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
15 ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.maxnum), [[COPY]](s32), [[COPY2]](s32)
16 %0:_(s32) = COPY $sgpr0
17 %1:_(s32) = COPY $sgpr1
18 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.maxnum.f32), %0, %1
19 ...
20 ---
21 name: maxnum_sv
22 legalized: true
23
24 body: |
25 bb.0:
26 liveins: $sgpr0, $vgpr0
27 ; CHECK-LABEL: name: maxnum_sv
28 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
29 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
30 ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.maxnum), [[COPY]](s32), [[COPY1]](s32)
31 %0:_(s32) = COPY $sgpr0
32 %1:_(s32) = COPY $vgpr0
33 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.maxnum.f32), %0, %1
34 ...
35 ---
36 name: maxnum_vs
37 legalized: true
38
39 body: |
40 bb.0:
41 liveins: $sgpr0, $vgpr0
42 ; CHECK-LABEL: name: maxnum_vs
43 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
44 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
45 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
46 ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.maxnum), [[COPY1]](s32), [[COPY2]](s32)
47 %0:_(s32) = COPY $sgpr0
48 %1:_(s32) = COPY $vgpr0
49 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.maxnum.f32), %1, %0
50 ...
51 ---
52 name: maxnum_vv
53 legalized: true
54
55 body: |
56 bb.0:
57 liveins: $vgpr0, $vgpr1
58 ; CHECK-LABEL: name: maxnum_vv
59 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
60 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
61 ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.maxnum), [[COPY]](s32), [[COPY1]](s32)
62 %0:_(s32) = COPY $vgpr0
63 %1:_(s32) = COPY $vgpr1
64 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.maxnum.f32), %0, %1
65 ...