llvm.org GIT mirror llvm / dddc629
Add support for 128 bit shifts and 32 bit shifts on 16 bit machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8 Duncan Sands 12 years ago
3 changed file(s) with 27 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
2828 // Integer
2929 SHL_I32,
3030 SHL_I64,
31 SHL_I128,
3132 SRL_I32,
3233 SRL_I64,
34 SRL_I128,
3335 SRA_I32,
3436 SRA_I64,
37 SRA_I128,
3538 MUL_I32,
3639 MUL_I64,
3740 MUL_I128,
14531453 }
14541454
14551455 // Otherwise, emit a libcall.
1456 assert(VT == MVT::i64 && "Unsupported shift!");
1457
1458 RTLIB::Libcall LC;
1456 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
14591457 bool isSigned;
14601458 if (N->getOpcode() == ISD::SHL) {
1461 LC = RTLIB::SHL_I64;
14621459 isSigned = false; /*sign irrelevant*/
1460 if (VT == MVT::i32)
1461 LC = RTLIB::SHL_I32;
1462 else if (VT == MVT::i64)
1463 LC = RTLIB::SHL_I64;
1464 else if (VT == MVT::i128)
1465 LC = RTLIB::SHL_I128;
14631466 } else if (N->getOpcode() == ISD::SRL) {
1464 LC = RTLIB::SRL_I64;
14651467 isSigned = false;
1468 if (VT == MVT::i32)
1469 LC = RTLIB::SRL_I32;
1470 else if (VT == MVT::i64)
1471 LC = RTLIB::SRL_I64;
1472 else if (VT == MVT::i128)
1473 LC = RTLIB::SRL_I128;
14661474 } else {
14671475 assert(N->getOpcode() == ISD::SRA && "Unknown shift!");
1468 LC = RTLIB::SRA_I64;
14691476 isSigned = true;
1470 }
1477 if (VT == MVT::i32)
1478 LC = RTLIB::SRA_I32;
1479 else if (VT == MVT::i64)
1480 LC = RTLIB::SRA_I64;
1481 else if (VT == MVT::i128)
1482 LC = RTLIB::SRA_I128;
1483 }
1484 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported shift!");
14711485
14721486 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
14731487 SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned), Lo, Hi);
3030 static void InitLibcallNames(const char **Names) {
3131 Names[RTLIB::SHL_I32] = "__ashlsi3";
3232 Names[RTLIB::SHL_I64] = "__ashldi3";
33 Names[RTLIB::SHL_I128] = "__ashlti3";
3334 Names[RTLIB::SRL_I32] = "__lshrsi3";
3435 Names[RTLIB::SRL_I64] = "__lshrdi3";
36 Names[RTLIB::SRL_I128] = "__lshrti3";
3537 Names[RTLIB::SRA_I32] = "__ashrsi3";
3638 Names[RTLIB::SRA_I64] = "__ashrdi3";
39 Names[RTLIB::SRA_I128] = "__ashrti3";
3740 Names[RTLIB::MUL_I32] = "__mulsi3";
3841 Names[RTLIB::MUL_I64] = "__muldi3";
3942 Names[RTLIB::MUL_I128] = "__multi3";