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[mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation Differential Revision: http://reviews.llvm.org/D14822 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266985 91177308-0d34-0410-b5e6-96231b3b80d8 Zoran Jovanovic 4 years ago
7 changed file(s) with 72 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
108108 ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172)
109109 ELF_RELOC(R_MICROMIPS_PC23_S2, 173)
110110 ELF_RELOC(R_MICROMIPS_PC21_S2, 174)
111 ELF_RELOC(R_MICROMIPS_PC26_S2, 175)
111 ELF_RELOC(R_MICROMIPS_PC26_S1, 175)
112112 ELF_RELOC(R_MICROMIPS_PC18_S3, 176)
113113 ELF_RELOC(R_MICROMIPS_PC19_S2, 177)
114114 ELF_RELOC(R_MIPS_NUM, 218)
159159 return 0;
160160 }
161161 break;
162 case Mips::fixup_MICROMIPS_PC26_S1:
163 // Forcing a signed division because Value can be negative.
164 Value = (int64_t)Value / 2;
165 // We now check if Value can be encoded as a 26-bit signed immediate.
166 if (!isInt<26>(Value) && Ctx) {
167 Ctx->reportFatalError(Fixup.getLoc(), "out of range PC26 fixup");
168 return 0;
169 }
170 break;
171
162172 }
163173
164174 return Value;
310320 { "fixup_MICROMIPS_PC7_S1", 0, 7, MCFixupKindInfo::FKF_IsPCRel },
311321 { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
312322 { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
323 { "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
313324 { "fixup_MICROMIPS_CALL16", 0, 16, 0 },
314325 { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
315326 { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
376387 { "fixup_MICROMIPS_PC7_S1", 9, 7, MCFixupKindInfo::FKF_IsPCRel },
377388 { "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel },
378389 { "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel },
390 { "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
379391 { "fixup_MICROMIPS_CALL16", 16, 16, 0 },
380392 { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
381393 { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
8888 return ELF::R_MICROMIPS_PC10_S1;
8989 case Mips::fixup_MICROMIPS_PC16_S1:
9090 return ELF::R_MICROMIPS_PC16_S1;
91 case Mips::fixup_MICROMIPS_PC26_S1:
92 return ELF::R_MICROMIPS_PC26_S1;
9193 case Mips::fixup_MIPS_PC19_S2:
9294 return ELF::R_MIPS_PC19_S2;
9395 case Mips::fixup_MIPS_PC18_S3:
169169 // resulting in - R_MICROMIPS_PC16_S1
170170 fixup_MICROMIPS_PC16_S1,
171171
172 // resulting in - R_MICROMIPS_PC26_S1
173 fixup_MICROMIPS_PC26_S1,
174
172175 // resulting in - R_MICROMIPS_CALL16
173176 fixup_MICROMIPS_CALL16,
174177
355355 if (MO.isImm())
356356 return MO.getImm() >> 1;
357357
358 // TODO: Push 26 PC fixup.
358 assert(MO.isExpr() &&
359 "getBranchTarget26OpValueMM expects only expressions or immediates");
360
361 const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
362 MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
363 Fixups.push_back(MCFixup::create(0, FixupExpression,
364 MCFixupKind(Mips::fixup_MICROMIPS_PC26_S1)));
359365 return 0;
360366 }
361367
0 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
1 # RUN: -mattr=micromips | FileCheck %s -check-prefix=CHECK-FIXUP
2 # RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
3 # RUN: -mattr=micromips | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
4 #------------------------------------------------------------------------------
5 # Check that the assembler can handle the documented syntax for fixups.
6 #------------------------------------------------------------------------------
7 # CHECK-FIXUP: balc bar # encoding: [0b101101AA,A,A,A]
8 # CHECK-FIXUP: # fixup A - offset: 0,
9 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
10 # CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
11 # CHECK-FIXUP: # fixup A - offset: 0,
12 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
13 #------------------------------------------------------------------------------
14 # Check that the appropriate relocations were created.
15 #------------------------------------------------------------------------------
16 # CHECK-ELF: Relocations [
17 # CHECK-ELF: 0x0 R_MICROMIPS_PC26_S1 bar 0x0
18 # CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
19 # CHECK-ELF: ]
20
21 balc bar
22 bc bar
23
0 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
1 # RUN: -mattr=micromips | FileCheck %s -check-prefix=CHECK-FIXUP
2 # RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
3 # RUN: -mattr=micromips | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
4 #------------------------------------------------------------------------------
5 # Check that the assembler can handle the documented syntax for fixups.
6 #------------------------------------------------------------------------------
7 # CHECK-FIXUP: balc bar # encoding: [0b101101AA,A,A,A]
8 # CHECK-FIXUP: # fixup A - offset: 0,
9 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
10 # CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
11 # CHECK-FIXUP: # fixup A - offset: 0,
12 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
13 #------------------------------------------------------------------------------
14 # Check that the appropriate relocations were created.
15 #------------------------------------------------------------------------------
16 # CHECK-ELF: Relocations [
17 # CHECK-ELF: 0x0 R_MICROMIPS_PC26_S1 bar 0x0
18 # CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
19 # CHECK-ELF: ]
20
21 balc bar
22 bc bar