llvm.org GIT mirror llvm / ddbf053
[SystemZ] Make use of SUBTRACT HALFWORD Thanks to Ulrich Weigand for noticing that this instruction was missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181893 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Sandiford 7 years ago
5 changed file(s) with 237 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
477477 def SGR : BinaryRRE<"sgr", 0xB909, sub, GR64, GR64>;
478478
479479 // Subtraction of memory.
480 defm SH : BinaryRXPair<"sh", 0x4B, 0xE37B, sub, GR32, sextloadi16>;
480481 defm S : BinaryRXPair<"s", 0x5B, 0xE35B, sub, GR32, load>;
481482 def SGF : BinaryRXY<"sgf", 0xE319, sub, GR64, sextloadi32>;
482483 def SG : BinaryRXY<"sg", 0xE309, sub, GR64, load>;
0 ; Test 32-bit subtraction in which the second operand is a sign-extended
1 ; i16 memory value.
2 ;
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5 ; Check the low end of the SH range.
6 define i32 @f1(i32 %lhs, i16 *%src) {
7 ; CHECK: f1:
8 ; CHECK: sh %r2, 0(%r3)
9 ; CHECK: br %r14
10 %half = load i16 *%src
11 %rhs = sext i16 %half to i32
12 %res = sub i32 %lhs, %rhs
13 ret i32 %res
14 }
15
16 ; Check the high end of the aligned SH range.
17 define i32 @f2(i32 %lhs, i16 *%src) {
18 ; CHECK: f2:
19 ; CHECK: sh %r2, 4094(%r3)
20 ; CHECK: br %r14
21 %ptr = getelementptr i16 *%src, i64 2047
22 %half = load i16 *%ptr
23 %rhs = sext i16 %half to i32
24 %res = sub i32 %lhs, %rhs
25 ret i32 %res
26 }
27
28 ; Check the next halfword up, which should use SHY instead of SH.
29 define i32 @f3(i32 %lhs, i16 *%src) {
30 ; CHECK: f3:
31 ; CHECK: shy %r2, 4096(%r3)
32 ; CHECK: br %r14
33 %ptr = getelementptr i16 *%src, i64 2048
34 %half = load i16 *%ptr
35 %rhs = sext i16 %half to i32
36 %res = sub i32 %lhs, %rhs
37 ret i32 %res
38 }
39
40 ; Check the high end of the aligned SHY range.
41 define i32 @f4(i32 %lhs, i16 *%src) {
42 ; CHECK: f4:
43 ; CHECK: shy %r2, 524286(%r3)
44 ; CHECK: br %r14
45 %ptr = getelementptr i16 *%src, i64 262143
46 %half = load i16 *%ptr
47 %rhs = sext i16 %half to i32
48 %res = sub i32 %lhs, %rhs
49 ret i32 %res
50 }
51
52 ; Check the next halfword up, which needs separate address logic.
53 ; Other sequences besides this one would be OK.
54 define i32 @f5(i32 %lhs, i16 *%src) {
55 ; CHECK: f5:
56 ; CHECK: agfi %r3, 524288
57 ; CHECK: sh %r2, 0(%r3)
58 ; CHECK: br %r14
59 %ptr = getelementptr i16 *%src, i64 262144
60 %half = load i16 *%ptr
61 %rhs = sext i16 %half to i32
62 %res = sub i32 %lhs, %rhs
63 ret i32 %res
64 }
65
66 ; Check the high end of the negative aligned SHY range.
67 define i32 @f6(i32 %lhs, i16 *%src) {
68 ; CHECK: f6:
69 ; CHECK: shy %r2, -2(%r3)
70 ; CHECK: br %r14
71 %ptr = getelementptr i16 *%src, i64 -1
72 %half = load i16 *%ptr
73 %rhs = sext i16 %half to i32
74 %res = sub i32 %lhs, %rhs
75 ret i32 %res
76 }
77
78 ; Check the low end of the SHY range.
79 define i32 @f7(i32 %lhs, i16 *%src) {
80 ; CHECK: f7:
81 ; CHECK: shy %r2, -524288(%r3)
82 ; CHECK: br %r14
83 %ptr = getelementptr i16 *%src, i64 -262144
84 %half = load i16 *%ptr
85 %rhs = sext i16 %half to i32
86 %res = sub i32 %lhs, %rhs
87 ret i32 %res
88 }
89
90 ; Check the next halfword down, which needs separate address logic.
91 ; Other sequences besides this one would be OK.
92 define i32 @f8(i32 %lhs, i16 *%src) {
93 ; CHECK: f8:
94 ; CHECK: agfi %r3, -524290
95 ; CHECK: sh %r2, 0(%r3)
96 ; CHECK: br %r14
97 %ptr = getelementptr i16 *%src, i64 -262145
98 %half = load i16 *%ptr
99 %rhs = sext i16 %half to i32
100 %res = sub i32 %lhs, %rhs
101 ret i32 %res
102 }
103
104 ; Check that SH allows an index.
105 define i32 @f9(i32 %lhs, i64 %src, i64 %index) {
106 ; CHECK: f9:
107 ; CHECK: sh %r2, 4094({{%r4,%r3|%r3,%r4}})
108 ; CHECK: br %r14
109 %sub1 = add i64 %src, %index
110 %sub2 = add i64 %sub1, 4094
111 %ptr = inttoptr i64 %sub2 to i16 *
112 %half = load i16 *%ptr
113 %rhs = sext i16 %half to i32
114 %res = sub i32 %lhs, %rhs
115 ret i32 %res
116 }
117
118 ; Check that SHY allows an index.
119 define i32 @f10(i32 %lhs, i64 %src, i64 %index) {
120 ; CHECK: f10:
121 ; CHECK: shy %r2, 4096({{%r4,%r3|%r3,%r4}})
122 ; CHECK: br %r14
123 %sub1 = add i64 %src, %index
124 %sub2 = add i64 %sub1, 4096
125 %ptr = inttoptr i64 %sub2 to i16 *
126 %half = load i16 *%ptr
127 %rhs = sext i16 %half to i32
128 %res = sub i32 %lhs, %rhs
129 ret i32 %res
130 }
48784878 # CHECK: sg %r15, 0
48794879 0xe3 0xf0 0x00 0x00 0x00 0x09
48804880
4881 # CHECK: sh %r0, 0
4882 0x4b 0x00 0x00 0x00
4883
4884 # CHECK: sh %r0, 4095
4885 0x4b 0x00 0x0f 0xff
4886
4887 # CHECK: sh %r0, 0(%r1)
4888 0x4b 0x00 0x10 0x00
4889
4890 # CHECK: sh %r0, 0(%r15)
4891 0x4b 0x00 0xf0 0x00
4892
4893 # CHECK: sh %r0, 4095(%r1,%r15)
4894 0x4b 0x01 0xff 0xff
4895
4896 # CHECK: sh %r0, 4095(%r15,%r1)
4897 0x4b 0x0f 0x1f 0xff
4898
4899 # CHECK: sh %r15, 0
4900 0x4b 0xf0 0x00 0x00
4901
4902 # CHECK: shy %r0, -524288
4903 0xe3 0x00 0x00 0x00 0x80 0x7b
4904
4905 # CHECK: shy %r0, -1
4906 0xe3 0x00 0x0f 0xff 0xff 0x7b
4907
4908 # CHECK: shy %r0, 0
4909 0xe3 0x00 0x00 0x00 0x00 0x7b
4910
4911 # CHECK: shy %r0, 1
4912 0xe3 0x00 0x00 0x01 0x00 0x7b
4913
4914 # CHECK: shy %r0, 524287
4915 0xe3 0x00 0x0f 0xff 0x7f 0x7b
4916
4917 # CHECK: shy %r0, 0(%r1)
4918 0xe3 0x00 0x10 0x00 0x00 0x7b
4919
4920 # CHECK: shy %r0, 0(%r15)
4921 0xe3 0x00 0xf0 0x00 0x00 0x7b
4922
4923 # CHECK: shy %r0, 524287(%r1,%r15)
4924 0xe3 0x01 0xff 0xff 0x7f 0x7b
4925
4926 # CHECK: shy %r0, 524287(%r15,%r1)
4927 0xe3 0x0f 0x1f 0xff 0x7f 0x7b
4928
4929 # CHECK: shy %r15, 0
4930 0xe3 0xf0 0x00 0x00 0x00 0x7b
4931
48814932 # CHECK: slbgr %r0, %r0
48824933 0xb9 0x89 0x00 0x00
48834934
23372337 sgf %r0, 524288
23382338
23392339 #CHECK: error: invalid operand
2340 #CHECK: sh %r0, -1
2341 #CHECK: error: invalid operand
2342 #CHECK: sh %r0, 4096
2343
2344 sh %r0, -1
2345 sh %r0, 4096
2346
2347 #CHECK: error: invalid operand
2348 #CHECK: shy %r0, -524289
2349 #CHECK: error: invalid operand
2350 #CHECK: shy %r0, 524288
2351
2352 shy %r0, -524289
2353 shy %r0, 524288
2354
2355 #CHECK: error: invalid operand
23402356 #CHECK: sl %r0, -1
23412357 #CHECK: error: invalid operand
23422358 #CHECK: sl %r0, 4096
50805080 sgr %r15,%r0
50815081 sgr %r7,%r8
50825082
5083 #CHECK: sh %r0, 0 # encoding: [0x4b,0x00,0x00,0x00]
5084 #CHECK: sh %r0, 4095 # encoding: [0x4b,0x00,0x0f,0xff]
5085 #CHECK: sh %r0, 0(%r1) # encoding: [0x4b,0x00,0x10,0x00]
5086 #CHECK: sh %r0, 0(%r15) # encoding: [0x4b,0x00,0xf0,0x00]
5087 #CHECK: sh %r0, 4095(%r1,%r15) # encoding: [0x4b,0x01,0xff,0xff]
5088 #CHECK: sh %r0, 4095(%r15,%r1) # encoding: [0x4b,0x0f,0x1f,0xff]
5089 #CHECK: sh %r15, 0 # encoding: [0x4b,0xf0,0x00,0x00]
5090
5091 sh %r0, 0
5092 sh %r0, 4095
5093 sh %r0, 0(%r1)
5094 sh %r0, 0(%r15)
5095 sh %r0, 4095(%r1,%r15)
5096 sh %r0, 4095(%r15,%r1)
5097 sh %r15, 0
5098
5099 #CHECK: shy %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x7b]
5100 #CHECK: shy %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x7b]
5101 #CHECK: shy %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x7b]
5102 #CHECK: shy %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x7b]
5103 #CHECK: shy %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x7b]
5104 #CHECK: shy %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x7b]
5105 #CHECK: shy %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x7b]
5106 #CHECK: shy %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x7b]
5107 #CHECK: shy %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x7b]
5108 #CHECK: shy %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x7b]
5109
5110 shy %r0, -524288
5111 shy %r0, -1
5112 shy %r0, 0
5113 shy %r0, 1
5114 shy %r0, 524287
5115 shy %r0, 0(%r1)
5116 shy %r0, 0(%r15)
5117 shy %r0, 524287(%r1,%r15)
5118 shy %r0, 524287(%r15,%r1)
5119 shy %r15, 0
5120
50835121 #CHECK: sl %r0, 0 # encoding: [0x5f,0x00,0x00,0x00]
50845122 #CHECK: sl %r0, 4095 # encoding: [0x5f,0x00,0x0f,0xff]
50855123 #CHECK: sl %r0, 0(%r1) # encoding: [0x5f,0x00,0x10,0x00]