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Manually upgrade the test suite to specify the flag to cttz and ctlz. I followed three heuristics for deciding whether to set 'true' or 'false': - Everything target independent got 'true' as that is the expected common output of the GCC builtins. - If the target arch only has one way of implementing this operation, set the flag in the way that exercises the most of codegen. For most architectures this is also the likely path from a GCC builtin, with 'true' being set. It will (eventually) require lowering away that difference, and then lowering to the architecture's operation. - Otherwise, set the flag differently dependending on which target operation should be tested. Let me know if anyone has any issue with this pattern or would like specific tests of another form. This should allow the x86 codegen to just iteratively improve as I teach the backend how to differentiate between the two forms, and everything else should remain exactly the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146370 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 8 years ago
22 changed file(s) with 107 addition(s) and 107 deletion(s). Raw diff Collapse all Expand all
22 ; RUN: grep {ret i32 0}
33 ; END.
44
5 declare i16 @llvm.cttz.i16(i16)
5 declare i16 @llvm.cttz.i16(i16, i1)
66
77 define i32 @test(i32* %P, i16* %Q) {
88 %A = load i16* %Q ; [#uses=1]
99 %x = load i32* %P ; [#uses=1]
10 %B = call i16 @llvm.cttz.i16( i16 %A ) ; [#uses=1]
10 %B = call i16 @llvm.cttz.i16( i16 %A, i1 true ) ; [#uses=1]
1111 %y = load i32* %P ; [#uses=1]
1212 store i16 %B, i16* %Q
1313 %z = sub i32 %x, %y ; [#uses=1]
0 ; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s
11
2 declare i32 @llvm.ctlz.i32(i32)
2 declare i32 @llvm.ctlz.i32(i32, i1)
33
44 define i32 @test(i32 %x) {
55 ; CHECK: test
66 ; CHECK: clz r0, r0
7 %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x )
7 %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x, i1 true )
88 ret i32 %tmp.1
99 }
0 ; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
11
2 declare i32 @llvm.cttz.i32(i32)
2 declare i32 @llvm.cttz.i32(i32, i1)
33
44 define i32 @f1(i32 %a) {
55 ; CHECK: f1:
66 ; CHECK: rbit
77 ; CHECK: clz
8 %tmp = call i32 @llvm.cttz.i32( i32 %a )
8 %tmp = call i32 @llvm.cttz.i32( i32 %a, i1 true )
99 ret i32 %tmp
1010 }
22 define i32 @f(i32 %a) nounwind readnone optsize ssp {
33 entry:
44 %conv = zext i32 %a to i64
5 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv)
5 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv, i1 true)
66 ; CHECK: clz
77 ; CHECK-NOT: adds
88 %cast = trunc i64 %tmp1 to i32
1010 ret i32 %sub
1111 }
1212
13 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
13 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
33
44 define i32 @main(i64 %arg) nounwind {
55 entry:
6 %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg ) ; [#uses=1]
7 %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg ) ; [#uses=1]
6 %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg, i1 true ) ; [#uses=1]
7 %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg, i1 true ) ; [#uses=1]
88 %tmp57 = tail call i64 @llvm.ctpop.i64( i64 %arg ) ; [#uses=1]
99 %tmp38 = trunc i64 %tmp37 to i32 ; :0 [#uses=1]
1010 %tmp48 = trunc i64 %tmp47 to i32 ; :0 [#uses=1]
1515
1616 declare i32 @printf(i8* noalias , ...) nounwind
1717
18 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
19 declare i64 @llvm.cttz.i64(i64) nounwind readnone
18 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
19 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
2020 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
2020 ret void
2121 }
2222
23 declare i64 @llvm.ctlz.i64(i64)
23 declare i64 @llvm.ctlz.i64(i64, i1)
2424
25 declare i32 @llvm.ctlz.i32(i32)
25 declare i32 @llvm.ctlz.i32(i32, i1)
2626
27 declare i16 @llvm.ctlz.i16(i16)
27 declare i16 @llvm.ctlz.i16(i16, i1)
2828
29 declare i8 @llvm.ctlz.i8(i8)
29 declare i8 @llvm.ctlz.i8(i8, i1)
3030
3131 define void @ctlztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
32 %a = call i8 @llvm.ctlz.i8( i8 %A ) ; [#uses=1]
33 %b = call i16 @llvm.ctlz.i16( i16 %B ) ; [#uses=1]
34 %c = call i32 @llvm.ctlz.i32( i32 %C ) ; [#uses=1]
35 %d = call i64 @llvm.ctlz.i64( i64 %D ) ; > [#uses=1]
32 %a = call i8 @llvm.ctlz.i8( i8 %A, i1 true ) ; > [#uses=1]
33 %b = call i16 @llvm.ctlz.i16( i16 %B, i1 true ) ; [#uses=1]
34 %c = call i32 @llvm.ctlz.i32( i32 %C, i1 true ) ; [#uses=1]
35 %d = call i64 @llvm.ctlz.i64( i64 %D, i1 true ) ; [#uses=1]
3636 store i8 %a, i8* %AP
3737 store i16 %b, i16* %BP
3838 store i32 %c, i32* %CP
4040 ret void
4141 }
4242
43 declare i64 @llvm.cttz.i64(i64)
43 declare i64 @llvm.cttz.i64(i64, i1)
4444
45 declare i32 @llvm.cttz.i32(i32)
45 declare i32 @llvm.cttz.i32(i32, i1)
4646
47 declare i16 @llvm.cttz.i16(i16)
47 declare i16 @llvm.cttz.i16(i16, i1)
4848
49 declare i8 @llvm.cttz.i8(i8)
49 declare i8 @llvm.cttz.i8(i8, i1)
5050
5151 define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
52 %a = call i8 @llvm.cttz.i8( i8 %A ) ; [#uses=1]
53 %b = call i16 @llvm.cttz.i16( i16 %B ) ; [#uses=1]
54 %c = call i32 @llvm.cttz.i32( i32 %C ) ; [#uses=1]
55 %d = call i64 @llvm.cttz.i64( i64 %D ) ; > [#uses=1]
52 %a = call i8 @llvm.cttz.i8( i8 %A, i1 true ) ; > [#uses=1]
53 %b = call i16 @llvm.cttz.i16( i16 %B, i1 true ) ; [#uses=1]
54 %c = call i32 @llvm.cttz.i32( i32 %C, i1 true ) ; [#uses=1]
55 %d = call i64 @llvm.cttz.i64( i64 %D, i1 true ) ; [#uses=1]
5656 store i8 %a, i8* %AP
5757 store i16 %b, i16* %BP
5858 store i32 %c, i32* %CP
22 define i32 @A0(i32 %u) nounwind {
33 entry:
44 ; CHECK: clz
5 call i32 @llvm.ctlz.i32( i32 %u )
5 call i32 @llvm.ctlz.i32( i32 %u, i1 true )
66 ret i32 %0
77 }
88
9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
9 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
22 ; CHECK: clz $2, $4
33 define i32 @t1(i32 %X) nounwind readnone {
44 entry:
5 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
5 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
66 ret i32 %tmp1
77 }
88
9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
9 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
1010
1111 ; CHECK: clz $2, $4
1212 define i32 @t2(i32 %X) nounwind readnone {
1313 entry:
14 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X)
14 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)
1515 ret i32 %tmp1
1616 }
1717
1919 define i32 @t3(i32 %X) nounwind readnone {
2020 entry:
2121 %neg = xor i32 %X, -1
22 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
22 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
2323 ret i32 %tmp1
2424 }
2525
2727 define i32 @t4(i32 %X) nounwind readnone {
2828 entry:
2929 %neg = xor i32 %X, -1
30 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg)
30 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)
3131 ret i32 %tmp1
3232 }
115115 ret i64 %rem
116116 }
117117
118 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
118 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
119119
120120 define i64 @f18(i64 %X) nounwind readnone {
121121 entry:
122122 ; CHECK: dclz $2, $4
123 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X)
123 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
124124 ret i64 %tmp1
125125 }
126126
128128 entry:
129129 ; CHECK: dclo $2, $4
130130 %neg = xor i64 %X, -1
131 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg)
131 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
132132 ret i64 %tmp1
133133 }
134134
11
22 define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
33 %tmp19 = load i64* %t
4 %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; [#uses=1]
4 %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19, i1 true ) ; [#uses=1]
55 %tmp23 = trunc i64 %tmp22 to i32
66 %tmp89 = add i32 %tmp23, -64 ; [#uses=1]
77 %tmp90 = add i32 %tmp89, 0 ; [#uses=1]
88 ret i32 %tmp90
99 }
1010
11 declare i64 @llvm.ctlz.i64(i64)
11 declare i64 @llvm.ctlz.i64(i64, i1)
0 ; Make sure this testcase does not use ctpop
11 ; RUN: llc < %s -march=ppc32 | grep -i cntlzw
22
3 declare i32 @llvm.cttz.i32(i32)
3 declare i32 @llvm.cttz.i32(i32, i1)
44
55 define i32 @bar(i32 %x) {
66 entry:
7 %tmp.1 = call i32 @llvm.cttz.i32( i32 %x ) ; [#uses=1]
7 %tmp.1 = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ; [#uses=1]
88 ret i32 %tmp.1
99 }
1010
22 define i32 @f1(i32 %a) {
33 ; CHECK: f1:
44 ; CHECK: clz r
5 %tmp = tail call i32 @llvm.ctlz.i32(i32 %a)
5 %tmp = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true)
66 ret i32 %tmp
77 }
88
9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
9 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
0 ; RUN: llc < %s -march=x86-64 -mattr=+bmi,+bmi2 | FileCheck %s
11
22 define i32 @t1(i32 %x) nounwind {
3 %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
3 %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false )
44 ret i32 %tmp
55 ; CHECK: t1:
66 ; CHECK: tzcntl
77 }
88
9 declare i32 @llvm.cttz.i32(i32) nounwind readnone
9 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
1010
1111 define i16 @t2(i16 %x) nounwind {
12 %tmp = tail call i16 @llvm.cttz.i16( i16 %x )
12 %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false )
1313 ret i16 %tmp
1414 ; CHECK: t2:
1515 ; CHECK: tzcntw
1616 }
1717
18 declare i16 @llvm.cttz.i16(i16) nounwind readnone
18 declare i16 @llvm.cttz.i16(i16, i1) nounwind readnone
1919
2020 define i64 @t3(i64 %x) nounwind {
21 %tmp = tail call i64 @llvm.cttz.i64( i64 %x )
21 %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false )
2222 ret i64 %tmp
2323 ; CHECK: t3:
2424 ; CHECK: tzcntq
2525 }
2626
27 declare i64 @llvm.cttz.i64(i64) nounwind readnone
27 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
2828
2929 define i8 @t4(i8 %x) nounwind {
30 %tmp = tail call i8 @llvm.cttz.i8( i8 %x )
30 %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 false )
3131 ret i8 %tmp
3232 ; CHECK: t4:
3333 ; CHECK: tzcntw
3434 }
3535
36 declare i8 @llvm.cttz.i8(i8) nounwind readnone
36 declare i8 @llvm.cttz.i8(i8, i1) nounwind readnone
3737
3838 define i32 @andn32(i32 %x, i32 %y) nounwind readnone {
3939 %tmp1 = xor i32 %x, -1
0 ; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
11
22 define i32 @t1(i32 %x) nounwind {
3 %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
3 %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 true )
44 ret i32 %tmp
55 ; CHECK: t1:
66 ; CHECK: bsrl
77 ; CHECK: cmov
88 }
99
10 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
10 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
1111
1212 define i32 @t2(i32 %x) nounwind {
13 %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
13 %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true )
1414 ret i32 %tmp
1515 ; CHECK: t2:
1616 ; CHECK: bsfl
1717 ; CHECK: cmov
1818 }
1919
20 declare i32 @llvm.cttz.i32(i32) nounwind readnone
20 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
2121
2222 define i16 @t3(i16 %x, i16 %y) nounwind {
2323 entry:
2424 %tmp1 = add i16 %x, %y
25 %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1 ) ; [#uses=1]
25 %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1, i1 true ) ; [#uses=1]
2626 ret i16 %tmp2
2727 ; CHECK: t3:
2828 ; CHECK: bsrw
2929 ; CHECK: cmov
3030 }
3131
32 declare i16 @llvm.ctlz.i16(i16) nounwind readnone
32 declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
3333
3434 ; Don't generate the cmovne when the source is known non-zero (and bsr would
3535 ; not set ZF).
4242 ; CHECK-NOT: cmov
4343 ; CHECK: ret
4444 %or = or i32 %n, 1
45 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or)
45 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %or, i1 true)
4646 ret i32 %tmp1
4747 }
0 ; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
11
22 define i32 @t1(i32 %x) nounwind {
3 %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
3 %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 false )
44 ret i32 %tmp
55 ; CHECK: t1:
66 ; CHECK: lzcntl
77 }
88
9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
9 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
1010
1111 define i16 @t2(i16 %x) nounwind {
12 %tmp = tail call i16 @llvm.ctlz.i16( i16 %x )
12 %tmp = tail call i16 @llvm.ctlz.i16( i16 %x, i1 false )
1313 ret i16 %tmp
1414 ; CHECK: t2:
1515 ; CHECK: lzcntw
1616 }
1717
18 declare i16 @llvm.ctlz.i16(i16) nounwind readnone
18 declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
1919
2020 define i64 @t3(i64 %x) nounwind {
21 %tmp = tail call i64 @llvm.ctlz.i64( i64 %x )
21 %tmp = tail call i64 @llvm.ctlz.i64( i64 %x, i1 false )
2222 ret i64 %tmp
2323 ; CHECK: t3:
2424 ; CHECK: lzcntq
2525 }
2626
27 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
27 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
2828
2929 define i8 @t4(i8 %x) nounwind {
30 %tmp = tail call i8 @llvm.ctlz.i8( i8 %x )
30 %tmp = tail call i8 @llvm.ctlz.i8( i8 %x, i1 false )
3131 ret i8 %tmp
3232 ; CHECK: t4:
3333 ; CHECK: lzcntw
3434 }
3535
36 declare i8 @llvm.ctlz.i8(i8) nounwind readnone
36 declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
3737
0 ; RUN: llc < %s -march=x86-64
11
2 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
3 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
2 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
3 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
44 declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
55
66 define <2 x i64> @footz(<2 x i64> %a) nounwind {
7 %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
7 %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 true)
88 ret <2 x i64> %c
99 }
1010 define <2 x i64> @foolz(<2 x i64> %a) nounwind {
11 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
11 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
1212 ret <2 x i64> %c
1313 }
1414 define <2 x i64> @foopop(<2 x i64> %a) nounwind {
1414
1515 declare i64 @llvm.ctpop.i64(i64)
1616
17 declare i8 @llvm.cttz.i8(i8)
17 declare i8 @llvm.cttz.i8(i8, i1)
1818
19 declare i16 @llvm.cttz.i16(i16)
19 declare i16 @llvm.cttz.i16(i16, i1)
2020
21 declare i32 @llvm.cttz.i32(i32)
21 declare i32 @llvm.cttz.i32(i32, i1)
2222
23 declare i64 @llvm.cttz.i64(i64)
23 declare i64 @llvm.cttz.i64(i64, i1)
2424
25 declare i8 @llvm.ctlz.i8(i8)
25 declare i8 @llvm.ctlz.i8(i8, i1)
2626
27 declare i16 @llvm.ctlz.i16(i16)
27 declare i16 @llvm.ctlz.i16(i16, i1)
2828
29 declare i32 @llvm.ctlz.i32(i32)
29 declare i32 @llvm.ctlz.i32(i32, i1)
3030
31 declare i64 @llvm.ctlz.i64(i64)
31 declare i64 @llvm.ctlz.i64(i64, i1)
3232
3333 declare float @llvm.sqrt.f32(float)
3434
4545 call i16 @llvm.ctpop.i16( i16 11 ) ; :6 [#uses=0]
4646 call i32 @llvm.ctpop.i32( i32 12 ) ; :7 [#uses=0]
4747 call i64 @llvm.ctpop.i64( i64 13 ) ; :8 [#uses=0]
48 call i8 @llvm.ctlz.i8( i8 14 ) ; :9 [#uses=0]
49 call i16 @llvm.ctlz.i16( i16 15 ) ; :10 [#uses=0]
50 call i32 @llvm.ctlz.i32( i32 16 ) ; :11 [#uses=0]
51 call i64 @llvm.ctlz.i64( i64 17 ) ; :12 [#uses=0]
52 call i8 @llvm.cttz.i8( i8 18 ) ; :13 [#uses=0]
53 call i16 @llvm.cttz.i16( i16 19 ) ; :14 [#uses=0]
54 call i32 @llvm.cttz.i32( i32 20 ) ; :15 [#uses=0]
55 call i64 @llvm.cttz.i64( i64 21 ) ; :16 [#uses=0]
48 call i8 @llvm.ctlz.i8( i8 14, i1 true ) ; :9 [#uses=0]
49 call i16 @llvm.ctlz.i16( i16 15, i1 true ) ; :10 [#uses=0]
50 call i32 @llvm.ctlz.i32( i32 16, i1 true ) ; :11 [#uses=0]
51 call i64 @llvm.ctlz.i64( i64 17, i1 true ) ; :12 [#uses=0]
52 call i8 @llvm.cttz.i8( i8 18, i1 true ) ; :13 [#uses=0]
53 call i16 @llvm.cttz.i16( i16 19, i1 true ) ; :14 [#uses=0]
54 call i32 @llvm.cttz.i32( i32 20, i1 true ) ; :15 [#uses=0]
55 call i64 @llvm.cttz.i64( i64 21, i1 true ) ; :16 [#uses=0]
5656 ret void
5757 }
5858
0 ; RUN: opt < %s -constprop -S | grep {ret i13 13}
11 ; PR1816
2 declare i13 @llvm.cttz.i13(i13)
2 declare i13 @llvm.cttz.i13(i13, i1)
33
44 define i13 @test() {
5 %X = call i13 @llvm.cttz.i13(i13 0)
5 %X = call i13 @llvm.cttz.i13(i13 0, i1 true)
66 ret i13 %X
77 }
33 ; RUN: grep -v declare | not grep llvm.ct
44
55 declare i31 @llvm.ctpop.i31(i31 %val)
6 declare i32 @llvm.cttz.i32(i32 %val)
7 declare i33 @llvm.ctlz.i33(i33 %val)
6 declare i32 @llvm.cttz.i32(i32 %val, i1)
7 declare i33 @llvm.ctlz.i33(i33 %val, i1)
88
99 define i32 @test(i32 %A) {
1010 %c1 = call i31 @llvm.ctpop.i31(i31 12415124)
11 %c2 = call i32 @llvm.cttz.i32(i32 87359874)
12 %c3 = call i33 @llvm.ctlz.i33(i33 87359874)
11 %c2 = call i32 @llvm.cttz.i32(i32 87359874, i1 true)
12 %c3 = call i33 @llvm.ctlz.i33(i33 87359874, i1 true)
1313 %t1 = zext i31 %c1 to i32
1414 %t3 = trunc i33 %c3 to i32
1515 %r1 = add i32 %t1, %c2
44 declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8)
55 declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8)
66 declare double @llvm.powi.f64(double, i32) nounwind readonly
7 declare i32 @llvm.cttz.i32(i32) nounwind readnone
8 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
7 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
8 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
99 declare i32 @llvm.ctpop.i32(i32) nounwind readnone
10 declare i8 @llvm.ctlz.i8(i8) nounwind readnone
10 declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
1111
1212 define i8 @uaddtest1(i8 %A, i8 %B) {
1313 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
160160 entry:
161161 %or = or i32 %a, 8
162162 %and = and i32 %or, -8
163 %count = tail call i32 @llvm.cttz.i32(i32 %and) nounwind readnone
163 %count = tail call i32 @llvm.cttz.i32(i32 %and, i1 true) nounwind readnone
164164 ret i32 %count
165165 ; CHECK: @cttz
166166 ; CHECK-NEXT: entry:
171171 entry:
172172 %or = or i8 %a, 32
173173 %and = and i8 %or, 63
174 %count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
174 %count = tail call i8 @llvm.ctlz.i8(i8 %and, i1 true) nounwind readnone
175175 ret i8 %count
176176 ; CHECK: @ctlz
177177 ; CHECK-NEXT: entry:
180180
181181 define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
182182 entry:
183 %lz = tail call i32 @llvm.ctlz.i32(i32 %a) nounwind readnone
183 %lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true) nounwind readnone
184184 %lz.cmp = icmp eq i32 %lz, 32
185185 store volatile i1 %lz.cmp, i1* %c
186 %tz = tail call i32 @llvm.cttz.i32(i32 %a) nounwind readnone
186 %tz = tail call i32 @llvm.cttz.i32(i32 %a, i1 true) nounwind readnone
187187 %tz.cmp = icmp ne i32 %tz, 32
188188 store volatile i1 %tz.cmp, i1* %c
189189 %pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
202202
203203
204204 define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
205 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; [#uses=1]
205 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true) ; [#uses=1]
206206 %shr3 = lshr i32 %tmp1, 5 ; [#uses=1]
207207 ret i32 %shr3
208208
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
33
44 declare i32 @llvm.ctpop.i32(i32)
5 declare i32 @llvm.ctlz.i32(i32)
6 declare i32 @llvm.cttz.i32(i32)
5 declare i32 @llvm.ctlz.i32(i32, i1)
6 declare i32 @llvm.cttz.i32(i32, i1)
77
88 define i64 @test1(i32 %x) {
99 %t = call i32 @llvm.ctpop.i32(i32 %x)
1515 }
1616
1717 define i64 @test2(i32 %x) {
18 %t = call i32 @llvm.ctlz.i32(i32 %x)
18 %t = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
1919 %s = sext i32 %t to i64
2020 ret i64 %s
2121
2424 }
2525
2626 define i64 @test3(i32 %x) {
27 %t = call i32 @llvm.cttz.i32(i32 %x)
27 %t = call i32 @llvm.cttz.i32(i32 %x, i1 true)
2828 %s = sext i32 %t to i64
2929 ret i64 %s
3030
55
66 define i32 @x(i32 %b) {
77 entry:
8 %val = call i32 @llvm.cttz.i32(i32 undef)
8 %val = call i32 @llvm.cttz.i32(i32 undef, i1 true)
99 ret i32 %val
1010 }
1111
12 declare i32 @llvm.cttz.i32(i32)
12 declare i32 @llvm.cttz.i32(i32, i1)
1313