llvm.org GIT mirror llvm / dcec526
[mips] [IAS] Make .module directives change AssemblerOptions->front(). Differential Revision: http://reviews.llvm.org/D10643 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241062 91177308-0d34-0410-b5e6-96231b3b80d8 Toma Tabacu 4 years ago
2 changed file(s) with 48 addition(s) and 8 deletion(s). Raw diff Collapse all Expand all
358358 ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
359359 AssemblerOptions.back()->setFeatures(STI.getFeatureBits());
360360 }
361 }
362
363 void setModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
364 setFeatureBits(Feature, FeatureString);
365 AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
366 }
367
368 void clearModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
369 clearFeatureBits(Feature, FeatureString);
370 AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
361371 }
362372
363373 public:
47104720 }
47114721
47124722 if (Option == "oddspreg") {
4713 clearFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
4723 clearModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
47144724
47154725 // Synchronize the abiflags information with the FeatureBits information we
47164726 // changed above.
47344744 return false;
47354745 }
47364746
4737 setFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
4747 setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
47384748
47394749 // Synchronize the abiflags information with the FeatureBits information we
47404750 // changed above.
47994809 StringRef Directive) {
48004810 MCAsmParser &Parser = getParser();
48014811 MCAsmLexer &Lexer = getLexer();
4812 bool ModuleLevelOptions = Directive == ".module";
48024813
48034814 if (Lexer.is(AsmToken::Identifier)) {
48044815 StringRef Value = Parser.getTok().getString();
48154826 }
48164827
48174828 FpABI = MipsABIFlagsSection::FpABIKind::XX;
4818 setFeatureBits(Mips::FeatureFPXX, "fpxx");
4819 clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
4829 if (ModuleLevelOptions) {
4830 setModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
4831 clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
4832 } else {
4833 setFeatureBits(Mips::FeatureFPXX, "fpxx");
4834 clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
4835 }
48204836 return true;
48214837 }
48224838
48364852 }
48374853
48384854 FpABI = MipsABIFlagsSection::FpABIKind::S32;
4839 clearFeatureBits(Mips::FeatureFPXX, "fpxx");
4840 clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
4855 if (ModuleLevelOptions) {
4856 clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
4857 clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
4858 } else {
4859 clearFeatureBits(Mips::FeatureFPXX, "fpxx");
4860 clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
4861 }
48414862 } else {
48424863 FpABI = MipsABIFlagsSection::FpABIKind::S64;
4843 clearFeatureBits(Mips::FeatureFPXX, "fpxx");
4844 setFeatureBits(Mips::FeatureFP64Bit, "fp64");
4864 if (ModuleLevelOptions) {
4865 clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
4866 setModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
4867 } else {
4868 clearFeatureBits(Mips::FeatureFPXX, "fpxx");
4869 setFeatureBits(Mips::FeatureFP64Bit, "fp64");
4870 }
48454871 }
48464872
48474873 return true;
0 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
1 # RUN: FileCheck %s
2
3 .module nooddspreg
4 add.s $f1, $f2, $f4
5 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
6
7 .set oddspreg
8 add.s $f1, $f2, $f4
9 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
10
11 .set mips0
12 add.s $f1, $f2, $f4
13 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers