llvm.org GIT mirror llvm / dcea163
Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen. This fixes 483.xalancbmk (with tail call opt). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95280 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 10 years ago
1 changed file(s) with 14 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
11951195 RVLocs, *DAG.getContext());
11961196 CCInfo.AnalyzeReturn(Outs, RetCC_X86);
11971197
1198 // If this is the first return lowered for this function, add the regs to the
1199 // liveout set for the function.
1200 if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
1201 for (unsigned i = 0; i != RVLocs.size(); ++i)
1202 if (RVLocs[i].isRegLoc())
1203 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg());
1204 }
1198 // Add the regs to the liveout set for the function.
1199 MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo();
1200 for (unsigned i = 0; i != RVLocs.size(); ++i)
1201 if (RVLocs[i].isRegLoc() && !MRI.isLiveOut(RVLocs[i].getLocReg()))
1202 MRI.addLiveOut(RVLocs[i].getLocReg());
12051203
12061204 SDValue Flag;
12071205
12541252 X86MachineFunctionInfo *FuncInfo = MF.getInfo();
12551253 unsigned Reg = FuncInfo->getSRetReturnReg();
12561254 if (!Reg) {
1257 Reg = MF.getRegInfo().createVirtualRegister(getRegClassFor(MVT::i64));
1255 Reg = MRI.createVirtualRegister(getRegClassFor(MVT::i64));
12581256 FuncInfo->setSRetReturnReg(Reg);
12591257 }
12601258 SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
12631261 Flag = Chain.getValue(1);
12641262
12651263 // RAX now acts like a return value.
1266 MF.getRegInfo().addLiveOut(X86::RAX);
1264 MRI.addLiveOut(X86::RAX);
12671265 }
12681266
12691267 RetOps[0] = Chain; // Update chain.
20962094 }
20972095
20982096 if (isTailCall && !WasGlobalOrExternal) {
2099 unsigned Opc = Is64Bit ? X86::R11 : X86::EAX;
2100
2097 // Force the address into a (call preserved) caller-saved register since
2098 // tailcall must happen after callee-saved registers are poped.
2099 // FIXME: Give it a special register class that contains caller-saved
2100 // register instead?
2101 unsigned TCReg = Is64Bit ? X86::R11 : X86::EAX;
21012102 Chain = DAG.getCopyToReg(Chain, dl,
2102 DAG.getRegister(Opc, getPointerTy()),
2103 DAG.getRegister(TCReg, getPointerTy()),
21032104 Callee,InFlag);
2104 Callee = DAG.getRegister(Opc, getPointerTy());
2105 // Add register as live out.
2106 MF.getRegInfo().addLiveOut(Opc);
2105 Callee = DAG.getRegister(TCReg, getPointerTy());
21072106 }
21082107
21092108 // Returns a chain & a flag for retval copy to use.