llvm.org GIT mirror llvm / db6b71b
[GlobalISel][AArch64] Fold G_GEP into LDR/STR ui addressing mode. We're not to the point of supporting the load/store patterns yet (because they extensively use PatFrags). But in the meantime, we can implement some of the simplest addressing modes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298863 91177308-0d34-0410-b5e6-96231b3b80d8 Ahmed Bougacha 3 years ago
3 changed file(s) with 487 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
773773
774774 I.setDesc(TII.get(NewOpc));
775775
776 I.addOperand(MachineOperand::CreateImm(0));
776 uint64_t Offset = 0;
777 auto *PtrMI = MRI.getVRegDef(PtrReg);
778
779 // Try to fold a GEP into our unsigned immediate addressing mode.
780 if (PtrMI->getOpcode() == TargetOpcode::G_GEP) {
781 if (auto COff = getConstantVRegVal(PtrMI->getOperand(2).getReg(), MRI)) {
782 int64_t Imm = *COff;
783 const unsigned Size = MemTy.getSizeInBits() / 8;
784 const unsigned Scale = Log2_32(Size);
785 if ((Imm & (Size - 1)) == 0 && Imm >= 0 && Imm < (0x1000 << Scale)) {
786 unsigned Ptr2Reg = PtrMI->getOperand(1).getReg();
787 I.getOperand(1).setReg(Ptr2Reg);
788 PtrMI = MRI.getVRegDef(Ptr2Reg);
789 Offset = Imm / Size;
790 }
791 }
792 }
793
794 I.addOperand(MachineOperand::CreateImm(Offset));
777795
778796 // If we're storing a 0, use WZR/XZR.
779797 if (auto CVal = getConstantVRegVal(ValReg, MRI)) {
66 define void @load_s32_gpr(i32* %addr) { ret void }
77 define void @load_s16_gpr(i16* %addr) { ret void }
88 define void @load_s8_gpr(i8* %addr) { ret void }
9
10 define void @load_gep_128_s64_gpr(i64* %addr) { ret void }
11 define void @load_gep_512_s32_gpr(i32* %addr) { ret void }
12 define void @load_gep_64_s16_gpr(i16* %addr) { ret void }
13 define void @load_gep_1_s8_gpr(i8* %addr) { ret void }
14
915 define void @load_s64_fpr(i64* %addr) { ret void }
1016 define void @load_s32_fpr(i32* %addr) { ret void }
1117 define void @load_s16_fpr(i16* %addr) { ret void }
1218 define void @load_s8_fpr(i8* %addr) { ret void }
19
20 define void @load_gep_8_s64_fpr(i64* %addr) { ret void }
21 define void @load_gep_16_s32_fpr(i32* %addr) { ret void }
22 define void @load_gep_64_s16_fpr(i16* %addr) { ret void }
23 define void @load_gep_32_s8_fpr(i8* %addr) { ret void }
24
1325 ...
1426
1527 ---
113125 ...
114126
115127 ---
128 # CHECK-LABEL: name: load_gep_128_s64_gpr
129 name: load_gep_128_s64_gpr
130 legalized: true
131 regBankSelected: true
132
133 # CHECK: registers:
134 # CHECK-NEXT: - { id: 0, class: gpr64sp }
135 # CHECK-NEXT: - { id: 1, class: gpr }
136 # CHECK-NEXT: - { id: 2, class: gpr }
137 # CHECK-NEXT: - { id: 3, class: gpr64 }
138 registers:
139 - { id: 0, class: gpr }
140 - { id: 1, class: gpr }
141 - { id: 2, class: gpr }
142 - { id: 3, class: gpr }
143
144 # CHECK: body:
145 # CHECK: %0 = COPY %x0
146 # CHECK: %3 = LDRXui %0, 16 :: (load 8 from %ir.addr)
147 # CHECK: %x0 = COPY %3
148 body: |
149 bb.0:
150 liveins: %x0
151
152 %0(p0) = COPY %x0
153 %1(s64) = G_CONSTANT i64 128
154 %2(p0) = G_GEP %0, %1
155 %3(s64) = G_LOAD %2 :: (load 8 from %ir.addr)
156 %x0 = COPY %3
157 ...
158
159 ---
160 # CHECK-LABEL: name: load_gep_512_s32_gpr
161 name: load_gep_512_s32_gpr
162 legalized: true
163 regBankSelected: true
164
165 # CHECK: registers:
166 # CHECK-NEXT: - { id: 0, class: gpr64sp }
167 # CHECK-NEXT: - { id: 1, class: gpr }
168 # CHECK-NEXT: - { id: 2, class: gpr }
169 # CHECK-NEXT: - { id: 3, class: gpr32 }
170 registers:
171 - { id: 0, class: gpr }
172 - { id: 1, class: gpr }
173 - { id: 2, class: gpr }
174 - { id: 3, class: gpr }
175
176 # CHECK: body:
177 # CHECK: %0 = COPY %x0
178 # CHECK: %3 = LDRWui %0, 128 :: (load 4 from %ir.addr)
179 # CHECK: %w0 = COPY %3
180 body: |
181 bb.0:
182 liveins: %x0
183
184 %0(p0) = COPY %x0
185 %1(s64) = G_CONSTANT i64 512
186 %2(p0) = G_GEP %0, %1
187 %3(s32) = G_LOAD %2 :: (load 4 from %ir.addr)
188 %w0 = COPY %3
189 ...
190
191 ---
192 # CHECK-LABEL: name: load_gep_64_s16_gpr
193 name: load_gep_64_s16_gpr
194 legalized: true
195 regBankSelected: true
196
197 # CHECK: registers:
198 # CHECK-NEXT: - { id: 0, class: gpr64sp }
199 # CHECK-NEXT: - { id: 1, class: gpr }
200 # CHECK-NEXT: - { id: 2, class: gpr }
201 # CHECK-NEXT: - { id: 3, class: gpr32 }
202 registers:
203 - { id: 0, class: gpr }
204 - { id: 1, class: gpr }
205 - { id: 2, class: gpr }
206 - { id: 3, class: gpr }
207
208 # CHECK: body:
209 # CHECK: %0 = COPY %x0
210 # CHECK: %3 = LDRHHui %0, 32 :: (load 2 from %ir.addr)
211 # CHECK: %w0 = COPY %3
212 body: |
213 bb.0:
214 liveins: %x0
215
216 %0(p0) = COPY %x0
217 %1(s64) = G_CONSTANT i64 64
218 %2(p0) = G_GEP %0, %1
219 %3(s16) = G_LOAD %2 :: (load 2 from %ir.addr)
220 %w0 = COPY %3
221 ...
222
223 ---
224 # CHECK-LABEL: name: load_gep_1_s8_gpr
225 name: load_gep_1_s8_gpr
226 legalized: true
227 regBankSelected: true
228
229 # CHECK: registers:
230 # CHECK-NEXT: - { id: 0, class: gpr64sp }
231 # CHECK-NEXT: - { id: 1, class: gpr }
232 # CHECK-NEXT: - { id: 2, class: gpr }
233 # CHECK-NEXT: - { id: 3, class: gpr32 }
234 registers:
235 - { id: 0, class: gpr }
236 - { id: 1, class: gpr }
237 - { id: 2, class: gpr }
238 - { id: 3, class: gpr }
239
240 # CHECK: body:
241 # CHECK: %0 = COPY %x0
242 # CHECK: %3 = LDRBBui %0, 1 :: (load 1 from %ir.addr)
243 # CHECK: %w0 = COPY %3
244 body: |
245 bb.0:
246 liveins: %x0
247
248 %0(p0) = COPY %x0
249 %1(s64) = G_CONSTANT i64 1
250 %2(p0) = G_GEP %0, %1
251 %3(s8) = G_LOAD %2 :: (load 1 from %ir.addr)
252 %w0 = COPY %3
253 ...
254
255 ---
116256 # CHECK-LABEL: name: load_s64_fpr
117257 name: load_s64_fpr
118258 legalized: true
211351 %1(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
212352 %b0 = COPY %1(s8)
213353 ...
354
355 ---
356 # CHECK-LABEL: name: load_gep_8_s64_fpr
357 name: load_gep_8_s64_fpr
358 legalized: true
359 regBankSelected: true
360
361 # CHECK: registers:
362 # CHECK-NEXT: - { id: 0, class: gpr64sp }
363 # CHECK-NEXT: - { id: 1, class: gpr }
364 # CHECK-NEXT: - { id: 2, class: gpr }
365 # CHECK-NEXT: - { id: 3, class: fpr64 }
366 registers:
367 - { id: 0, class: gpr }
368 - { id: 1, class: gpr }
369 - { id: 2, class: gpr }
370 - { id: 3, class: fpr }
371
372 # CHECK: body:
373 # CHECK: %0 = COPY %x0
374 # CHECK: %3 = LDRDui %0, 1 :: (load 8 from %ir.addr)
375 # CHECK: %d0 = COPY %3
376 body: |
377 bb.0:
378 liveins: %x0
379
380 %0(p0) = COPY %x0
381 %1(s64) = G_CONSTANT i64 8
382 %2(p0) = G_GEP %0, %1
383 %3(s64) = G_LOAD %2 :: (load 8 from %ir.addr)
384 %d0 = COPY %3
385 ...
386
387 ---
388 # CHECK-LABEL: name: load_gep_16_s32_fpr
389 name: load_gep_16_s32_fpr
390 legalized: true
391 regBankSelected: true
392
393 # CHECK: registers:
394 # CHECK-NEXT: - { id: 0, class: gpr64sp }
395 # CHECK-NEXT: - { id: 1, class: gpr }
396 # CHECK-NEXT: - { id: 2, class: gpr }
397 # CHECK-NEXT: - { id: 3, class: fpr32 }
398 registers:
399 - { id: 0, class: gpr }
400 - { id: 1, class: gpr }
401 - { id: 2, class: gpr }
402 - { id: 3, class: fpr }
403
404 # CHECK: body:
405 # CHECK: %0 = COPY %x0
406 # CHECK: %3 = LDRSui %0, 4 :: (load 4 from %ir.addr)
407 # CHECK: %s0 = COPY %3
408 body: |
409 bb.0:
410 liveins: %x0
411
412 %0(p0) = COPY %x0
413 %1(s64) = G_CONSTANT i64 16
414 %2(p0) = G_GEP %0, %1
415 %3(s32) = G_LOAD %2 :: (load 4 from %ir.addr)
416 %s0 = COPY %3
417 ...
418
419 ---
420 # CHECK-LABEL: name: load_gep_64_s16_fpr
421 name: load_gep_64_s16_fpr
422 legalized: true
423 regBankSelected: true
424
425 # CHECK: registers:
426 # CHECK-NEXT: - { id: 0, class: gpr64sp }
427 # CHECK-NEXT: - { id: 1, class: gpr }
428 # CHECK-NEXT: - { id: 2, class: gpr }
429 # CHECK-NEXT: - { id: 3, class: fpr16 }
430 registers:
431 - { id: 0, class: gpr }
432 - { id: 1, class: gpr }
433 - { id: 2, class: gpr }
434 - { id: 3, class: fpr }
435
436 # CHECK: body:
437 # CHECK: %0 = COPY %x0
438 # CHECK: %3 = LDRHui %0, 32 :: (load 2 from %ir.addr)
439 # CHECK: %h0 = COPY %3
440 body: |
441 bb.0:
442 liveins: %x0
443
444 %0(p0) = COPY %x0
445 %1(s64) = G_CONSTANT i64 64
446 %2(p0) = G_GEP %0, %1
447 %3(s16) = G_LOAD %2 :: (load 2 from %ir.addr)
448 %h0 = COPY %3
449 ...
450
451 ---
452 # CHECK-LABEL: name: load_gep_32_s8_fpr
453 name: load_gep_32_s8_fpr
454 legalized: true
455 regBankSelected: true
456
457 # CHECK: registers:
458 # CHECK-NEXT: - { id: 0, class: gpr64sp }
459 # CHECK-NEXT: - { id: 1, class: gpr }
460 # CHECK-NEXT: - { id: 2, class: gpr }
461 # CHECK-NEXT: - { id: 3, class: fpr8 }
462 registers:
463 - { id: 0, class: gpr }
464 - { id: 1, class: gpr }
465 - { id: 2, class: gpr }
466 - { id: 3, class: fpr }
467
468 # CHECK: body:
469 # CHECK: %0 = COPY %x0
470 # CHECK: %3 = LDRBui %0, 32 :: (load 1 from %ir.addr)
471 # CHECK: %b0 = COPY %3
472 body: |
473 bb.0:
474 liveins: %x0
475
476 %0(p0) = COPY %x0
477 %1(s64) = G_CONSTANT i64 32
478 %2(p0) = G_GEP %0, %1
479 %3(s8) = G_LOAD %2 :: (load 1 from %ir.addr)
480 %b0 = COPY %3
481 ...
1010 define void @store_zero_s64_gpr(i64* %addr) { ret void }
1111 define void @store_zero_s32_gpr(i32* %addr) { ret void }
1212
13 define void @store_gep_128_s64_gpr(i64* %addr) { ret void }
14 define void @store_gep_512_s32_gpr(i32* %addr) { ret void }
15 define void @store_gep_64_s16_gpr(i16* %addr) { ret void }
16 define void @store_gep_1_s8_gpr(i8* %addr) { ret void }
17
1318 define void @store_s64_fpr(i64* %addr) { ret void }
1419 define void @store_s32_fpr(i32* %addr) { ret void }
20
21 define void @store_gep_8_s64_fpr(i64* %addr) { ret void }
22 define void @store_gep_8_s32_fpr(i32* %addr) { ret void }
1523 ...
1624
1725 ---
175183 ...
176184
177185 ---
186 # CHECK-LABEL: name: store_gep_128_s64_gpr
187 name: store_gep_128_s64_gpr
188 legalized: true
189 regBankSelected: true
190
191 # CHECK: registers:
192 # CHECK-NEXT: - { id: 0, class: gpr64sp }
193 # CHECK-NEXT: - { id: 1, class: gpr64 }
194 # CHECK-NEXT: - { id: 2, class: gpr }
195 # CHECK-NEXT: - { id: 3, class: gpr }
196 registers:
197 - { id: 0, class: gpr }
198 - { id: 1, class: gpr }
199 - { id: 2, class: gpr }
200 - { id: 3, class: gpr }
201
202 # CHECK: body:
203 # CHECK: %0 = COPY %x0
204 # CHECK: %1 = COPY %x1
205 # CHECK: STRXui %1, %0, 16 :: (store 8 into %ir.addr)
206 body: |
207 bb.0:
208 liveins: %x0, %x1
209
210 %0(p0) = COPY %x0
211 %1(s64) = COPY %x1
212 %2(s64) = G_CONSTANT i64 128
213 %3(p0) = G_GEP %0, %2
214 G_STORE %1, %3 :: (store 8 into %ir.addr)
215 ...
216
217 ---
218 # CHECK-LABEL: name: store_gep_512_s32_gpr
219 name: store_gep_512_s32_gpr
220 legalized: true
221 regBankSelected: true
222
223 # CHECK: registers:
224 # CHECK-NEXT: - { id: 0, class: gpr64sp }
225 # CHECK-NEXT: - { id: 1, class: gpr32 }
226 # CHECK-NEXT: - { id: 2, class: gpr }
227 # CHECK-NEXT: - { id: 3, class: gpr }
228 registers:
229 - { id: 0, class: gpr }
230 - { id: 1, class: gpr }
231 - { id: 2, class: gpr }
232 - { id: 3, class: gpr }
233
234 # CHECK: body:
235 # CHECK: %0 = COPY %x0
236 # CHECK: %1 = COPY %w1
237 # CHECK: STRWui %1, %0, 128 :: (store 4 into %ir.addr)
238 body: |
239 bb.0:
240 liveins: %x0, %w1
241
242 %0(p0) = COPY %x0
243 %1(s32) = COPY %w1
244 %2(s64) = G_CONSTANT i64 512
245 %3(p0) = G_GEP %0, %2
246 G_STORE %1, %3 :: (store 4 into %ir.addr)
247 ...
248
249 ---
250 # CHECK-LABEL: name: store_gep_64_s16_gpr
251 name: store_gep_64_s16_gpr
252 legalized: true
253 regBankSelected: true
254
255 # CHECK: registers:
256 # CHECK-NEXT: - { id: 0, class: gpr64sp }
257 # CHECK-NEXT: - { id: 1, class: gpr32 }
258 # CHECK-NEXT: - { id: 2, class: gpr }
259 # CHECK-NEXT: - { id: 3, class: gpr }
260 registers:
261 - { id: 0, class: gpr }
262 - { id: 1, class: gpr }
263 - { id: 2, class: gpr }
264 - { id: 3, class: gpr }
265
266 # CHECK: body:
267 # CHECK: %0 = COPY %x0
268 # CHECK: %1 = COPY %w1
269 # CHECK: STRHHui %1, %0, 32 :: (store 2 into %ir.addr)
270 body: |
271 bb.0:
272 liveins: %x0, %w1
273
274 %0(p0) = COPY %x0
275 %1(s16) = COPY %w1
276 %2(s64) = G_CONSTANT i64 64
277 %3(p0) = G_GEP %0, %2
278 G_STORE %1, %3 :: (store 2 into %ir.addr)
279 ...
280
281 ---
282 # CHECK-LABEL: name: store_gep_1_s8_gpr
283 name: store_gep_1_s8_gpr
284 legalized: true
285 regBankSelected: true
286
287 # CHECK: registers:
288 # CHECK-NEXT: - { id: 0, class: gpr64sp }
289 # CHECK-NEXT: - { id: 1, class: gpr32 }
290 # CHECK-NEXT: - { id: 2, class: gpr }
291 # CHECK-NEXT: - { id: 3, class: gpr }
292 registers:
293 - { id: 0, class: gpr }
294 - { id: 1, class: gpr }
295 - { id: 2, class: gpr }
296 - { id: 3, class: gpr }
297
298 # CHECK: body:
299 # CHECK: %0 = COPY %x0
300 # CHECK: %1 = COPY %w1
301 # CHECK: STRBBui %1, %0, 1 :: (store 1 into %ir.addr)
302 body: |
303 bb.0:
304 liveins: %x0, %w1
305
306 %0(p0) = COPY %x0
307 %1(s8) = COPY %w1
308 %2(s64) = G_CONSTANT i64 1
309 %3(p0) = G_GEP %0, %2
310 G_STORE %1, %3 :: (store 1 into %ir.addr)
311 ...
312
313 ---
178314 # CHECK-LABEL: name: store_s64_fpr
179315 name: store_s64_fpr
180316 legalized: true
227363 G_STORE %1, %0 :: (store 4 into %ir.addr)
228364
229365 ...
366
367 ---
368 # CHECK-LABEL: name: store_gep_8_s64_fpr
369 name: store_gep_8_s64_fpr
370 legalized: true
371 regBankSelected: true
372
373 # CHECK: registers:
374 # CHECK-NEXT: - { id: 0, class: gpr64sp }
375 # CHECK-NEXT: - { id: 1, class: fpr64 }
376 # CHECK-NEXT: - { id: 2, class: gpr }
377 # CHECK-NEXT: - { id: 3, class: gpr }
378 registers:
379 - { id: 0, class: gpr }
380 - { id: 1, class: fpr }
381 - { id: 2, class: gpr }
382 - { id: 3, class: gpr }
383
384 # CHECK: body:
385 # CHECK: %0 = COPY %x0
386 # CHECK: %1 = COPY %d1
387 # CHECK: STRDui %1, %0, 1 :: (store 8 into %ir.addr)
388 body: |
389 bb.0:
390 liveins: %x0, %d1
391
392 %0(p0) = COPY %x0
393 %1(s64) = COPY %d1
394 %2(s64) = G_CONSTANT i64 8
395 %3(p0) = G_GEP %0, %2
396 G_STORE %1, %3 :: (store 8 into %ir.addr)
397 ...
398
399 ---
400 # CHECK-LABEL: name: store_gep_8_s32_fpr
401 name: store_gep_8_s32_fpr
402 legalized: true
403 regBankSelected: true
404
405 # CHECK: registers:
406 # CHECK-NEXT: - { id: 0, class: gpr64sp }
407 # CHECK-NEXT: - { id: 1, class: fpr32 }
408 # CHECK-NEXT: - { id: 2, class: gpr }
409 # CHECK-NEXT: - { id: 3, class: gpr }
410 registers:
411 - { id: 0, class: gpr }
412 - { id: 1, class: fpr }
413 - { id: 2, class: gpr }
414 - { id: 3, class: gpr }
415
416 # CHECK: body:
417 # CHECK: %0 = COPY %x0
418 # CHECK: %1 = COPY %s1
419 # CHECK: STRSui %1, %0, 2 :: (store 4 into %ir.addr)
420 body: |
421 bb.0:
422 liveins: %x0, %s1
423
424 %0(p0) = COPY %x0
425 %1(s32) = COPY %s1
426 %2(s64) = G_CONSTANT i64 8
427 %3(p0) = G_GEP %0, %2
428 G_STORE %1, %3 :: (store 4 into %ir.addr)
429 ...