llvm.org GIT mirror llvm / db31bd3
LocalStackSlotAllocation improvements First, taking advantage of the fact that the virtual base registers are allocated in order of the local frame offsets, remove the quadratic register-searching behavior. Because of the ordering, we only need to check the last virtual base register created. Second, store the frame index in the FrameRef structure, and get the frame index and the local offset from this structure at the top of the loop iteration. This allows us to de-nest the loops in insertFrameReferenceRegisters (and I think makes the code cleaner). I also moved the needsFrameBaseReg check into the first loop over instructions so that we don't bother pushing FrameRefs for instructions that don't want a virtual base register anyway. Lastly, and this is the only functionality change, avoid the creation of single-use virtual base registers. These are currently not useful because, in general, they end up replacing what would be one r+r instruction with an add and a r+i instruction. Committing this removes the XFAIL in CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll Jim has okayed this off-list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180799 91177308-0d34-0410-b5e6-96231b3b80d8 Hal Finkel 7 years ago
3 changed file(s) with 114 addition(s) and 101 deletion(s). Raw diff Collapse all Expand all
4545 class FrameRef {
4646 MachineBasicBlock::iterator MI; // Instr referencing the frame
4747 int64_t LocalOffset; // Local offset of the frame idx referenced
48 int FrameIdx; // The frame index
4849 public:
49 FrameRef(MachineBasicBlock::iterator I, int64_t Offset) :
50 MI(I), LocalOffset(Offset) {}
50 FrameRef(MachineBasicBlock::iterator I, int64_t Offset, int Idx) :
51 MI(I), LocalOffset(Offset), FrameIdx(Idx) {}
5152 bool operator<(const FrameRef &RHS) const {
5253 return LocalOffset < RHS.LocalOffset;
5354 }
54 MachineBasicBlock::iterator getMachineInstr() { return MI; }
55 MachineBasicBlock::iterator getMachineInstr() const { return MI; }
56 int64_t getLocalOffset() const { return LocalOffset; }
57 int getFrameIndex() const { return FrameIdx; }
5558 };
5659
5760 class LocalStackSlotPass: public MachineFunctionPass {
193196 }
194197
195198 static inline bool
196 lookupCandidateBaseReg(const SmallVector, 8> &Regs,
197 std::pair &RegOffset,
199 lookupCandidateBaseReg(int64_t BaseOffset,
198200 int64_t FrameSizeAdjust,
199201 int64_t LocalFrameOffset,
200202 const MachineInstr *MI,
201203 const TargetRegisterInfo *TRI) {
202 unsigned e = Regs.size();
203 for (unsigned i = 0; i < e; ++i) {
204 RegOffset = Regs[i];
205 // Check if the relative offset from the where the base register references
206 // to the target address is in range for the instruction.
207 int64_t Offset = FrameSizeAdjust + LocalFrameOffset - RegOffset.second;
208 if (TRI->isFrameOffsetLegal(MI, Offset))
209 return true;
210 }
211 return false;
204 // Check if the relative offset from the where the base register references
205 // to the target address is in range for the instruction.
206 int64_t Offset = FrameSizeAdjust + LocalFrameOffset - BaseOffset;
207 return TRI->isFrameOffsetLegal(MI, Offset);
212208 }
213209
214210 bool LocalStackSlotPass::insertFrameReferenceRegisters(MachineFunction &Fn) {
231227 // lookup. (For any insn that has more than one FI reference, we arbitrarily
232228 // choose the first one).
233229 SmallVector FrameReferenceInsns;
234
235 // A base register definition is a register + offset pair.
236 SmallVector, 8> BaseRegisters;
237230
238231 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
239232 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) {
257250 // Don't try this with values not in the local block.
258251 if (!MFI->isObjectPreAllocated(MI->getOperand(i).getIndex()))
259252 break;
253 int Idx = MI->getOperand(i).getIndex();
254 int64_t LocalOffset = LocalOffsets[Idx];
255 if (!TRI->needsFrameBaseReg(MI, LocalOffset))
256 break;
260257 FrameReferenceInsns.
261 push_back(FrameRef(MI, LocalOffsets[MI->getOperand(i).getIndex()]));
258 push_back(FrameRef(MI, LocalOffset, Idx));
262259 break;
263260 }
264261 }
270267
271268 MachineBasicBlock *Entry = Fn.begin();
272269
270 unsigned BaseReg = 0;
271 int64_t BaseOffset = 0;
272
273273 // Loop through the frame references and allocate for them as necessary.
274274 for (int ref = 0, e = FrameReferenceInsns.size(); ref < e ; ++ref) {
275 MachineBasicBlock::iterator I =
276 FrameReferenceInsns[ref].getMachineInstr();
275 FrameRef &FR = FrameReferenceInsns[ref];
276 MachineBasicBlock::iterator I = FR.getMachineInstr();
277277 MachineInstr *MI = I;
278 for (unsigned idx = 0, e = MI->getNumOperands(); idx != e; ++idx) {
279 // Consider replacing all frame index operands that reference
280 // an object allocated in the local block.
281 if (MI->getOperand(idx).isFI()) {
282 int FrameIdx = MI->getOperand(idx).getIndex();
283
284 assert(MFI->isObjectPreAllocated(FrameIdx) &&
285 "Only pre-allocated locals expected!");
286
287 DEBUG(dbgs() << "Considering: " << *MI);
288 if (TRI->needsFrameBaseReg(MI, LocalOffsets[FrameIdx])) {
289 unsigned BaseReg = 0;
290 int64_t Offset = 0;
291 int64_t FrameSizeAdjust =
292 StackGrowsDown ? MFI->getLocalFrameSize() : 0;
293
294 DEBUG(dbgs() << " Replacing FI in: " << *MI);
295
296 // If we have a suitable base register available, use it; otherwise
297 // create a new one. Note that any offset encoded in the
298 // instruction itself will be taken into account by the target,
299 // so we don't have to adjust for it here when reusing a base
300 // register.
301 std::pair RegOffset;
302 if (lookupCandidateBaseReg(BaseRegisters, RegOffset,
303 FrameSizeAdjust,
304 LocalOffsets[FrameIdx],
305 MI, TRI)) {
306 DEBUG(dbgs() << " Reusing base register " <<
307 RegOffset.first << "\n");
308 // We found a register to reuse.
309 BaseReg = RegOffset.first;
310 Offset = FrameSizeAdjust + LocalOffsets[FrameIdx] -
311 RegOffset.second;
312 } else {
313 // No previously defined register was in range, so create a
314 // new one.
315 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(MI, idx);
316 const MachineFunction *MF = MI->getParent()->getParent();
317 const TargetRegisterClass *RC = TRI->getPointerRegClass(*MF);
318 BaseReg = Fn.getRegInfo().createVirtualRegister(RC);
319
320 DEBUG(dbgs() << " Materializing base register " << BaseReg <<
321 " at frame local offset " <<
322 LocalOffsets[FrameIdx] + InstrOffset << "\n");
323
324 // Tell the target to insert the instruction to initialize
325 // the base register.
326 // MachineBasicBlock::iterator InsertionPt = Entry->begin();
327 TRI->materializeFrameBaseRegister(Entry, BaseReg, FrameIdx,
328 InstrOffset);
329
330 // The base register already includes any offset specified
331 // by the instruction, so account for that so it doesn't get
332 // applied twice.
333 Offset = -InstrOffset;
334
335 int64_t BaseOffset = FrameSizeAdjust + LocalOffsets[FrameIdx] +
336 InstrOffset;
337 BaseRegisters.push_back(
338 std::pair(BaseReg, BaseOffset));
339 ++NumBaseRegisters;
340 UsedBaseReg = true;
341 }
342 assert(BaseReg != 0 && "Unable to allocate virtual base register!");
343
344 // Modify the instruction to use the new base register rather
345 // than the frame index operand.
346 TRI->resolveFrameIndex(I, BaseReg, Offset);
347 DEBUG(dbgs() << "Resolved: " << *MI);
348
349 ++NumReplacements;
350 }
278 int64_t LocalOffset = FR.getLocalOffset();
279 int FrameIdx = FR.getFrameIndex();
280 assert(MFI->isObjectPreAllocated(FrameIdx) &&
281 "Only pre-allocated locals expected!");
282
283 DEBUG(dbgs() << "Considering: " << *MI);
284
285 unsigned idx = 0;
286 for (unsigned f = MI->getNumOperands(); idx != f; ++idx) {
287 if (!MI->getOperand(idx).isFI())
288 continue;
289
290 if (FrameIdx == I->getOperand(idx).getIndex())
291 break;
292 }
293
294 assert(idx < MI->getNumOperands() && "Cannot find FI operand");
295
296 int64_t Offset = 0;
297 int64_t FrameSizeAdjust = StackGrowsDown ? MFI->getLocalFrameSize() : 0;
298
299 DEBUG(dbgs() << " Replacing FI in: " << *MI);
300
301 // If we have a suitable base register available, use it; otherwise
302 // create a new one. Note that any offset encoded in the
303 // instruction itself will be taken into account by the target,
304 // so we don't have to adjust for it here when reusing a base
305 // register.
306 if (UsedBaseReg && lookupCandidateBaseReg(BaseOffset, FrameSizeAdjust,
307 LocalOffset, MI, TRI)) {
308 DEBUG(dbgs() << " Reusing base register " << BaseReg << "\n");
309 // We found a register to reuse.
310 Offset = FrameSizeAdjust + LocalOffset - BaseOffset;
311 } else {
312 // No previously defined register was in range, so create a // new one.
313
314 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(MI, idx);
315
316 int64_t PrevBaseOffset = BaseOffset;
317 BaseOffset = FrameSizeAdjust + LocalOffset + InstrOffset;
318
319 // We'd like to avoid creating single-use virtual base registers.
320 // Because the FrameRefs are in sorted order, and we've already
321 // processed all FrameRefs before this one, just check whether or not
322 // the next FrameRef will be able to reuse this new register. If not,
323 // then don't bother creating it.
324 bool CanReuse = false;
325 for (int refn = ref + 1; refn < e; ++refn) {
326 FrameRef &FRN = FrameReferenceInsns[refn];
327 MachineBasicBlock::iterator J = FRN.getMachineInstr();
328 MachineInstr *MIN = J;
329
330 CanReuse = lookupCandidateBaseReg(BaseOffset, FrameSizeAdjust,
331 FRN.getLocalOffset(), MIN, TRI);
332 break;
351333 }
352 }
334
335 if (!CanReuse) {
336 BaseOffset = PrevBaseOffset;
337 continue;
338 }
339
340 const MachineFunction *MF = MI->getParent()->getParent();
341 const TargetRegisterClass *RC = TRI->getPointerRegClass(*MF);
342 BaseReg = Fn.getRegInfo().createVirtualRegister(RC);
343
344 DEBUG(dbgs() << " Materializing base register " << BaseReg <<
345 " at frame local offset " << LocalOffset + InstrOffset << "\n");
346
347 // Tell the target to insert the instruction to initialize
348 // the base register.
349 // MachineBasicBlock::iterator InsertionPt = Entry->begin();
350 TRI->materializeFrameBaseRegister(Entry, BaseReg, FrameIdx,
351 InstrOffset);
352
353 // The base register already includes any offset specified
354 // by the instruction, so account for that so it doesn't get
355 // applied twice.
356 Offset = -InstrOffset;
357
358 ++NumBaseRegisters;
359 UsedBaseReg = true;
360 }
361 assert(BaseReg != 0 && "Unable to allocate virtual base register!");
362
363 // Modify the instruction to use the new base register rather
364 // than the frame index operand.
365 TRI->resolveFrameIndex(I, BaseReg, Offset);
366 DEBUG(dbgs() << "Resolved: " << *MI);
367
368 ++NumReplacements;
353369 }
370
354371 return UsedBaseReg;
355372 }
0 ; RUN: llc < %s -march=ppc64 | FileCheck %s
1
2 ; Temporarily XFAIL this test until LSA stops creating single-use
3 ; virtual base registers.
4 ; XFAIL: *
51
62 %struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] }
73 %struct.__mutex_t = type { i32 }
1919
2020 define i32 @test3() {
2121 ; CHECK: test3:
22 ; CHECK: ldr.n r2, LCPI
23 ; CHECK: add sp, r2
22 ; CHECK: ldr.n r1, LCPI
23 ; CHECK: add sp, r1
2424 ; CHECK: ldr.n r1, LCPI
2525 ; CHECK: add r1, sp
2626 ; CHECK: subs r4, r7, #4