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0 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
1 //
2 // This class computes live variables using are sparse implementation based on
3 // the machine code SSA form. This class computes live variable information for
4 // each virtual and physical register in a function. It uses the dominance
5 // properties of SSA form to efficiently compute live variables for virtual
6 // registers, and assumes that physical registers are only live within a single
7 // basic block (allowing it to do a single local analysis to resolve physical
8 // register lifetimes in each basic block).
9 //
10 //===----------------------------------------------------------------------===//
11
12 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
13 #define LLVM_CODEGEN_LIVEVARIABLES_H
14
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include
17
18 class MRegisterInfo;
19
20 class LiveVariables : public MachineFunctionPass {
21 struct VarInfo {
22 /// DefBlock - The basic block which defines this value...
23 MachineBasicBlock *DefBlock;
24 MachineInstr *DefInst;
25
26 /// AliveBlocks - Set of blocks of which this value is alive completely
27 /// through. This is a bit set which uses the basic block number as an
28 /// index.
29 ///
30 std::vector AliveBlocks;
31
32 /// Kills - List of MachineBasicblock's which contain the last use of this
33 /// virtual register (kill it). This also includes the specific instruction
34 /// which kills the value.
35 ///
36 std::vector > Kills;
37
38 VarInfo() : DefBlock(0), DefInst(0) {}
39 };
40
41 /// VirtRegInfo - This list is a mapping from virtual register number to
42 /// variable information. FirstVirtualRegister is subtracted from the virtual
43 /// register number before indexing into this list.
44 ///
45 std::vector VirtRegInfo;
46
47 /// RegistersKilled - This multimap keeps track of all of the registers that
48 /// are dead immediately after an instruction reads its operands. If an
49 /// instruction does not have an entry in this map, it kills no registers.
50 ///
51 std::multimap RegistersKilled;
52
53 /// RegistersDead - This multimap keeps track of all of the registers that are
54 /// dead immediately after an instruction executes, which are not dead after
55 /// the operands are evaluated. In practice, this only contains registers
56 /// which are defined by an instruction, but never used.
57 ///
58 std::multimap RegistersDead;
59
60 private: // Intermediate data structures
61
62 /// BBMap - Maps LLVM basic blocks to their corresponding machine basic block.
63 /// This also provides a numbering of the basic blocks in the function.
64 std::map > BBMap;
65
66 const MRegisterInfo *RegInfo;
67
68 MachineInstr **PhysRegInfo;
69 bool *PhysRegUsed;
70
71 public:
72
73 virtual bool runOnMachineFunction(MachineFunction &MF);
74
75 /// killed_iterator - Iterate over registers killed by a machine instruction
76 ///
77 typedef std::multimap
78 unsigned>::const_iterator killed_iterator;
79
80 /// killed_begin/end - Get access to the range of registers killed by a
81 /// machine instruction.
82 killed_iterator killed_begin(MachineInstr *MI) const {
83 return RegistersKilled.lower_bound(MI);
84 }
85 killed_iterator killed_end(MachineInstr *MI) const {
86 return RegistersKilled.upper_bound(MI);
87 }
88
89 killed_iterator dead_begin(MachineInstr *MI) const {
90 return RegistersDead.lower_bound(MI);
91 }
92 killed_iterator dead_end(MachineInstr *MI) const {
93 return RegistersDead.upper_bound(MI);
94 }
95
96 /// addVirtualRegisterKill - Add information about the fact that the specified
97 /// register is dead after being used by the specified instruction.
98 ///
99 void addVirtualRegisterKill(unsigned IncomingReg, MachineInstr *MI) {
100 RegistersDead.insert(std::make_pair(MI, IncomingReg));
101 }
102
103 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
104 AU.setPreservesAll();
105 }
106
107 virtual void releaseMemory() {
108 VirtRegInfo.clear();
109 RegistersKilled.clear();
110 RegistersDead.clear();
111 }
112 private:
113 VarInfo &getVarInfo(unsigned RegIdx) {
114 if (RegIdx >= VirtRegInfo.size()) {
115 if (RegIdx >= 2*VirtRegInfo.size())
116 VirtRegInfo.resize(RegIdx*2);
117 else
118 VirtRegInfo.resize(2*VirtRegInfo.size());
119 }
120 return VirtRegInfo[RegIdx];
121 }
122
123 void MarkVirtRegAliveInBlock(VarInfo &VRInfo, const BasicBlock *BB);
124 void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
125 MachineInstr *MI);
126 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
127 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
128 };
129
130 #endif
0 //===-- CodeGen/MachineConstantPool.h - Abstract Constant Pool --*- C++ -*-===//
1 //
2 // The MachineConstantPool class keeps track of constants referenced by a
3 // function which must be spilled to memory. This is used for constants which
4 // are unable to be used directly as operands to instructions, which typically
5 // include floating point and large integer constants.
6 //
7 // Instructions reference the address of these constant pool constants through
8 // the use of MO_ConstantPoolIndex values. When emitting assembly or machine
9 // code, these virtual address references are converted to refer to the
10 // address of the function constant pool values.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef LLVM_CODEGEN_MACHINECONSTANTPOOL_H
15 #define LLVM_CODEGEN_MACHINECONSTANTPOOL_H
16
17 #include
18 class Constant;
19
20 class MachineConstantPool {
21 std::vector Constants;
22 public:
23
24 /// getConstantPoolIndex - Create a new entry in the constant pool or return
25 /// an existing one. This should eventually allow sharing of duplicate
26 /// objects in the constant pool, but this is adequate for now.
27 ///
28 unsigned getConstantPoolIndex(Constant *C) {
29 Constants.push_back(C);
30 return Constants.size()-1;
31 }
32
33 const std::vector &getConstants() const { return Constants; }
34
35 /// print - Used by the MachineFunction printer to print information about
36 /// stack objects. Implemented in MachineFunction.cpp
37 ///
38 void print(std::ostream &OS) const;
39
40 /// dump - Call print(std::cerr) to be called from the debugger.
41 void dump() const;
42 };
43
44 #endif
0 //===-- Passes.h - Target independant code generation passes ----*- C++ -*-===//
1 //
2 // This file defines interfaces to access the target independant code generation
3 // passes provided by the LLVM backend.
4 //
5 //===----------------------------------------------------------------------===//
6
7 #ifndef LLVM_CODEGEN_PASSES_H
8 #define LLVM_CODEGEN_PASSES_H
9
10 class Pass;
11 class PassInfo;
12
13 // PHIElimination pass - This pass eliminates machine instruction PHI nodes by
14 // inserting copy instructions. This destroys SSA information, but is the
15 // desired input for some register allocators. This pass is "required" by these
16 // register allocator like this: AU.addRequiredID(PHIEliminationID);
17 //
18 extern const PassInfo *PHIEliminationID;
19
20 /// SimpleRegisterAllocation Pass - This pass converts the input machine code
21 /// from SSA form to use explicit registers by spilling every register. Wow,
22 /// great policy huh?
23 ///
24 Pass *createSimpleRegisterAllocator();
25
26 /// LocalRegisterAllocation Pass - This pass register allocates the input code a
27 /// basic block at a time, yielding code better than the simple register
28 /// allocator, but not as good as a global allocator.
29 ///
30 Pass *createLocalRegisterAllocator();
31
32 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
33 /// and eliminates abstract frame references.
34 ///
35 Pass *createPrologEpilogCodeInserter();
36
37 #endif