llvm.org GIT mirror llvm / da8ac5f
Avoid creating two TargetLowering objects for each target. Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 11 years ago
11 changed file(s) with 22 addition(s) and 33 deletion(s). Raw diff Collapse all Expand all
3838 class ARMDAGToDAGISel : public SelectionDAGISel {
3939 ARMTargetMachine &TM;
4040
41 ARMTargetLowering ARMLowering;
42
4341 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
4442 /// make the right decision when generating code for different targets.
4543 const ARMSubtarget *Subtarget;
4644
4745 public:
4846 explicit ARMDAGToDAGISel(ARMTargetMachine &tm)
49 : SelectionDAGISel(ARMLowering), TM(tm), ARMLowering(tm),
47 : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
5048 Subtarget(&TM.getSubtarget()) {
5149 }
5250
3939 /// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
4040 /// instructions for SelectionDAG operations.
4141 class AlphaDAGToDAGISel : public SelectionDAGISel {
42 AlphaTargetLowering AlphaLowering;
43
4442 static const int64_t IMM_LOW = -32768;
4543 static const int64_t IMM_HIGH = 32767;
4644 static const int64_t IMM_MULT = 65536;
146144
147145 public:
148146 explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
149 : SelectionDAGISel(AlphaLowering),
150 AlphaLowering(*TM.getTargetLowering())
147 : SelectionDAGISel(*TM.getTargetLowering())
151148 {}
152149
153150 /// getI64Imm - Return a target constant with the specified value, of type
3636 /// instructions for SelectionDAG operations.
3737 ///
3838 class IA64DAGToDAGISel : public SelectionDAGISel {
39 IA64TargetLowering IA64Lowering;
4039 unsigned GlobalBaseReg;
4140 public:
4241 explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
43 : SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {}
42 : SelectionDAGISel(*TM.getTargetLowering()) {}
4443
4544 virtual bool runOnFunction(Function &Fn) {
4645 // Make sure we re-emit a set of the global base reg if necessary
5151 /// TM - Keep a reference to MipsTargetMachine.
5252 MipsTargetMachine &TM;
5353
54 /// MipsLowering - This object fully describes how to lower LLVM code to an
55 /// Mips-specific SelectionDAG.
56 MipsTargetLowering MipsLowering;
57
5854 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
5955 /// make the right decision when generating code for different targets.
6056 const MipsSubtarget &Subtarget;
6157
6258 public:
6359 explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
64 SelectionDAGISel(MipsLowering),
65 TM(tm), MipsLowering(*TM.getTargetLowering()),
66 Subtarget(tm.getSubtarget()) {}
60 SelectionDAGISel(*tm.getTargetLowering()),
61 TM(tm), Subtarget(tm.getSubtarget()) {}
6762
6863 virtual void InstructionSelect();
6964
5050 /// TM - Keep a reference to PIC16TargetMachine.
5151 PIC16TargetMachine &TM;
5252
53 /// PIC16Lowering - This object fully describes how to lower LLVM code to an
54 /// PIC16-specific SelectionDAG.
55 PIC16TargetLowering PIC16Lowering;
56
5753 public:
5854 explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
59 SelectionDAGISel(PIC16Lowering),
60 TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
55 SelectionDAGISel(*tm.getTargetLowering()),
56 TM(tm) {}
6157
6258 virtual void InstructionSelect();
6359
4040 ///
4141 class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {
4242 PPCTargetMachine &TM;
43 PPCTargetLowering PPCLowering;
43 PPCTargetLowering &PPCLowering;
4444 const PPCSubtarget &PPCSubTarget;
4545 unsigned GlobalBaseReg;
4646 public:
4747 explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
48 : SelectionDAGISel(PPCLowering), TM(tm),
48 : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
4949 PPCLowering(*TM.getTargetLowering()),
5050 PPCSubTarget(*TM.getSubtargetImpl()) {}
5151
2020 namespace llvm {
2121 class FunctionPass;
2222 class TargetMachine;
23 class SparcTargetMachine;
2324 class raw_ostream;
2425
25 FunctionPass *createSparcISelDag(TargetMachine &TM);
26 FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
2627 FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
2728 FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
2829 FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
2828 ///
2929 namespace {
3030 class SparcDAGToDAGISel : public SelectionDAGISel {
31 SparcTargetLowering Lowering;
32
3331 /// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
3432 /// make the right decision when generating code for different targets.
3533 const SparcSubtarget &Subtarget;
3634 public:
37 explicit SparcDAGToDAGISel(TargetMachine &TM)
38 : SelectionDAGISel(Lowering), Lowering(TM),
35 explicit SparcDAGToDAGISel(SparcTargetMachine &TM)
36 : SelectionDAGISel(*TM.getTargetLowering()),
3937 Subtarget(TM.getSubtarget()) {
4038 }
4139
188186 /// createSparcISelDag - This pass converts a legalized DAG into a
189187 /// SPARC-specific DAG, ready for instruction scheduling.
190188 ///
191 FunctionPass *llvm::createSparcISelDag(TargetMachine &TM) {
189 FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {
192190 return new SparcDAGToDAGISel(TM);
193191 }
2929 ///
3030 SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
3131 : DataLayout("E-p:32:32-f128:128:128"),
32 Subtarget(M, FS), InstrInfo(Subtarget),
32 Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
3333 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
3434 }
3535
1818 #include "llvm/Target/TargetFrameInfo.h"
1919 #include "SparcInstrInfo.h"
2020 #include "SparcSubtarget.h"
21 #include "SparcISelLowering.h"
2122
2223 namespace llvm {
2324
2627 class SparcTargetMachine : public LLVMTargetMachine {
2728 const TargetData DataLayout; // Calculates type size & alignment
2829 SparcSubtarget Subtarget;
30 SparcTargetLowering TLInfo;
2931 SparcInstrInfo InstrInfo;
3032 TargetFrameInfo FrameInfo;
3133
4143 virtual const SparcRegisterInfo *getRegisterInfo() const {
4244 return &InstrInfo.getRegisterInfo();
4345 }
46 virtual SparcTargetLowering* getTargetLowering() const {
47 return const_cast(&TLInfo);
48 }
4449 virtual const TargetData *getTargetData() const { return &DataLayout; }
4550 static unsigned getModuleMatchQuality(const Module &M);
4651
112112
113113 /// X86Lowering - This object fully describes how to lower LLVM code to an
114114 /// X86-specific SelectionDAG.
115 X86TargetLowering X86Lowering;
115 X86TargetLowering &X86Lowering;
116116
117117 /// Subtarget - Keep a pointer to the X86Subtarget around so that we can
118118 /// make the right decision when generating code for different targets.
128128
129129 public:
130130 X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
131 : SelectionDAGISel(X86Lowering, fast),
131 : SelectionDAGISel(*tm.getTargetLowering(), fast),
132132 TM(tm), X86Lowering(*TM.getTargetLowering()),
133133 Subtarget(&TM.getSubtarget()),
134134 OptForSize(false) {}