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Merge -r42152:42153 svn/llvm-project/llvm/trunk git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_21@42154 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 26 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
316316 /// =>
317317 /// ldmdb rn!,
318318 static bool mergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
319 MachineBasicBlock::iterator MBBI) {
319 MachineBasicBlock::iterator MBBI,
320 bool &Advance,
321 MachineBasicBlock::iterator &I) {
320322 MachineInstr *MI = MBBI;
321323 unsigned Base = MI->getOperand(0).getReg();
322324 unsigned Bytes = getLSMultipleTransferSize(MI);
357359 if ((Mode == ARM_AM::ia || Mode == ARM_AM::ib) &&
358360 isMatchingIncrement(NextMBBI, Base, Bytes, Pred, PredReg)) {
359361 MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(Mode, true));
362 if (NextMBBI == I) {
363 Advance = true;
364 ++I;
365 }
360366 MBB.erase(NextMBBI);
361367 return true;
362368 } else if ((Mode == ARM_AM::da || Mode == ARM_AM::db) &&
363369 isMatchingDecrement(NextMBBI, Base, Bytes, Pred, PredReg)) {
364370 MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(Mode, true));
371 if (NextMBBI == I) {
372 Advance = true;
373 ++I;
374 }
365375 MBB.erase(NextMBBI);
366376 return true;
367377 }
388398 if (Mode == ARM_AM::ia &&
389399 isMatchingIncrement(NextMBBI, Base, Bytes, Pred, PredReg)) {
390400 MI->getOperand(1).setImm(ARM_AM::getAM5Opc(ARM_AM::ia, true, Offset));
401 if (NextMBBI == I) {
402 Advance = true;
403 ++I;
404 }
391405 MBB.erase(NextMBBI);
392406 }
393407 return true;
427441 /// register into the LDR/STR/FLD{D|S}/FST{D|S} op when possible:
428442 static bool mergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
429443 MachineBasicBlock::iterator MBBI,
430 const TargetInstrInfo *TII) {
444 const TargetInstrInfo *TII,
445 bool &Advance,
446 MachineBasicBlock::iterator &I) {
431447 MachineInstr *MI = MBBI;
432448 unsigned Base = MI->getOperand(1).getReg();
433449 bool BaseKill = MI->getOperand(1).isKill();
474490 DoMerge = true;
475491 NewOpc = getPostIndexedLoadStoreOpcode(Opcode);
476492 }
477 if (DoMerge)
493 if (DoMerge) {
494 if (NextMBBI == I) {
495 Advance = true;
496 ++I;
497 }
478498 MBB.erase(NextMBBI);
499 }
479500 }
480501
481502 if (!DoMerge)
667688 // Try folding preceeding/trailing base inc/dec into the generated
668689 // LDM/STM ops.
669690 for (unsigned i = 0, e = MBBII.size(); i < e; ++i)
670 if (mergeBaseUpdateLSMultiple(MBB, MBBII[i]))
691 if (mergeBaseUpdateLSMultiple(MBB, MBBII[i], Advance, MBBI))
671692 NumMerges++;
672693 NumMerges += MBBII.size();
673694
675696 // that were not merged to form LDM/STM ops.
676697 for (unsigned i = 0; i != NumMemOps; ++i)
677698 if (!MemOps[i].Merged)
678 if (mergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII))
699 if (mergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI))
679700 NumMerges++;
680701
681702 // RS may be pointing to an instruction that's deleted.