llvm.org GIT mirror llvm / d91446d
Codegen support for i128 SINT_TO_FP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 12 years ago
4 changed file(s) with 60 addition(s) and 21 deletion(s). Raw diff Collapse all Expand all
109109 SINTTOFP_I64_F64,
110110 SINTTOFP_I64_F80,
111111 SINTTOFP_I64_PPCF128,
112 SINTTOFP_I128_F32,
113 SINTTOFP_I128_F64,
114 SINTTOFP_I128_F80,
115 SINTTOFP_I128_PPCF128,
112116 UINTTOFP_I32_F32,
113117 UINTTOFP_I32_F64,
114118 UINTTOFP_I64_F32,
52745274 ///
52755275 SDOperand SelectionDAGLegalize::
52765276 ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
5277 assert(getTypeAction(Source.getValueType()) == Expand &&
5277 MVT::ValueType SourceVT = Source.getValueType();
5278 assert(getTypeAction(SourceVT) == Expand &&
52785279 "This is not an expansion!");
5279 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
52805280
52815281 if (!isSigned) {
5282 assert(Source.getValueType() == MVT::i64 &&
5282 assert(SourceVT == MVT::i64 &&
52835283 "This only works for 64-bit -> FP");
52845284 // The 64-bit value loaded will be incorrectly if the 'sign bit' of the
52855285 // incoming integer is set. To handle this, we dynamically test to see if
52905290 // If this is unsigned, and not supported, first perform the conversion to
52915291 // signed, then adjust the result if the sign bit is set.
52925292 SDOperand SignedConv = ExpandIntToFP(true, DestTy,
5293 DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi));
5293 DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi));
52945294
52955295 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Hi,
52965296 DAG.getConstant(0, Hi.getValueType()),
53005300 SignSet, Four, Zero);
53015301 uint64_t FF = 0x5f800000ULL;
53025302 if (TLI.isLittleEndian()) FF <<= 32;
5303 static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
5303 static Constant *FudgeFactor =
5304 ConstantInt::get(IntegerType::get(Source.getValueSizeInBits()), FF);
53045305
53055306 SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
53065307 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
53225323 // Destination type needs to be expanded as well. The FADD now we are
53235324 // constructing will be expanded into a libcall.
53245325 if (MVT::getSizeInBits(SCVT) != MVT::getSizeInBits(DestTy)) {
5325 assert(SCVT == MVT::i32 && DestTy == MVT::f64);
5326 SignedConv = DAG.getNode(ISD::BUILD_PAIR, MVT::i64,
5326 assert(MVT::getSizeInBits(SCVT) * 2 == MVT::getSizeInBits(DestTy));
5327 SignedConv = DAG.getNode(ISD::BUILD_PAIR, DestTy,
53275328 SignedConv, SignedConv.getValue(1));
53285329 }
53295330 SignedConv = DAG.getNode(ISD::BIT_CONVERT, DestTy, SignedConv);
53325333 }
53335334
53345335 // Check to see if the target has a custom way to lower this. If so, use it.
5335 switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) {
5336 switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
53365337 default: assert(0 && "This action not implemented for this operation!");
53375338 case TargetLowering::Legal:
53385339 case TargetLowering::Expand:
53505351 // the source in case it is shared (this pass of legalize must traverse it).
53515352 SDOperand SrcLo, SrcHi;
53525353 ExpandOp(Source, SrcLo, SrcHi);
5353 Source = DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), SrcLo, SrcHi);
5354 Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi);
53545355
53555356 RTLIB::Libcall LC;
5356 if (DestTy == MVT::f32)
5357 LC = RTLIB::SINTTOFP_I64_F32;
5358 else {
5359 assert(DestTy == MVT::f64 && "Unknown fp value type!");
5360 LC = RTLIB::SINTTOFP_I64_F64;
5357 if (SourceVT == MVT::i64) {
5358 if (DestTy == MVT::f32)
5359 LC = RTLIB::SINTTOFP_I64_F32;
5360 else {
5361 assert(DestTy == MVT::f64 && "Unknown fp value type!");
5362 LC = RTLIB::SINTTOFP_I64_F64;
5363 }
5364 } else if (SourceVT == MVT::i128) {
5365 if (DestTy == MVT::f32)
5366 LC = RTLIB::SINTTOFP_I128_F32;
5367 else if (DestTy == MVT::f64)
5368 LC = RTLIB::SINTTOFP_I128_F64;
5369 else if (DestTy == MVT::f80)
5370 LC = RTLIB::SINTTOFP_I128_F80;
5371 else {
5372 assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
5373 LC = RTLIB::SINTTOFP_I128_PPCF128;
5374 }
5375 } else {
5376 assert(0 && "Unknown int value type");
53615377 }
53625378
53635379 assert(TLI.getLibcallName(LC) && "Don't know how to expand this SINT_TO_FP!");
966966 SDOperand DAGTypeLegalizer::ExpandOperand_SINT_TO_FP(SDOperand Source,
967967 MVT::ValueType DestTy) {
968968 // We know the destination is legal, but that the input needs to be expanded.
969 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
969 MVT::ValueType SourceVT = Source.getValueType();
970970
971971 // Check to see if the target has a custom way to lower this. If so, use it.
972 switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) {
972 switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
973973 default: assert(0 && "This action not implemented for this operation!");
974974 case TargetLowering::Legal:
975975 case TargetLowering::Expand:
982982 }
983983
984984 RTLIB::Libcall LC;
985 if (DestTy == MVT::f32)
986 LC = RTLIB::SINTTOFP_I64_F32;
987 else {
988 assert(DestTy == MVT::f64 && "Unknown fp value type!");
989 LC = RTLIB::SINTTOFP_I64_F64;
985 if (SourceVT == MVT::i64) {
986 if (DestTy == MVT::f32)
987 LC = RTLIB::SINTTOFP_I64_F32;
988 else {
989 assert(DestTy == MVT::f64 && "Unknown fp value type!");
990 LC = RTLIB::SINTTOFP_I64_F64;
991 }
992 } else if (SourceVT == MVT::i128) {
993 if (DestTy == MVT::f32)
994 LC = RTLIB::SINTTOFP_I128_F32;
995 else if (DestTy == MVT::f64)
996 LC = RTLIB::SINTTOFP_I128_F64;
997 else if (DestTy == MVT::f80)
998 LC = RTLIB::SINTTOFP_I128_F80;
999 else {
1000 assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
1001 LC = RTLIB::SINTTOFP_I128_PPCF128;
1002 }
1003 } else {
1004 assert(0 && "Unknown int value type!");
9901005 }
9911006
9921007 assert(0 && "FIXME: no libcalls yet!");
106106 Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
107107 Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
108108 Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
109 Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
110 Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
111 Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
112 Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
109113 Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
110114 Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
111115 Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";