llvm.org GIT mirror llvm / d89d518
Add comment; refactor; avoid pulling in DT if it's not used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93306 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 10 years ago
1 changed file(s) with 110 addition(s) and 79 deletion(s). Raw diff Collapse all Expand all
33 //
44 // This file is distributed under the University of Illinois Open Source
55 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass performs optimization of sign / zero extension instructions. It
10 // may be extended to handle other instructions of similar property.
11 //
12 // On some targets, some instructions, e.g. X86 sign / zero extension, may
13 // leave the source value in the lower part of the result. This pass will
14 // replace (some) uses of the pre-extension value with uses of the sub-register
15 // of the results.
616 //
717 //===----------------------------------------------------------------------===//
818
3949 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
4050 AU.setPreservesCFG();
4151 MachineFunctionPass::getAnalysisUsage(AU);
42 AU.addRequired();
43 AU.addPreserved();
52 if (Aggressive) {
53 AU.addRequired();
54 AU.addPreserved();
55 }
4456 }
57
58 private:
59 bool OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
60 SmallPtrSet &LocalMIs);
4561 };
4662 }
4763
5167
5268 FunctionPass *llvm::createOptimizeExtsPass() { return new OptimizeExts(); }
5369
70 /// OptimizeInstr - If instruction is a copy-like instruction, i.e. it reads
71 /// a single register and writes a single register and it does not modify
72 /// the source, and if the source value is preserved as a sub-register of
73 /// the result, then replace all reachable uses of the source with the subreg
74 /// of the result.
75 bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
76 SmallPtrSet &LocalMIs) {
77 bool Changed = false;
78 LocalMIs.insert(MI);
79
80 unsigned SrcReg, DstReg, SubIdx;
81 if (TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) {
82 if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
83 TargetRegisterInfo::isPhysicalRegister(SrcReg))
84 return false;
85
86 MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg);
87 if (++UI == MRI->use_end())
88 // No other uses.
89 return false;
90
91 // Ok, the source has other uses. See if we can replace the other uses
92 // with use of the result of the extension.
93 SmallPtrSet ReachedBBs;
94 UI = MRI->use_begin(DstReg);
95 for (MachineRegisterInfo::use_iterator UE = MRI->use_end(); UI != UE;
96 ++UI)
97 ReachedBBs.insert(UI->getParent());
98
99 bool ExtendLife = true;
100 // Uses that are in the same BB of uses of the result of the instruction.
101 SmallVector Uses;
102 // Uses that the result of the instruction can reach.
103 SmallVector ExtendedUses;
104
105 UI = MRI->use_begin(SrcReg);
106 for (MachineRegisterInfo::use_iterator UE = MRI->use_end(); UI != UE;
107 ++UI) {
108 MachineOperand &UseMO = UI.getOperand();
109 MachineInstr *UseMI = &*UI;
110 if (UseMI == MI)
111 continue;
112 MachineBasicBlock *UseMBB = UseMI->getParent();
113 if (UseMBB == MBB) {
114 // Local uses that come after the extension.
115 if (!LocalMIs.count(UseMI))
116 Uses.push_back(&UseMO);
117 } else if (ReachedBBs.count(UseMBB))
118 // Non-local uses where the result of extension is used. Always
119 // replace these.
120 Uses.push_back(&UseMO);
121 else if (Aggressive && DT->dominates(MBB, UseMBB))
122 // We may want to extend live range of the extension result in order
123 // to replace these uses.
124 ExtendedUses.push_back(&UseMO);
125 else {
126 // Both will be live out of the def MBB anyway. Don't extend live
127 // range of the extension result.
128 ExtendLife = false;
129 break;
130 }
131 }
132
133 if (ExtendLife && !ExtendedUses.empty())
134 // Ok, we'll extend the liveness of the extension result.
135 std::copy(ExtendedUses.begin(), ExtendedUses.end(),
136 std::back_inserter(Uses));
137
138 // Now replace all uses.
139 if (!Uses.empty()) {
140 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
141 for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
142 MachineOperand *UseMO = Uses[i];
143 MachineInstr *UseMI = UseMO->getParent();
144 MachineBasicBlock *UseMBB = UseMI->getParent();
145 unsigned NewVR = MRI->createVirtualRegister(RC);
146 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
147 TII->get(TargetInstrInfo::EXTRACT_SUBREG), NewVR)
148 .addReg(DstReg).addImm(SubIdx);
149 UseMO->setReg(NewVR);
150 ++NumReuse;
151 Changed = true;
152 }
153 }
154 }
155
156 return Changed;
157 }
158
54159 bool OptimizeExts::runOnMachineFunction(MachineFunction &MF) {
55160 TM = &MF.getTarget();
56161 TII = TM->getInstrInfo();
57162 MRI = &MF.getRegInfo();
58 DT = &getAnalysis();
163 DT = Aggressive ? &getAnalysis() : 0;
59164
60165 bool Changed = false;
61166
62167 SmallPtrSet LocalMIs;
63168 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
64169 MachineBasicBlock *MBB = &*I;
170 LocalMIs.clear();
65171 for (MachineBasicBlock::iterator MII = I->begin(), ME = I->end(); MII != ME;
66172 ++MII) {
67173 MachineInstr *MI = &*MII;
68 LocalMIs.insert(MI);
69
70 unsigned SrcReg, DstReg, SubIdx;
71 if (TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) {
72 if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
73 TargetRegisterInfo::isPhysicalRegister(SrcReg))
74 continue;
75
76 MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg);
77 if (++UI == MRI->use_end())
78 // No other uses.
79 continue;
80
81 // Ok, the source has other uses. See if we can replace the other uses
82 // with use of the result of the extension.
83
84 SmallPtrSet ReachedBBs;
85 UI = MRI->use_begin(DstReg);
86 for (MachineRegisterInfo::use_iterator UE = MRI->use_end(); UI != UE;
87 ++UI)
88 ReachedBBs.insert(UI->getParent());
89
90 bool ExtendLife = true;
91 SmallVector Uses;
92 SmallVector ExtendedUses;
93
94 UI = MRI->use_begin(SrcReg);
95 for (MachineRegisterInfo::use_iterator UE = MRI->use_end(); UI != UE;
96 ++UI) {
97 MachineOperand &UseMO = UI.getOperand();
98 MachineInstr *UseMI = &*UI;
99 if (UseMI == MI)
100 continue;
101 MachineBasicBlock *UseMBB = UseMI->getParent();
102 if (UseMBB == MBB) {
103 // Local uses that come after the extension.
104 if (!LocalMIs.count(UseMI))
105 Uses.push_back(&UseMO);
106 } else if (ReachedBBs.count(UseMBB))
107 // Non-local uses where the result of extension is used. Always
108 // replace these.
109 Uses.push_back(&UseMO);
110 else if (Aggressive && DT->dominates(MBB, UseMBB))
111 // We may want to extend live range of the extension result in order
112 // to replace these uses.
113 ExtendedUses.push_back(&UseMO);
114 else {
115 // Both will be live out of the def MBB anyway. Don't extend live
116 // range of the extension result.
117 ExtendLife = false;
118 break;
119 }
120 }
121
122 if (ExtendLife && !ExtendedUses.empty())
123 // Ok, we'll extend the liveness of the extension result.
124 std::copy(ExtendedUses.begin(), ExtendedUses.end(),
125 std::back_inserter(Uses));
126
127 // Now replace all uses.
128 if (!Uses.empty()) {
129 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
130 for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
131 MachineOperand *UseMO = Uses[i];
132 MachineInstr *UseMI = UseMO->getParent();
133 MachineBasicBlock *UseMBB = UseMI->getParent();
134 unsigned NewVR = MRI->createVirtualRegister(RC);
135 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
136 TII->get(TargetInstrInfo::EXTRACT_SUBREG), NewVR)
137 .addReg(DstReg).addImm(SubIdx);
138 UseMO->setReg(NewVR);
139 ++NumReuse;
140 Changed = true;
141 }
142 }
143 }
174 Changed |= OptimizeInstr(MI, MBB, LocalMIs);
144175 }
145176 }
146177