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Merging r368324: ------------------------------------------------------------------------ r368324 | ctopper | 2019-08-08 20:11:17 +0200 (Thu, 08 Aug 2019) | 7 lines [X86] Make CMPXCHG16B feature imply CMPXCHG8B feature. This fixes znver1 so that it properly enables CMPXHG8B. We can probably remove explicit CMPXCHG8B from CPUs that also have CMPXCHG16B, but keeping this simple to allow cherry pick to 9.0. Fixes PR42935. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@368423 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 1 year, 3 months ago
2 changed file(s) with 3 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
9494 def Feature64Bit : SubtargetFeature<"64bit", "HasX86_64", "true",
9595 "Support 64-bit instructions">;
9696 def FeatureCMPXCHG16B : SubtargetFeature<"cx16", "HasCmpxchg16b", "true",
97 "64-bit with cmpxchg16b">;
97 "64-bit with cmpxchg16b",
98 [FeatureCMPXCHG8B]>;
9899 def FeatureSlowSHLD : SubtargetFeature<"slow-shld", "IsSHLDSlow", "true",
99100 "SHLD instruction is slow">;
100101 def FeatureSlowPMULLD : SubtargetFeature<"slow-pmulld", "IsPMULLDSlow", "true",
11 ; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X86
22 ; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK,X64
33 ; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefixes=I486
4 ; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,X86
45
56 ; Basic 64-bit cmpxchg
67 define void @t1(i64* nocapture %p) nounwind ssp {