llvm.org GIT mirror llvm / d6663f5
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch This also uses TSFlags to mark machine instructions that are surface/texture accesses, as well as the vector width for surface operations. This is used to simplify some of the switch statements that need to detect surface/texture instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213256 91177308-0d34-0410-b5e6-96231b3b80d8 Justin Holewinski 6 years ago
14 changed file(s) with 8492 addition(s) and 921 deletion(s). Raw diff Collapse all Expand all
10401040
10411041
10421042 // Texture Fetch
1043 def int_nvvm_tex_1d_v4f32_i32
1043 // texmode_independent
1044 def int_nvvm_tex_1d_v4f32_s32
10441045 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
10451046 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [],
1046 "llvm.nvvm.tex.1d.v4f32.i32">;
1047 "llvm.nvvm.tex.1d.v4f32.s32">;
10471048 def int_nvvm_tex_1d_v4f32_f32
10481049 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
10491050 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty], [],
10571058 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
10581059 llvm_float_ty], [],
10591060 "llvm.nvvm.tex.1d.grad.v4f32.f32">;
1060 def int_nvvm_tex_1d_v4i32_i32
1061 def int_nvvm_tex_1d_v4s32_s32
10611062 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
10621063 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [],
1063 "llvm.nvvm.tex.1d.v4i32.i32">;
1064 def int_nvvm_tex_1d_v4i32_f32
1064 "llvm.nvvm.tex.1d.v4s32.s32">;
1065 def int_nvvm_tex_1d_v4s32_f32
10651066 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
10661067 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty], [],
1067 "llvm.nvvm.tex.1d.v4i32.f32">;
1068 def int_nvvm_tex_1d_level_v4i32_f32
1068 "llvm.nvvm.tex.1d.v4s32.f32">;
1069 def int_nvvm_tex_1d_level_v4s32_f32
10691070 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
10701071 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1071 "llvm.nvvm.tex.1d.level.v4i32.f32.level">;
1072 def int_nvvm_tex_1d_grad_v4i32_f32
1072 "llvm.nvvm.tex.1d.level.v4s32.f32">;
1073 def int_nvvm_tex_1d_grad_v4s32_f32
10731074 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
10741075 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
10751076 llvm_float_ty], [],
1076 "llvm.nvvm.tex.1d.grad.v4i32.f32">;
1077
1078 def int_nvvm_tex_1d_array_v4f32_i32
1077 "llvm.nvvm.tex.1d.grad.v4s32.f32">;
1078 def int_nvvm_tex_1d_v4u32_s32
1079 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1080 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [],
1081 "llvm.nvvm.tex.1d.v4u32.s32">;
1082 def int_nvvm_tex_1d_v4u32_f32
1083 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1084 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty], [],
1085 "llvm.nvvm.tex.1d.v4u32.f32">;
1086 def int_nvvm_tex_1d_level_v4u32_f32
1087 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1088 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1089 "llvm.nvvm.tex.1d.level.v4u32.f32">;
1090 def int_nvvm_tex_1d_grad_v4u32_f32
1091 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1092 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1093 llvm_float_ty], [],
1094 "llvm.nvvm.tex.1d.grad.v4u32.f32">;
1095
1096 def int_nvvm_tex_1d_array_v4f32_s32
10791097 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
10801098 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1081 "llvm.nvvm.tex.1d.array.v4f32.i32">;
1099 "llvm.nvvm.tex.1d.array.v4f32.s32">;
10821100 def int_nvvm_tex_1d_array_v4f32_f32
10831101 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
10841102 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
10931111 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
10941112 llvm_float_ty, llvm_float_ty], [],
10951113 "llvm.nvvm.tex.1d.array.grad.v4f32.f32">;
1096 def int_nvvm_tex_1d_array_v4i32_i32
1114 def int_nvvm_tex_1d_array_v4s32_s32
10971115 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
10981116 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1099 "llvm.nvvm.tex.1d.array.v4i32.i32">;
1100 def int_nvvm_tex_1d_array_v4i32_f32
1117 "llvm.nvvm.tex.1d.array.v4s32.s32">;
1118 def int_nvvm_tex_1d_array_v4s32_f32
11011119 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11021120 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
1103 "llvm.nvvm.tex.1d.array.v4i32.f32">;
1104 def int_nvvm_tex_1d_array_level_v4i32_f32
1121 "llvm.nvvm.tex.1d.array.v4s32.f32">;
1122 def int_nvvm_tex_1d_array_level_v4s32_f32
11051123 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11061124 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11071125 llvm_float_ty], [],
1108 "llvm.nvvm.tex.1d.array.level.v4i32.f32">;
1109 def int_nvvm_tex_1d_array_grad_v4i32_f32
1126 "llvm.nvvm.tex.1d.array.level.v4s32.f32">;
1127 def int_nvvm_tex_1d_array_grad_v4s32_f32
11101128 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11111129 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11121130 llvm_float_ty, llvm_float_ty], [],
1113 "llvm.nvvm.tex.1d.array.grad.v4i32.f32">;
1114
1115 def int_nvvm_tex_2d_v4f32_i32
1116 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1131 "llvm.nvvm.tex.1d.array.grad.v4s32.f32">;
1132 def int_nvvm_tex_1d_array_v4u32_s32
1133 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11171134 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1118 "llvm.nvvm.tex.2d.v4f32.i32">;
1135 "llvm.nvvm.tex.1d.array.v4u32.s32">;
1136 def int_nvvm_tex_1d_array_v4u32_f32
1137 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1138 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
1139 "llvm.nvvm.tex.1d.array.v4u32.f32">;
1140 def int_nvvm_tex_1d_array_level_v4u32_f32
1141 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1142 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1143 llvm_float_ty], [],
1144 "llvm.nvvm.tex.1d.array.level.v4u32.f32">;
1145 def int_nvvm_tex_1d_array_grad_v4u32_f32
1146 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1147 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1148 llvm_float_ty, llvm_float_ty], [],
1149 "llvm.nvvm.tex.1d.array.grad.v4u32.f32">;
1150
1151 def int_nvvm_tex_2d_v4f32_s32
1152 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1153 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1154 "llvm.nvvm.tex.2d.v4f32.s32">;
11191155 def int_nvvm_tex_2d_v4f32_f32
11201156 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
11211157 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
11301166 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
11311167 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
11321168 "llvm.nvvm.tex.2d.grad.v4f32.f32">;
1133 def int_nvvm_tex_2d_v4i32_i32
1169 def int_nvvm_tex_2d_v4s32_s32
11341170 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11351171 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1136 "llvm.nvvm.tex.2d.v4i32.i32">;
1137 def int_nvvm_tex_2d_v4i32_f32
1172 "llvm.nvvm.tex.2d.v4s32.s32">;
1173 def int_nvvm_tex_2d_v4s32_f32
11381174 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11391175 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1140 "llvm.nvvm.tex.2d.v4i32.f32">;
1141 def int_nvvm_tex_2d_level_v4i32_f32
1176 "llvm.nvvm.tex.2d.v4s32.f32">;
1177 def int_nvvm_tex_2d_level_v4s32_f32
11421178 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11431179 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
11441180 llvm_float_ty], [],
1145 "llvm.nvvm.tex.2d.level.v4i32.f32">;
1146 def int_nvvm_tex_2d_grad_v4i32_f32
1181 "llvm.nvvm.tex.2d.level.v4s32.f32">;
1182 def int_nvvm_tex_2d_grad_v4s32_f32
11471183 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11481184 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
11491185 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1150 "llvm.nvvm.tex.2d.grad.v4i32.f32">;
1151
1152 def int_nvvm_tex_2d_array_v4f32_i32
1186 "llvm.nvvm.tex.2d.grad.v4s32.f32">;
1187 def int_nvvm_tex_2d_v4u32_s32
1188 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1189 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1190 "llvm.nvvm.tex.2d.v4u32.s32">;
1191 def int_nvvm_tex_2d_v4u32_f32
1192 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1193 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1194 "llvm.nvvm.tex.2d.v4u32.f32">;
1195 def int_nvvm_tex_2d_level_v4u32_f32
1196 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1197 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1198 llvm_float_ty], [],
1199 "llvm.nvvm.tex.2d.level.v4u32.f32">;
1200 def int_nvvm_tex_2d_grad_v4u32_f32
1201 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1202 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1203 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1204 "llvm.nvvm.tex.2d.grad.v4u32.f32">;
1205
1206 def int_nvvm_tex_2d_array_v4f32_s32
11531207 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
11541208 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
11551209 llvm_i32_ty], [],
1156 "llvm.nvvm.tex.2d.array.v4f32.i32">;
1210 "llvm.nvvm.tex.2d.array.v4f32.s32">;
11571211 def int_nvvm_tex_2d_array_v4f32_f32
11581212 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
11591213 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11701224 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
11711225 llvm_float_ty], [],
11721226 "llvm.nvvm.tex.2d.array.grad.v4f32.f32">;
1173 def int_nvvm_tex_2d_array_v4i32_i32
1227 def int_nvvm_tex_2d_array_v4s32_s32
11741228 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11751229 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
11761230 llvm_i32_ty], [],
1177 "llvm.nvvm.tex.2d.array.v4i32.i32">;
1178 def int_nvvm_tex_2d_array_v4i32_f32
1231 "llvm.nvvm.tex.2d.array.v4s32.s32">;
1232 def int_nvvm_tex_2d_array_v4s32_f32
11791233 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11801234 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11811235 llvm_float_ty], [],
1182 "llvm.nvvm.tex.2d.array.v4i32.f32">;
1183 def int_nvvm_tex_2d_array_level_v4i32_f32
1236 "llvm.nvvm.tex.2d.array.v4s32.f32">;
1237 def int_nvvm_tex_2d_array_level_v4s32_f32
11841238 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11851239 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11861240 llvm_float_ty, llvm_float_ty], [],
1187 "llvm.nvvm.tex.2d.array.level.v4i32.f32">;
1188 def int_nvvm_tex_2d_array_grad_v4i32_f32
1241 "llvm.nvvm.tex.2d.array.level.v4s32.f32">;
1242 def int_nvvm_tex_2d_array_grad_v4s32_f32
11891243 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
11901244 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
11911245 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
11921246 llvm_float_ty], [],
1193 "llvm.nvvm.tex.2d.array.grad.v4i32.f32">;
1194
1195 def int_nvvm_tex_3d_v4f32_i32
1247 "llvm.nvvm.tex.2d.array.grad.v4s32.f32">;
1248 def int_nvvm_tex_2d_array_v4u32_s32
1249 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1250 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
1251 llvm_i32_ty], [],
1252 "llvm.nvvm.tex.2d.array.v4u32.s32">;
1253 def int_nvvm_tex_2d_array_v4u32_f32
1254 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1255 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1256 llvm_float_ty], [],
1257 "llvm.nvvm.tex.2d.array.v4u32.f32">;
1258 def int_nvvm_tex_2d_array_level_v4u32_f32
1259 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1260 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1261 llvm_float_ty, llvm_float_ty], [],
1262 "llvm.nvvm.tex.2d.array.level.v4u32.f32">;
1263 def int_nvvm_tex_2d_array_grad_v4u32_f32
1264 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1265 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1266 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1267 llvm_float_ty], [],
1268 "llvm.nvvm.tex.2d.array.grad.v4u32.f32">;
1269
1270 def int_nvvm_tex_3d_v4f32_s32
11961271 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
11971272 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1198 [], "llvm.nvvm.tex.3d.v4f32.i32">;
1273 [], "llvm.nvvm.tex.3d.v4f32.s32">;
11991274 def int_nvvm_tex_3d_v4f32_f32
12001275 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
12011276 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
12121287 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
12131288 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
12141289 "llvm.nvvm.tex.3d.grad.v4f32.f32">;
1215 def int_nvvm_tex_3d_v4i32_i32
1290 def int_nvvm_tex_3d_v4s32_s32
12161291 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
12171292 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1218 [], "llvm.nvvm.tex.3d.v4i32.i32">;
1219 def int_nvvm_tex_3d_v4i32_f32
1293 [], "llvm.nvvm.tex.3d.v4s32.s32">;
1294 def int_nvvm_tex_3d_v4s32_f32
12201295 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
12211296 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
12221297 llvm_float_ty], [],
1223 "llvm.nvvm.tex.3d.v4i32.f32">;
1224 def int_nvvm_tex_3d_level_v4i32_f32
1298 "llvm.nvvm.tex.3d.v4s32.f32">;
1299 def int_nvvm_tex_3d_level_v4s32_f32
12251300 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
12261301 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
12271302 llvm_float_ty, llvm_float_ty], [],
1228 "llvm.nvvm.tex.3d.level.v4i32.f32">;
1229 def int_nvvm_tex_3d_grad_v4i32_f32
1303 "llvm.nvvm.tex.3d.level.v4s32.f32">;
1304 def int_nvvm_tex_3d_grad_v4s32_f32
12301305 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
12311306 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
12321307 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
12331308 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1234 "llvm.nvvm.tex.3d.grad.v4i32.f32">;
1235
1236 // Surface Load
1309 "llvm.nvvm.tex.3d.grad.v4s32.f32">;
1310 def int_nvvm_tex_3d_v4u32_s32
1311 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1312 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1313 [], "llvm.nvvm.tex.3d.v4u32.s32">;
1314 def int_nvvm_tex_3d_v4u32_f32
1315 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1316 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1317 llvm_float_ty], [],
1318 "llvm.nvvm.tex.3d.v4u32.f32">;
1319 def int_nvvm_tex_3d_level_v4u32_f32
1320 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1321 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1322 llvm_float_ty, llvm_float_ty], [],
1323 "llvm.nvvm.tex.3d.level.v4u32.f32">;
1324 def int_nvvm_tex_3d_grad_v4u32_f32
1325 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1326 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1327 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1328 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1329 "llvm.nvvm.tex.3d.grad.v4u32.f32">;
1330
1331 def int_nvvm_tex_cube_v4f32_f32
1332 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1333 [llvm_i64_ty, llvm_i64_ty,
1334 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1335 "llvm.nvvm.tex.cube.v4f32.f32">;
1336 def int_nvvm_tex_cube_level_v4f32_f32
1337 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1338 [llvm_i64_ty, llvm_i64_ty,
1339 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1340 "llvm.nvvm.tex.cube.level.v4f32.f32">;
1341 def int_nvvm_tex_cube_v4s32_f32
1342 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1343 [llvm_i64_ty, llvm_i64_ty,
1344 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1345 "llvm.nvvm.tex.cube.v4s32.f32">;
1346 def int_nvvm_tex_cube_level_v4s32_f32
1347 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1348 [llvm_i64_ty, llvm_i64_ty,
1349 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1350 "llvm.nvvm.tex.cube.level.v4s32.f32">;
1351 def int_nvvm_tex_cube_v4u32_f32
1352 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1353 [llvm_i64_ty, llvm_i64_ty,
1354 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1355 "llvm.nvvm.tex.cube.v4u32.f32">;
1356 def int_nvvm_tex_cube_level_v4u32_f32
1357 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1358 [llvm_i64_ty, llvm_i64_ty,
1359 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1360 "llvm.nvvm.tex.cube.level.v4u32.f32">;
1361
1362 def int_nvvm_tex_cube_array_v4f32_f32
1363 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1364 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1365 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1366 "llvm.nvvm.tex.cube.array.v4f32.f32">;
1367 def int_nvvm_tex_cube_array_level_v4f32_f32
1368 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1369 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1370 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1371 "llvm.nvvm.tex.cube.array.level.v4f32.f32">;
1372 def int_nvvm_tex_cube_array_v4s32_f32
1373 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1374 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1375 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1376 "llvm.nvvm.tex.cube.array.v4s32.f32">;
1377 def int_nvvm_tex_cube_array_level_v4s32_f32
1378 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1379 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1380 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1381 "llvm.nvvm.tex.cube.array.level.v4s32.f32">;
1382 def int_nvvm_tex_cube_array_v4u32_f32
1383 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1384 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1385 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1386 "llvm.nvvm.tex.cube.array.v4u32.f32">;
1387 def int_nvvm_tex_cube_array_level_v4u32_f32
1388 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1389 [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty,
1390 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1391 "llvm.nvvm.tex.cube.array.level.v4u32.f32">;
1392
1393 def int_nvvm_tld4_r_2d_v4f32_f32
1394 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1395 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1396 "llvm.nvvm.tld4.r.2d.v4f32.f32">;
1397 def int_nvvm_tld4_g_2d_v4f32_f32
1398 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1399 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1400 "llvm.nvvm.tld4.g.2d.v4f32.f32">;
1401 def int_nvvm_tld4_b_2d_v4f32_f32
1402 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1403 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1404 "llvm.nvvm.tld4.b.2d.v4f32.f32">;
1405 def int_nvvm_tld4_a_2d_v4f32_f32
1406 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1407 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1408 "llvm.nvvm.tld4.a.2d.v4f32.f32">;
1409 def int_nvvm_tld4_r_2d_v4s32_f32
1410 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1411 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1412 "llvm.nvvm.tld4.r.2d.v4s32.f32">;
1413 def int_nvvm_tld4_g_2d_v4s32_f32
1414 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1415 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1416 "llvm.nvvm.tld4.g.2d.v4s32.f32">;
1417 def int_nvvm_tld4_b_2d_v4s32_f32
1418 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1419 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1420 "llvm.nvvm.tld4.b.2d.v4s32.f32">;
1421 def int_nvvm_tld4_a_2d_v4s32_f32
1422 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1423 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1424 "llvm.nvvm.tld4.a.2d.v4s32.f32">;
1425 def int_nvvm_tld4_r_2d_v4u32_f32
1426 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1427 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1428 "llvm.nvvm.tld4.r.2d.v4u32.f32">;
1429 def int_nvvm_tld4_g_2d_v4u32_f32
1430 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1431 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1432 "llvm.nvvm.tld4.g.2d.v4u32.f32">;
1433 def int_nvvm_tld4_b_2d_v4u32_f32
1434 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1435 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1436 "llvm.nvvm.tld4.b.2d.v4u32.f32">;
1437 def int_nvvm_tld4_a_2d_v4u32_f32
1438 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1439 [llvm_i64_ty, llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1440 "llvm.nvvm.tld4.a.2d.v4u32.f32">;
1441
1442
1443 // texmode_unified
1444 def int_nvvm_tex_unified_1d_v4f32_s32
1445 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1446 [llvm_i64_ty, llvm_i32_ty], [],
1447 "llvm.nvvm.tex.unified.1d.v4f32.s32">;
1448 def int_nvvm_tex_unified_1d_v4f32_f32
1449 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1450 [llvm_i64_ty, llvm_float_ty], [],
1451 "llvm.nvvm.tex.unified.1d.v4f32.f32">;
1452 def int_nvvm_tex_unified_1d_level_v4f32_f32
1453 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1454 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1455 "llvm.nvvm.tex.unified.1d.level.v4f32.f32">;
1456 def int_nvvm_tex_unified_1d_grad_v4f32_f32
1457 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1458 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1459 llvm_float_ty], [],
1460 "llvm.nvvm.tex.unified.1d.grad.v4f32.f32">;
1461 def int_nvvm_tex_unified_1d_v4s32_s32
1462 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1463 [llvm_i64_ty, llvm_i32_ty], [],
1464 "llvm.nvvm.tex.unified.1d.v4s32.s32">;
1465 def int_nvvm_tex_unified_1d_v4s32_f32
1466 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1467 [llvm_i64_ty, llvm_float_ty], [],
1468 "llvm.nvvm.tex.unified.1d.v4s32.f32">;
1469 def int_nvvm_tex_unified_1d_level_v4s32_f32
1470 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1471 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1472 "llvm.nvvm.tex.unified.1d.level.v4s32.f32">;
1473 def int_nvvm_tex_unified_1d_grad_v4s32_f32
1474 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1475 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1476 llvm_float_ty], [],
1477 "llvm.nvvm.tex.unified.1d.grad.v4s32.f32">;
1478 def int_nvvm_tex_unified_1d_v4u32_s32
1479 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1480 [llvm_i64_ty, llvm_i32_ty], [],
1481 "llvm.nvvm.tex.unified.1d.v4u32.s32">;
1482 def int_nvvm_tex_unified_1d_v4u32_f32
1483 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1484 [llvm_i64_ty, llvm_float_ty], [],
1485 "llvm.nvvm.tex.unified.1d.v4u32.f32">;
1486 def int_nvvm_tex_unified_1d_level_v4u32_f32
1487 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1488 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1489 "llvm.nvvm.tex.unified.1d.level.v4u32.f32">;
1490 def int_nvvm_tex_unified_1d_grad_v4u32_f32
1491 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1492 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1493 llvm_float_ty], [],
1494 "llvm.nvvm.tex.unified.1d.grad.v4u32.f32">;
1495
1496 def int_nvvm_tex_unified_1d_array_v4f32_s32
1497 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1498 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1499 "llvm.nvvm.tex.unified.1d.array.v4f32.s32">;
1500 def int_nvvm_tex_unified_1d_array_v4f32_f32
1501 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1502 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
1503 "llvm.nvvm.tex.unified.1d.array.v4f32.f32">;
1504 def int_nvvm_tex_unified_1d_array_level_v4f32_f32
1505 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1506 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1507 llvm_float_ty], [],
1508 "llvm.nvvm.tex.unified.1d.array.level.v4f32.f32">;
1509 def int_nvvm_tex_unified_1d_array_grad_v4f32_f32
1510 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1511 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1512 llvm_float_ty, llvm_float_ty], [],
1513 "llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32">;
1514 def int_nvvm_tex_unified_1d_array_v4s32_s32
1515 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1516 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1517 "llvm.nvvm.tex.unified.1d.array.v4s32.s32">;
1518 def int_nvvm_tex_unified_1d_array_v4s32_f32
1519 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1520 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
1521 "llvm.nvvm.tex.unified.1d.array.v4s32.f32">;
1522 def int_nvvm_tex_unified_1d_array_level_v4s32_f32
1523 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1524 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1525 llvm_float_ty], [],
1526 "llvm.nvvm.tex.unified.1d.array.level.v4s32.f32">;
1527 def int_nvvm_tex_unified_1d_array_grad_v4s32_f32
1528 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1529 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1530 llvm_float_ty, llvm_float_ty], [],
1531 "llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32">;
1532 def int_nvvm_tex_unified_1d_array_v4u32_s32
1533 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1534 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1535 "llvm.nvvm.tex.unified.1d.array.v4u32.s32">;
1536 def int_nvvm_tex_unified_1d_array_v4u32_f32
1537 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1538 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty], [],
1539 "llvm.nvvm.tex.unified.1d.array.v4u32.f32">;
1540 def int_nvvm_tex_unified_1d_array_level_v4u32_f32
1541 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1542 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1543 llvm_float_ty], [],
1544 "llvm.nvvm.tex.unified.1d.array.level.v4u32.f32">;
1545 def int_nvvm_tex_unified_1d_array_grad_v4u32_f32
1546 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1547 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1548 llvm_float_ty, llvm_float_ty], [],
1549 "llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32">;
1550
1551 def int_nvvm_tex_unified_2d_v4f32_s32
1552 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1553 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1554 "llvm.nvvm.tex.unified.2d.v4f32.s32">;
1555 def int_nvvm_tex_unified_2d_v4f32_f32
1556 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1557 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1558 "llvm.nvvm.tex.unified.2d.v4f32.f32">;
1559 def int_nvvm_tex_unified_2d_level_v4f32_f32
1560 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1561 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1562 llvm_float_ty], [],
1563 "llvm.nvvm.tex.unified.2d.level.v4f32.f32">;
1564 def int_nvvm_tex_unified_2d_grad_v4f32_f32
1565 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1566 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1567 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1568 "llvm.nvvm.tex.unified.2d.grad.v4f32.f32">;
1569 def int_nvvm_tex_unified_2d_v4s32_s32
1570 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1571 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1572 "llvm.nvvm.tex.unified.2d.v4s32.s32">;
1573 def int_nvvm_tex_unified_2d_v4s32_f32
1574 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1575 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1576 "llvm.nvvm.tex.unified.2d.v4s32.f32">;
1577 def int_nvvm_tex_unified_2d_level_v4s32_f32
1578 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1579 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1580 llvm_float_ty], [],
1581 "llvm.nvvm.tex.unified.2d.level.v4s32.f32">;
1582 def int_nvvm_tex_unified_2d_grad_v4s32_f32
1583 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1584 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1585 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1586 "llvm.nvvm.tex.unified.2d.grad.v4s32.f32">;
1587 def int_nvvm_tex_unified_2d_v4u32_s32
1588 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1589 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1590 "llvm.nvvm.tex.unified.2d.v4u32.s32">;
1591 def int_nvvm_tex_unified_2d_v4u32_f32
1592 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1593 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1594 "llvm.nvvm.tex.unified.2d.v4u32.f32">;
1595 def int_nvvm_tex_unified_2d_level_v4u32_f32
1596 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1597 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1598 llvm_float_ty], [],
1599 "llvm.nvvm.tex.unified.2d.level.v4u32.f32">;
1600 def int_nvvm_tex_unified_2d_grad_v4u32_f32
1601 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1602 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1603 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1604 "llvm.nvvm.tex.unified.2d.grad.v4u32.f32">;
1605
1606 def int_nvvm_tex_unified_2d_array_v4f32_s32
1607 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1608 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
1609 llvm_i32_ty], [],
1610 "llvm.nvvm.tex.unified.2d.array.v4f32.s32">;
1611 def int_nvvm_tex_unified_2d_array_v4f32_f32
1612 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1613 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1614 llvm_float_ty], [],
1615 "llvm.nvvm.tex.unified.2d.array.v4f32.f32">;
1616 def int_nvvm_tex_unified_2d_array_level_v4f32_f32
1617 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1618 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1619 llvm_float_ty, llvm_float_ty], [],
1620 "llvm.nvvm.tex.unified.2d.array.level.v4f32.f32">;
1621 def int_nvvm_tex_unified_2d_array_grad_v4f32_f32
1622 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1623 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1624 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1625 llvm_float_ty], [],
1626 "llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32">;
1627 def int_nvvm_tex_unified_2d_array_v4s32_s32
1628 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1629 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
1630 llvm_i32_ty], [],
1631 "llvm.nvvm.tex.unified.2d.array.v4s32.s32">;
1632 def int_nvvm_tex_unified_2d_array_v4s32_f32
1633 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1634 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1635 llvm_float_ty], [],
1636 "llvm.nvvm.tex.unified.2d.array.v4s32.f32">;
1637 def int_nvvm_tex_unified_2d_array_level_v4s32_f32
1638 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1639 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1640 llvm_float_ty, llvm_float_ty], [],
1641 "llvm.nvvm.tex.unified.2d.array.level.v4s32.f32">;
1642 def int_nvvm_tex_unified_2d_array_grad_v4s32_f32
1643 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1644 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1645 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1646 llvm_float_ty], [],
1647 "llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32">;
1648 def int_nvvm_tex_unified_2d_array_v4u32_s32
1649 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1650 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
1651 llvm_i32_ty], [],
1652 "llvm.nvvm.tex.unified.2d.array.v4u32.s32">;
1653 def int_nvvm_tex_unified_2d_array_v4u32_f32
1654 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1655 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1656 llvm_float_ty], [],
1657 "llvm.nvvm.tex.unified.2d.array.v4u32.f32">;
1658 def int_nvvm_tex_unified_2d_array_level_v4u32_f32
1659 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1660 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1661 llvm_float_ty, llvm_float_ty], [],
1662 "llvm.nvvm.tex.unified.2d.array.level.v4u32.f32">;
1663 def int_nvvm_tex_unified_2d_array_grad_v4u32_f32
1664 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1665 [llvm_i64_ty, llvm_i32_ty, llvm_float_ty,
1666 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1667 llvm_float_ty], [],
1668 "llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32">;
1669
1670 def int_nvvm_tex_unified_3d_v4f32_s32
1671 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1672 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1673 [], "llvm.nvvm.tex.unified.3d.v4f32.s32">;
1674 def int_nvvm_tex_unified_3d_v4f32_f32
1675 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1676 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1677 llvm_float_ty], [],
1678 "llvm.nvvm.tex.unified.3d.v4f32.f32">;
1679 def int_nvvm_tex_unified_3d_level_v4f32_f32
1680 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1681 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1682 llvm_float_ty, llvm_float_ty], [],
1683 "llvm.nvvm.tex.unified.3d.level.v4f32.f32">;
1684 def int_nvvm_tex_unified_3d_grad_v4f32_f32
1685 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1686 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1687 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1688 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1689 "llvm.nvvm.tex.unified.3d.grad.v4f32.f32">;
1690 def int_nvvm_tex_unified_3d_v4s32_s32
1691 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1692 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1693 [], "llvm.nvvm.tex.unified.3d.v4s32.s32">;
1694 def int_nvvm_tex_unified_3d_v4s32_f32
1695 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1696 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1697 llvm_float_ty], [],
1698 "llvm.nvvm.tex.unified.3d.v4s32.f32">;
1699 def int_nvvm_tex_unified_3d_level_v4s32_f32
1700 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1701 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1702 llvm_float_ty, llvm_float_ty], [],
1703 "llvm.nvvm.tex.unified.3d.level.v4s32.f32">;
1704 def int_nvvm_tex_unified_3d_grad_v4s32_f32
1705 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1706 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1707 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1708 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1709 "llvm.nvvm.tex.unified.3d.grad.v4s32.f32">;
1710 def int_nvvm_tex_unified_3d_v4u32_s32
1711 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1712 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1713 [], "llvm.nvvm.tex.unified.3d.v4u32.s32">;
1714 def int_nvvm_tex_unified_3d_v4u32_f32
1715 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1716 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1717 llvm_float_ty], [],
1718 "llvm.nvvm.tex.unified.3d.v4u32.f32">;
1719 def int_nvvm_tex_unified_3d_level_v4u32_f32
1720 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1721 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1722 llvm_float_ty, llvm_float_ty], [],
1723 "llvm.nvvm.tex.unified.3d.level.v4u32.f32">;
1724 def int_nvvm_tex_unified_3d_grad_v4u32_f32
1725 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1726 [llvm_i64_ty, llvm_float_ty, llvm_float_ty,
1727 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty,
1728 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1729 "llvm.nvvm.tex.unified.3d.grad.v4u32.f32">;
1730
1731 def int_nvvm_tex_unified_cube_v4f32_f32
1732 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1733 [llvm_i64_ty,
1734 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1735 "llvm.nvvm.tex.unified.cube.v4f32.f32">;
1736 def int_nvvm_tex_unified_cube_level_v4f32_f32
1737 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1738 [llvm_i64_ty,
1739 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1740 "llvm.nvvm.tex.unified.cube.level.v4f32.f32">;
1741 def int_nvvm_tex_unified_cube_v4s32_f32
1742 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1743 [llvm_i64_ty,
1744 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1745 "llvm.nvvm.tex.unified.cube.v4s32.f32">;
1746 def int_nvvm_tex_unified_cube_level_v4s32_f32
1747 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1748 [llvm_i64_ty,
1749 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1750 "llvm.nvvm.tex.unified.cube.level.v4s32.f32">;
1751 def int_nvvm_tex_unified_cube_v4u32_f32
1752 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1753 [llvm_i64_ty,
1754 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1755 "llvm.nvvm.tex.unified.cube.v4u32.f32">;
1756 def int_nvvm_tex_unified_cube_level_v4u32_f32
1757 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1758 [llvm_i64_ty,
1759 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1760 "llvm.nvvm.tex.unified.cube.level.v4u32.f32">;
1761
1762 def int_nvvm_tex_unified_cube_array_v4f32_f32
1763 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1764 [llvm_i64_ty, llvm_i32_ty,
1765 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1766 "llvm.nvvm.tex.unified.cube.array.v4f32.f32">;
1767 def int_nvvm_tex_unified_cube_array_level_v4f32_f32
1768 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1769 [llvm_i64_ty, llvm_i32_ty,
1770 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1771 "llvm.nvvm.tex.unified.cube.array.level.v4f32.f32">;
1772 def int_nvvm_tex_unified_cube_array_v4s32_f32
1773 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1774 [llvm_i64_ty, llvm_i32_ty,
1775 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1776 "llvm.nvvm.tex.unified.cube.array.v4s32.f32">;
1777 def int_nvvm_tex_unified_cube_array_level_v4s32_f32
1778 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1779 [llvm_i64_ty, llvm_i32_ty,
1780 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1781 "llvm.nvvm.tex.unified.cube.array.level.v4s32.f32">;
1782 def int_nvvm_tex_unified_cube_array_v4u32_f32
1783 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1784 [llvm_i64_ty, llvm_i32_ty,
1785 llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1786 "llvm.nvvm.tex.unified.cube.array.v4u32.f32">;
1787 def int_nvvm_tex_unified_cube_array_level_v4u32_f32
1788 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1789 [llvm_i64_ty, llvm_i32_ty,
1790 llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty], [],
1791 "llvm.nvvm.tex.unified.cube.array.level.v4u32.f32">;
1792
1793 def int_nvvm_tld4_unified_r_2d_v4f32_f32
1794 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1795 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1796 "llvm.nvvm.tld4.unified.r.2d.v4f32.f32">;
1797 def int_nvvm_tld4_unified_g_2d_v4f32_f32
1798 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1799 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1800 "llvm.nvvm.tld4.unified.g.2d.v4f32.f32">;
1801 def int_nvvm_tld4_unified_b_2d_v4f32_f32
1802 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1803 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1804 "llvm.nvvm.tld4.unified.b.2d.v4f32.f32">;
1805 def int_nvvm_tld4_unified_a_2d_v4f32_f32
1806 : Intrinsic<[llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_float_ty],
1807 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1808 "llvm.nvvm.tld4.unified.a.2d.v4f32.f32">;
1809 def int_nvvm_tld4_unified_r_2d_v4s32_f32
1810 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1811 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1812 "llvm.nvvm.tld4.unified.r.2d.v4s32.f32">;
1813 def int_nvvm_tld4_unified_g_2d_v4s32_f32
1814 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1815 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1816 "llvm.nvvm.tld4.unified.g.2d.v4s32.f32">;
1817 def int_nvvm_tld4_unified_b_2d_v4s32_f32
1818 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1819 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1820 "llvm.nvvm.tld4.unified.b.2d.v4s32.f32">;
1821 def int_nvvm_tld4_unified_a_2d_v4s32_f32
1822 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1823 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1824 "llvm.nvvm.tld4.unified.a.2d.v4s32.f32">;
1825 def int_nvvm_tld4_unified_r_2d_v4u32_f32
1826 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1827 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1828 "llvm.nvvm.tld4.unified.r.2d.v4u32.f32">;
1829 def int_nvvm_tld4_unified_g_2d_v4u32_f32
1830 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1831 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1832 "llvm.nvvm.tld4.unified.g.2d.v4u32.f32">;
1833 def int_nvvm_tld4_unified_b_2d_v4u32_f32
1834 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1835 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1836 "llvm.nvvm.tld4.unified.b.2d.v4u32.f32">;
1837 def int_nvvm_tld4_unified_a_2d_v4u32_f32
1838 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1839 [llvm_i64_ty, llvm_float_ty, llvm_float_ty], [],
1840 "llvm.nvvm.tld4.unified.a.2d.v4u32.f32">;
1841
1842
1843 //=== Surface Load
1844 // .clamp variants
1845 def int_nvvm_suld_1d_i8_clamp
1846 : Intrinsic<[llvm_i16_ty],
1847 [llvm_i64_ty, llvm_i32_ty], [],
1848 "llvm.nvvm.suld.1d.i8.clamp">;
1849 def int_nvvm_suld_1d_i16_clamp
1850 : Intrinsic<[llvm_i16_ty],
1851 [llvm_i64_ty, llvm_i32_ty], [],
1852 "llvm.nvvm.suld.1d.i16.clamp">;
1853 def int_nvvm_suld_1d_i32_clamp
1854 : Intrinsic<[llvm_i32_ty],
1855 [llvm_i64_ty, llvm_i32_ty], [],
1856 "llvm.nvvm.suld.1d.i32.clamp">;
1857 def int_nvvm_suld_1d_i64_clamp
1858 : Intrinsic<[llvm_i64_ty],
1859 [llvm_i64_ty, llvm_i32_ty], [],
1860 "llvm.nvvm.suld.1d.i64.clamp">;
1861 def int_nvvm_suld_1d_v2i8_clamp
1862 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1863 [llvm_i64_ty, llvm_i32_ty], [],
1864 "llvm.nvvm.suld.1d.v2i8.clamp">;
1865 def int_nvvm_suld_1d_v2i16_clamp
1866 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1867 [llvm_i64_ty, llvm_i32_ty], [],
1868 "llvm.nvvm.suld.1d.v2i16.clamp">;
1869 def int_nvvm_suld_1d_v2i32_clamp
1870 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
1871 [llvm_i64_ty, llvm_i32_ty], [],
1872 "llvm.nvvm.suld.1d.v2i32.clamp">;
1873 def int_nvvm_suld_1d_v2i64_clamp
1874 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
1875 [llvm_i64_ty, llvm_i32_ty], [],
1876 "llvm.nvvm.suld.1d.v2i64.clamp">;
1877 def int_nvvm_suld_1d_v4i8_clamp
1878 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1879 [llvm_i64_ty, llvm_i32_ty], [],
1880 "llvm.nvvm.suld.1d.v4i8.clamp">;
1881 def int_nvvm_suld_1d_v4i16_clamp
1882 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1883 [llvm_i64_ty, llvm_i32_ty], [],
1884 "llvm.nvvm.suld.1d.v4i16.clamp">;
1885 def int_nvvm_suld_1d_v4i32_clamp
1886 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1887 [llvm_i64_ty, llvm_i32_ty], [],
1888 "llvm.nvvm.suld.1d.v4i32.clamp">;
1889
1890 def int_nvvm_suld_1d_array_i8_clamp
1891 : Intrinsic<[llvm_i16_ty],
1892 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1893 "llvm.nvvm.suld.1d.array.i8.clamp">;
1894 def int_nvvm_suld_1d_array_i16_clamp
1895 : Intrinsic<[llvm_i16_ty],
1896 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1897 "llvm.nvvm.suld.1d.array.i16.clamp">;
1898 def int_nvvm_suld_1d_array_i32_clamp
1899 : Intrinsic<[llvm_i32_ty],
1900 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1901 "llvm.nvvm.suld.1d.array.i32.clamp">;
1902 def int_nvvm_suld_1d_array_i64_clamp
1903 : Intrinsic<[llvm_i64_ty],
1904 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1905 "llvm.nvvm.suld.1d.array.i64.clamp">;
1906 def int_nvvm_suld_1d_array_v2i8_clamp
1907 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1908 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1909 "llvm.nvvm.suld.1d.array.v2i8.clamp">;
1910 def int_nvvm_suld_1d_array_v2i16_clamp
1911 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1912 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1913 "llvm.nvvm.suld.1d.array.v2i16.clamp">;
1914 def int_nvvm_suld_1d_array_v2i32_clamp
1915 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
1916 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1917 "llvm.nvvm.suld.1d.array.v2i32.clamp">;
1918 def int_nvvm_suld_1d_array_v2i64_clamp
1919 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
1920 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1921 "llvm.nvvm.suld.1d.array.v2i64.clamp">;
1922 def int_nvvm_suld_1d_array_v4i8_clamp
1923 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1924 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1925 "llvm.nvvm.suld.1d.array.v4i8.clamp">;
1926 def int_nvvm_suld_1d_array_v4i16_clamp
1927 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1928 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1929 "llvm.nvvm.suld.1d.array.v4i16.clamp">;
1930 def int_nvvm_suld_1d_array_v4i32_clamp
1931 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1932 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1933 "llvm.nvvm.suld.1d.array.v4i32.clamp">;
1934
1935 def int_nvvm_suld_2d_i8_clamp
1936 : Intrinsic<[llvm_i16_ty],
1937 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1938 "llvm.nvvm.suld.2d.i8.clamp">;
1939 def int_nvvm_suld_2d_i16_clamp
1940 : Intrinsic<[llvm_i16_ty],
1941 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1942 "llvm.nvvm.suld.2d.i16.clamp">;
1943 def int_nvvm_suld_2d_i32_clamp
1944 : Intrinsic<[llvm_i32_ty],
1945 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1946 "llvm.nvvm.suld.2d.i32.clamp">;
1947 def int_nvvm_suld_2d_i64_clamp
1948 : Intrinsic<[llvm_i64_ty],
1949 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1950 "llvm.nvvm.suld.2d.i64.clamp">;
1951 def int_nvvm_suld_2d_v2i8_clamp
1952 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1953 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1954 "llvm.nvvm.suld.2d.v2i8.clamp">;
1955 def int_nvvm_suld_2d_v2i16_clamp
1956 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1957 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1958 "llvm.nvvm.suld.2d.v2i16.clamp">;
1959 def int_nvvm_suld_2d_v2i32_clamp
1960 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
1961 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1962 "llvm.nvvm.suld.2d.v2i32.clamp">;
1963 def int_nvvm_suld_2d_v2i64_clamp
1964 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
1965 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1966 "llvm.nvvm.suld.2d.v2i64.clamp">;
1967 def int_nvvm_suld_2d_v4i8_clamp
1968 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1969 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1970 "llvm.nvvm.suld.2d.v4i8.clamp">;
1971 def int_nvvm_suld_2d_v4i16_clamp
1972 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
1973 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1974 "llvm.nvvm.suld.2d.v4i16.clamp">;
1975 def int_nvvm_suld_2d_v4i32_clamp
1976 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
1977 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
1978 "llvm.nvvm.suld.2d.v4i32.clamp">;
1979
1980 def int_nvvm_suld_2d_array_i8_clamp
1981 : Intrinsic<[llvm_i16_ty],
1982 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
1983 "llvm.nvvm.suld.2d.array.i8.clamp">;
1984 def int_nvvm_suld_2d_array_i16_clamp
1985 : Intrinsic<[llvm_i16_ty],
1986 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
1987 "llvm.nvvm.suld.2d.array.i16.clamp">;
1988 def int_nvvm_suld_2d_array_i32_clamp
1989 : Intrinsic<[llvm_i32_ty],
1990 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
1991 "llvm.nvvm.suld.2d.array.i32.clamp">;
1992 def int_nvvm_suld_2d_array_i64_clamp
1993 : Intrinsic<[llvm_i64_ty],
1994 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
1995 "llvm.nvvm.suld.2d.array.i64.clamp">;
1996 def int_nvvm_suld_2d_array_v2i8_clamp
1997 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
1998 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
1999 "llvm.nvvm.suld.2d.array.v2i8.clamp">;
2000 def int_nvvm_suld_2d_array_v2i16_clamp
2001 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2002 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2003 "llvm.nvvm.suld.2d.array.v2i16.clamp">;
2004 def int_nvvm_suld_2d_array_v2i32_clamp
2005 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2006 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2007 "llvm.nvvm.suld.2d.array.v2i32.clamp">;
2008 def int_nvvm_suld_2d_array_v2i64_clamp
2009 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2010 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2011 "llvm.nvvm.suld.2d.array.v2i64.clamp">;
2012 def int_nvvm_suld_2d_array_v4i8_clamp
2013 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2014 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2015 "llvm.nvvm.suld.2d.array.v4i8.clamp">;
2016 def int_nvvm_suld_2d_array_v4i16_clamp
2017 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2018 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2019 "llvm.nvvm.suld.2d.array.v4i16.clamp">;
2020 def int_nvvm_suld_2d_array_v4i32_clamp
2021 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2022 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2023 "llvm.nvvm.suld.2d.array.v4i32.clamp">;
2024
2025 def int_nvvm_suld_3d_i8_clamp
2026 : Intrinsic<[llvm_i16_ty],
2027 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2028 "llvm.nvvm.suld.3d.i8.clamp">;
2029 def int_nvvm_suld_3d_i16_clamp
2030 : Intrinsic<[llvm_i16_ty],
2031 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2032 "llvm.nvvm.suld.3d.i16.clamp">;
2033 def int_nvvm_suld_3d_i32_clamp
2034 : Intrinsic<[llvm_i32_ty],
2035 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2036 "llvm.nvvm.suld.3d.i32.clamp">;
2037 def int_nvvm_suld_3d_i64_clamp
2038 : Intrinsic<[llvm_i64_ty],
2039 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2040 "llvm.nvvm.suld.3d.i64.clamp">;
2041 def int_nvvm_suld_3d_v2i8_clamp
2042 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2043 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2044 "llvm.nvvm.suld.3d.v2i8.clamp">;
2045 def int_nvvm_suld_3d_v2i16_clamp
2046 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2047 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2048 "llvm.nvvm.suld.3d.v2i16.clamp">;
2049 def int_nvvm_suld_3d_v2i32_clamp
2050 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2051 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2052 "llvm.nvvm.suld.3d.v2i32.clamp">;
2053 def int_nvvm_suld_3d_v2i64_clamp
2054 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2055 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2056 "llvm.nvvm.suld.3d.v2i64.clamp">;
2057 def int_nvvm_suld_3d_v4i8_clamp
2058 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2059 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2060 "llvm.nvvm.suld.3d.v4i8.clamp">;
2061 def int_nvvm_suld_3d_v4i16_clamp
2062 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2063 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2064 "llvm.nvvm.suld.3d.v4i16.clamp">;
2065 def int_nvvm_suld_3d_v4i32_clamp
2066 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2067 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2068 "llvm.nvvm.suld.3d.v4i32.clamp">;
2069
2070 // .trap variants
12372071 def int_nvvm_suld_1d_i8_trap
12382072 : Intrinsic<[llvm_i16_ty],
12392073 [llvm_i64_ty, llvm_i32_ty], [],
12462080 : Intrinsic<[llvm_i32_ty],
12472081 [llvm_i64_ty, llvm_i32_ty], [],
12482082 "llvm.nvvm.suld.1d.i32.trap">;
2083 def int_nvvm_suld_1d_i64_trap
2084 : Intrinsic<[llvm_i64_ty],
2085 [llvm_i64_ty, llvm_i32_ty], [],
2086 "llvm.nvvm.suld.1d.i64.trap">;
12492087 def int_nvvm_suld_1d_v2i8_trap
12502088 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
12512089 [llvm_i64_ty, llvm_i32_ty], [],
12582096 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
12592097 [llvm_i64_ty, llvm_i32_ty], [],
12602098 "llvm.nvvm.suld.1d.v2i32.trap">;
2099 def int_nvvm_suld_1d_v2i64_trap
2100 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2101 [llvm_i64_ty, llvm_i32_ty], [],
2102 "llvm.nvvm.suld.1d.v2i64.trap">;
12612103 def int_nvvm_suld_1d_v4i8_trap
12622104 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
12632105 [llvm_i64_ty, llvm_i32_ty], [],
12832125 : Intrinsic<[llvm_i32_ty],
12842126 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
12852127 "llvm.nvvm.suld.1d.array.i32.trap">;
2128 def int_nvvm_suld_1d_array_i64_trap
2129 : Intrinsic<[llvm_i64_ty],
2130 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2131 "llvm.nvvm.suld.1d.array.i64.trap">;
12862132 def int_nvvm_suld_1d_array_v2i8_trap
12872133 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
12882134 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
12952141 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
12962142 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
12972143 "llvm.nvvm.suld.1d.array.v2i32.trap">;
2144 def int_nvvm_suld_1d_array_v2i64_trap
2145 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2146 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2147 "llvm.nvvm.suld.1d.array.v2i64.trap">;
12982148 def int_nvvm_suld_1d_array_v4i8_trap
12992149 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
13002150 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
13202170 : Intrinsic<[llvm_i32_ty],
13212171 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
13222172 "llvm.nvvm.suld.2d.i32.trap">;
2173 def int_nvvm_suld_2d_i64_trap
2174 : Intrinsic<[llvm_i64_ty],
2175 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2176 "llvm.nvvm.suld.2d.i64.trap">;
13232177 def int_nvvm_suld_2d_v2i8_trap
13242178 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
13252179 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
13322186 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
13332187 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
13342188 "llvm.nvvm.suld.2d.v2i32.trap">;
2189 def int_nvvm_suld_2d_v2i64_trap
2190 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2191 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2192 "llvm.nvvm.suld.2d.v2i64.trap">;
13352193 def int_nvvm_suld_2d_v4i8_trap
13362194 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
13372195 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
13572215 : Intrinsic<[llvm_i32_ty],
13582216 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
13592217 "llvm.nvvm.suld.2d.array.i32.trap">;
2218 def int_nvvm_suld_2d_array_i64_trap
2219 : Intrinsic<[llvm_i64_ty],
2220 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2221 "llvm.nvvm.suld.2d.array.i64.trap">;
13602222 def int_nvvm_suld_2d_array_v2i8_trap
13612223 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
13622224 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
13692231 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
13702232 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
13712233 "llvm.nvvm.suld.2d.array.v2i32.trap">;
2234 def int_nvvm_suld_2d_array_v2i64_trap
2235 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2236 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2237 "llvm.nvvm.suld.2d.array.v2i64.trap">;
13722238 def int_nvvm_suld_2d_array_v4i8_trap
13732239 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
13742240 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
13942260 : Intrinsic<[llvm_i32_ty],
13952261 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
13962262 "llvm.nvvm.suld.3d.i32.trap">;
2263 def int_nvvm_suld_3d_i64_trap
2264 : Intrinsic<[llvm_i64_ty],
2265 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2266 "llvm.nvvm.suld.3d.i64.trap">;
13972267 def int_nvvm_suld_3d_v2i8_trap
13982268 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
13992269 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
14062276 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
14072277 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
14082278 "llvm.nvvm.suld.3d.v2i32.trap">;
2279 def int_nvvm_suld_3d_v2i64_trap
2280 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2281 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2282 "llvm.nvvm.suld.3d.v2i64.trap">;
14092283 def int_nvvm_suld_3d_v4i8_trap
14102284 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
14112285 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
14182292 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
14192293 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
14202294 "llvm.nvvm.suld.3d.v4i32.trap">;
2295
2296 // .zero variants
2297 def int_nvvm_suld_1d_i8_zero
2298 : Intrinsic<[llvm_i16_ty],
2299 [llvm_i64_ty, llvm_i32_ty], [],
2300 "llvm.nvvm.suld.1d.i8.zero">;
2301 def int_nvvm_suld_1d_i16_zero
2302 : Intrinsic<[llvm_i16_ty],
2303 [llvm_i64_ty, llvm_i32_ty], [],
2304 "llvm.nvvm.suld.1d.i16.zero">;
2305 def int_nvvm_suld_1d_i32_zero
2306 : Intrinsic<[llvm_i32_ty],
2307 [llvm_i64_ty, llvm_i32_ty], [],
2308 "llvm.nvvm.suld.1d.i32.zero">;
2309 def int_nvvm_suld_1d_i64_zero
2310 : Intrinsic<[llvm_i64_ty],
2311 [llvm_i64_ty, llvm_i32_ty], [],
2312 "llvm.nvvm.suld.1d.i64.zero">;
2313 def int_nvvm_suld_1d_v2i8_zero
2314 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2315 [llvm_i64_ty, llvm_i32_ty], [],
2316 "llvm.nvvm.suld.1d.v2i8.zero">;
2317 def int_nvvm_suld_1d_v2i16_zero
2318 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2319 [llvm_i64_ty, llvm_i32_ty], [],
2320 "llvm.nvvm.suld.1d.v2i16.zero">;
2321 def int_nvvm_suld_1d_v2i32_zero
2322 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2323 [llvm_i64_ty, llvm_i32_ty], [],
2324 "llvm.nvvm.suld.1d.v2i32.zero">;
2325 def int_nvvm_suld_1d_v2i64_zero
2326 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2327 [llvm_i64_ty, llvm_i32_ty], [],
2328 "llvm.nvvm.suld.1d.v2i64.zero">;
2329 def int_nvvm_suld_1d_v4i8_zero
2330 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2331 [llvm_i64_ty, llvm_i32_ty], [],
2332 "llvm.nvvm.suld.1d.v4i8.zero">;
2333 def int_nvvm_suld_1d_v4i16_zero
2334 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2335 [llvm_i64_ty, llvm_i32_ty], [],
2336 "llvm.nvvm.suld.1d.v4i16.zero">;
2337 def int_nvvm_suld_1d_v4i32_zero
2338 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2339 [llvm_i64_ty, llvm_i32_ty], [],
2340 "llvm.nvvm.suld.1d.v4i32.zero">;
2341
2342 def int_nvvm_suld_1d_array_i8_zero
2343 : Intrinsic<[llvm_i16_ty],
2344 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2345 "llvm.nvvm.suld.1d.array.i8.zero">;
2346 def int_nvvm_suld_1d_array_i16_zero
2347 : Intrinsic<[llvm_i16_ty],
2348 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2349 "llvm.nvvm.suld.1d.array.i16.zero">;
2350 def int_nvvm_suld_1d_array_i32_zero
2351 : Intrinsic<[llvm_i32_ty],
2352 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2353 "llvm.nvvm.suld.1d.array.i32.zero">;
2354 def int_nvvm_suld_1d_array_i64_zero
2355 : Intrinsic<[llvm_i64_ty],
2356 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2357 "llvm.nvvm.suld.1d.array.i64.zero">;
2358 def int_nvvm_suld_1d_array_v2i8_zero
2359 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2360 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2361 "llvm.nvvm.suld.1d.array.v2i8.zero">;
2362 def int_nvvm_suld_1d_array_v2i16_zero
2363 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2364 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2365 "llvm.nvvm.suld.1d.array.v2i16.zero">;
2366 def int_nvvm_suld_1d_array_v2i32_zero
2367 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2368 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2369 "llvm.nvvm.suld.1d.array.v2i32.zero">;
2370 def int_nvvm_suld_1d_array_v2i64_zero
2371 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2372 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2373 "llvm.nvvm.suld.1d.array.v2i64.zero">;
2374 def int_nvvm_suld_1d_array_v4i8_zero
2375 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2376 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2377 "llvm.nvvm.suld.1d.array.v4i8.zero">;
2378 def int_nvvm_suld_1d_array_v4i16_zero
2379 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2380 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2381 "llvm.nvvm.suld.1d.array.v4i16.zero">;
2382 def int_nvvm_suld_1d_array_v4i32_zero
2383 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2384 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2385 "llvm.nvvm.suld.1d.array.v4i32.zero">;
2386
2387 def int_nvvm_suld_2d_i8_zero
2388 : Intrinsic<[llvm_i16_ty],
2389 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2390 "llvm.nvvm.suld.2d.i8.zero">;
2391 def int_nvvm_suld_2d_i16_zero
2392 : Intrinsic<[llvm_i16_ty],
2393 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2394 "llvm.nvvm.suld.2d.i16.zero">;
2395 def int_nvvm_suld_2d_i32_zero
2396 : Intrinsic<[llvm_i32_ty],
2397 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2398 "llvm.nvvm.suld.2d.i32.zero">;
2399 def int_nvvm_suld_2d_i64_zero
2400 : Intrinsic<[llvm_i64_ty],
2401 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2402 "llvm.nvvm.suld.2d.i64.zero">;
2403 def int_nvvm_suld_2d_v2i8_zero
2404 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2405 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2406 "llvm.nvvm.suld.2d.v2i8.zero">;
2407 def int_nvvm_suld_2d_v2i16_zero
2408 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2409 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2410 "llvm.nvvm.suld.2d.v2i16.zero">;
2411 def int_nvvm_suld_2d_v2i32_zero
2412 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2413 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2414 "llvm.nvvm.suld.2d.v2i32.zero">;
2415 def int_nvvm_suld_2d_v2i64_zero
2416 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2417 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2418 "llvm.nvvm.suld.2d.v2i64.zero">;
2419 def int_nvvm_suld_2d_v4i8_zero
2420 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2421 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2422 "llvm.nvvm.suld.2d.v4i8.zero">;
2423 def int_nvvm_suld_2d_v4i16_zero
2424 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2425 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2426 "llvm.nvvm.suld.2d.v4i16.zero">;
2427 def int_nvvm_suld_2d_v4i32_zero
2428 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2429 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2430 "llvm.nvvm.suld.2d.v4i32.zero">;
2431
2432 def int_nvvm_suld_2d_array_i8_zero
2433 : Intrinsic<[llvm_i16_ty],
2434 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2435 "llvm.nvvm.suld.2d.array.i8.zero">;
2436 def int_nvvm_suld_2d_array_i16_zero
2437 : Intrinsic<[llvm_i16_ty],
2438 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2439 "llvm.nvvm.suld.2d.array.i16.zero">;
2440 def int_nvvm_suld_2d_array_i32_zero
2441 : Intrinsic<[llvm_i32_ty],
2442 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2443 "llvm.nvvm.suld.2d.array.i32.zero">;
2444 def int_nvvm_suld_2d_array_i64_zero
2445 : Intrinsic<[llvm_i64_ty],
2446 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2447 "llvm.nvvm.suld.2d.array.i64.zero">;
2448 def int_nvvm_suld_2d_array_v2i8_zero
2449 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2450 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2451 "llvm.nvvm.suld.2d.array.v2i8.zero">;
2452 def int_nvvm_suld_2d_array_v2i16_zero
2453 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2454 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2455 "llvm.nvvm.suld.2d.array.v2i16.zero">;
2456 def int_nvvm_suld_2d_array_v2i32_zero
2457 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2458 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2459 "llvm.nvvm.suld.2d.array.v2i32.zero">;
2460 def int_nvvm_suld_2d_array_v2i64_zero
2461 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2462 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2463 "llvm.nvvm.suld.2d.array.v2i64.zero">;
2464 def int_nvvm_suld_2d_array_v4i8_zero
2465 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2466 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2467 "llvm.nvvm.suld.2d.array.v4i8.zero">;
2468 def int_nvvm_suld_2d_array_v4i16_zero
2469 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2470 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2471 "llvm.nvvm.suld.2d.array.v4i16.zero">;
2472 def int_nvvm_suld_2d_array_v4i32_zero
2473 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2474 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2475 "llvm.nvvm.suld.2d.array.v4i32.zero">;
2476
2477 def int_nvvm_suld_3d_i8_zero
2478 : Intrinsic<[llvm_i16_ty],
2479 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2480 "llvm.nvvm.suld.3d.i8.zero">;
2481 def int_nvvm_suld_3d_i16_zero
2482 : Intrinsic<[llvm_i16_ty],
2483 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2484 "llvm.nvvm.suld.3d.i16.zero">;
2485 def int_nvvm_suld_3d_i32_zero
2486 : Intrinsic<[llvm_i32_ty],
2487 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2488 "llvm.nvvm.suld.3d.i32.zero">;
2489 def int_nvvm_suld_3d_i64_zero
2490 : Intrinsic<[llvm_i64_ty],
2491 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2492 "llvm.nvvm.suld.3d.i64.zero">;
2493 def int_nvvm_suld_3d_v2i8_zero
2494 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2495 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2496 "llvm.nvvm.suld.3d.v2i8.zero">;
2497 def int_nvvm_suld_3d_v2i16_zero
2498 : Intrinsic<[llvm_i16_ty, llvm_i16_ty],
2499 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2500 "llvm.nvvm.suld.3d.v2i16.zero">;
2501 def int_nvvm_suld_3d_v2i32_zero
2502 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
2503 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2504 "llvm.nvvm.suld.3d.v2i32.zero">;
2505 def int_nvvm_suld_3d_v2i64_zero
2506 : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
2507 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2508 "llvm.nvvm.suld.3d.v2i64.zero">;
2509 def int_nvvm_suld_3d_v4i8_zero
2510 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2511 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2512 "llvm.nvvm.suld.3d.v4i8.zero">;
2513 def int_nvvm_suld_3d_v4i16_zero
2514 : Intrinsic<[llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty],
2515 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2516 "llvm.nvvm.suld.3d.v4i16.zero">;
2517 def int_nvvm_suld_3d_v4i32_zero
2518 : Intrinsic<[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
2519 [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2520 "llvm.nvvm.suld.3d.v4i32.zero">;
14212521
14222522 //===- Texture Query ------------------------------------------------------===//
14232523
15022602 //===- Surface Stores -----------------------------------------------------===//
15032603
15042604 // Unformatted
1505
2605 // .clamp variant
2606 def int_nvvm_sust_b_1d_i8_clamp
2607 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty], [],
2608 "llvm.nvvm.sust.b.1d.i8.clamp">,
2609 GCCBuiltin<"__nvvm_sust_b_1d_i8_clamp">;
2610 def int_nvvm_sust_b_1d_i16_clamp
2611 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty], [],
2612 "llvm.nvvm.sust.b.1d.i16.clamp">,
2613 GCCBuiltin<"__nvvm_sust_b_1d_i16_clamp">;
2614 def int_nvvm_sust_b_1d_i32_clamp
2615 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
2616 "llvm.nvvm.sust.b.1d.i32.clamp">,
2617 GCCBuiltin<"__nvvm_sust_b_1d_i32_clamp">;
2618 def int_nvvm_sust_b_1d_i64_clamp
2619 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty], [],
2620 "llvm.nvvm.sust.b.1d.i64.clamp">,
2621 GCCBuiltin<"__nvvm_sust_b_1d_i64_clamp">;
2622 def int_nvvm_sust_b_1d_v2i8_clamp
2623 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty, llvm_i16_ty], [],
2624 "llvm.nvvm.sust.b.1d.v2i8.clamp">,
2625 GCCBuiltin<"__nvvm_sust_b_1d_v2i8_clamp">;
2626 def int_nvvm_sust_b_1d_v2i16_clamp
2627 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty, llvm_i16_ty], [],
2628 "llvm.nvvm.sust.b.1d.v2i16.clamp">,
2629 GCCBuiltin<"__nvvm_sust_b_1d_v2i16_clamp">;
2630 def int_nvvm_sust_b_1d_v2i32_clamp
2631 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2632 "llvm.nvvm.sust.b.1d.v2i32.clamp">,
2633 GCCBuiltin<"__nvvm_sust_b_1d_v2i32_clamp">;
2634 def int_nvvm_sust_b_1d_v2i64_clamp
2635 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty, llvm_i64_ty], [],
2636 "llvm.nvvm.sust.b.1d.v2i64.clamp">,
2637 GCCBuiltin<"__nvvm_sust_b_1d_v2i64_clamp">;
2638 def int_nvvm_sust_b_1d_v4i8_clamp
2639 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty,
2640 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2641 "llvm.nvvm.sust.b.1d.v4i8.clamp">,
2642 GCCBuiltin<"__nvvm_sust_b_1d_v4i8_clamp">;
2643 def int_nvvm_sust_b_1d_v4i16_clamp
2644 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty,
2645 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2646 "llvm.nvvm.sust.b.1d.v4i16.clamp">,
2647 GCCBuiltin<"__nvvm_sust_b_1d_v4i16_clamp">;
2648 def int_nvvm_sust_b_1d_v4i32_clamp
2649 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2650 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2651 "llvm.nvvm.sust.b.1d.v4i32.clamp">,
2652 GCCBuiltin<"__nvvm_sust_b_1d_v4i32_clamp">;
2653
2654
2655 def int_nvvm_sust_b_1d_array_i8_clamp
2656 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
2657 "llvm.nvvm.sust.b.1d.array.i8.clamp">,
2658 GCCBuiltin<"__nvvm_sust_b_1d_array_i8_clamp">;
2659 def int_nvvm_sust_b_1d_array_i16_clamp
2660 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
2661 "llvm.nvvm.sust.b.1d.array.i16.clamp">,
2662 GCCBuiltin<"__nvvm_sust_b_1d_array_i16_clamp">;
2663 def int_nvvm_sust_b_1d_array_i32_clamp
2664 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2665 "llvm.nvvm.sust.b.1d.array.i32.clamp">,
2666 GCCBuiltin<"__nvvm_sust_b_1d_array_i32_clamp">;
2667 def int_nvvm_sust_b_1d_array_i64_clamp
2668 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
2669 "llvm.nvvm.sust.b.1d.array.i64.clamp">,
2670 GCCBuiltin<"__nvvm_sust_b_1d_array_i64_clamp">;
2671 def int_nvvm_sust_b_1d_array_v2i8_clamp
2672 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2673 llvm_i16_ty, llvm_i16_ty], [],
2674 "llvm.nvvm.sust.b.1d.array.v2i8.clamp">,
2675 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i8_clamp">;
2676 def int_nvvm_sust_b_1d_array_v2i16_clamp
2677 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2678 llvm_i16_ty, llvm_i16_ty], [],
2679 "llvm.nvvm.sust.b.1d.array.v2i16.clamp">,
2680 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i16_clamp">;
2681 def int_nvvm_sust_b_1d_array_v2i32_clamp
2682 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2683 llvm_i32_ty, llvm_i32_ty], [],
2684 "llvm.nvvm.sust.b.1d.array.v2i32.clamp">,
2685 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i32_clamp">;
2686 def int_nvvm_sust_b_1d_array_v2i64_clamp
2687 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2688 llvm_i64_ty, llvm_i64_ty], [],
2689 "llvm.nvvm.sust.b.1d.array.v2i64.clamp">,
2690 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i64_clamp">;
2691 def int_nvvm_sust_b_1d_array_v4i8_clamp
2692 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
2693 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2694 "llvm.nvvm.sust.b.1d.array.v4i8.clamp">,
2695 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i8_clamp">;
2696 def int_nvvm_sust_b_1d_array_v4i16_clamp
2697 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
2698 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2699 "llvm.nvvm.sust.b.1d.array.v4i16.clamp">,
2700 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i16_clamp">;
2701 def int_nvvm_sust_b_1d_array_v4i32_clamp
2702 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2703 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2704 "llvm.nvvm.sust.b.1d.array.v4i32.clamp">,
2705 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i32_clamp">;
2706
2707
2708 def int_nvvm_sust_b_2d_i8_clamp
2709 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
2710 "llvm.nvvm.sust.b.2d.i8.clamp">,
2711 GCCBuiltin<"__nvvm_sust_b_2d_i8_clamp">;
2712 def int_nvvm_sust_b_2d_i16_clamp
2713 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
2714 "llvm.nvvm.sust.b.2d.i16.clamp">,
2715 GCCBuiltin<"__nvvm_sust_b_2d_i16_clamp">;
2716 def int_nvvm_sust_b_2d_i32_clamp
2717 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2718 "llvm.nvvm.sust.b.2d.i32.clamp">,
2719 GCCBuiltin<"__nvvm_sust_b_2d_i32_clamp">;
2720 def int_nvvm_sust_b_2d_i64_clamp
2721 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
2722 "llvm.nvvm.sust.b.2d.i64.clamp">,
2723 GCCBuiltin<"__nvvm_sust_b_2d_i64_clamp">;
2724 def int_nvvm_sust_b_2d_v2i8_clamp
2725 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2726 llvm_i16_ty, llvm_i16_ty], [],
2727 "llvm.nvvm.sust.b.2d.v2i8.clamp">,
2728 GCCBuiltin<"__nvvm_sust_b_2d_v2i8_clamp">;
2729 def int_nvvm_sust_b_2d_v2i16_clamp
2730 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2731 llvm_i16_ty, llvm_i16_ty], [],
2732 "llvm.nvvm.sust.b.2d.v2i16.clamp">,
2733 GCCBuiltin<"__nvvm_sust_b_2d_v2i16_clamp">;
2734 def int_nvvm_sust_b_2d_v2i32_clamp
2735 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2736 llvm_i32_ty, llvm_i32_ty], [],
2737 "llvm.nvvm.sust.b.2d.v2i32.clamp">,
2738 GCCBuiltin<"__nvvm_sust_b_2d_v2i32_clamp">;
2739 def int_nvvm_sust_b_2d_v2i64_clamp
2740 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2741 llvm_i64_ty, llvm_i64_ty], [],
2742 "llvm.nvvm.sust.b.2d.v2i64.clamp">,
2743 GCCBuiltin<"__nvvm_sust_b_2d_v2i64_clamp">;
2744 def int_nvvm_sust_b_2d_v4i8_clamp
2745 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
2746 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2747 "llvm.nvvm.sust.b.2d.v4i8.clamp">,
2748 GCCBuiltin<"__nvvm_sust_b_2d_v4i8_clamp">;
2749 def int_nvvm_sust_b_2d_v4i16_clamp
2750 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
2751 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2752 "llvm.nvvm.sust.b.2d.v4i16.clamp">,
2753 GCCBuiltin<"__nvvm_sust_b_2d_v4i16_clamp">;
2754 def int_nvvm_sust_b_2d_v4i32_clamp
2755 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2756 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2757 "llvm.nvvm.sust.b.2d.v4i32.clamp">,
2758 GCCBuiltin<"__nvvm_sust_b_2d_v4i32_clamp">;
2759
2760
2761 def int_nvvm_sust_b_2d_array_i8_clamp
2762 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2763 llvm_i32_ty, llvm_i16_ty], [],
2764 "llvm.nvvm.sust.b.2d.array.i8.clamp">,
2765 GCCBuiltin<"__nvvm_sust_b_2d_array_i8_clamp">;
2766 def int_nvvm_sust_b_2d_array_i16_clamp
2767 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2768 llvm_i32_ty, llvm_i16_ty], [],
2769 "llvm.nvvm.sust.b.2d.array.i16.clamp">,
2770 GCCBuiltin<"__nvvm_sust_b_2d_array_i16_clamp">;
2771 def int_nvvm_sust_b_2d_array_i32_clamp
2772 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2773 llvm_i32_ty, llvm_i32_ty], [],
2774 "llvm.nvvm.sust.b.2d.array.i32.clamp">,
2775 GCCBuiltin<"__nvvm_sust_b_2d_array_i32_clamp">;
2776 def int_nvvm_sust_b_2d_array_i64_clamp
2777 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2778 llvm_i32_ty, llvm_i64_ty], [],
2779 "llvm.nvvm.sust.b.2d.array.i64.clamp">,
2780 GCCBuiltin<"__nvvm_sust_b_2d_array_i64_clamp">;
2781 def int_nvvm_sust_b_2d_array_v2i8_clamp
2782 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2783 llvm_i16_ty, llvm_i16_ty], [],
2784 "llvm.nvvm.sust.b.2d.array.v2i8.clamp">,
2785 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i8_clamp">;
2786 def int_nvvm_sust_b_2d_array_v2i16_clamp
2787 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2788 llvm_i16_ty, llvm_i16_ty], [],
2789 "llvm.nvvm.sust.b.2d.array.v2i16.clamp">,
2790 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i16_clamp">;
2791 def int_nvvm_sust_b_2d_array_v2i32_clamp
2792 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2793 llvm_i32_ty, llvm_i32_ty], [],
2794 "llvm.nvvm.sust.b.2d.array.v2i32.clamp">,
2795 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i32_clamp">;
2796 def int_nvvm_sust_b_2d_array_v2i64_clamp
2797 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2798 llvm_i64_ty, llvm_i64_ty], [],
2799 "llvm.nvvm.sust.b.2d.array.v2i64.clamp">,
2800 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i64_clamp">;
2801 def int_nvvm_sust_b_2d_array_v4i8_clamp
2802 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2803 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2804 "llvm.nvvm.sust.b.2d.array.v4i8.clamp">,
2805 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i8_clamp">;
2806 def int_nvvm_sust_b_2d_array_v4i16_clamp
2807 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2808 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2809 "llvm.nvvm.sust.b.2d.array.v4i16.clamp">,
2810 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i16_clamp">;
2811 def int_nvvm_sust_b_2d_array_v4i32_clamp
2812 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2813 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2814 "llvm.nvvm.sust.b.2d.array.v4i32.clamp">,
2815 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i32_clamp">;
2816
2817
2818 def int_nvvm_sust_b_3d_i8_clamp
2819 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2820 llvm_i32_ty, llvm_i16_ty], [],
2821 "llvm.nvvm.sust.b.3d.i8.clamp">,
2822 GCCBuiltin<"__nvvm_sust_b_3d_i8_clamp">;
2823 def int_nvvm_sust_b_3d_i16_clamp
2824 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2825 llvm_i32_ty, llvm_i16_ty], [],
2826 "llvm.nvvm.sust.b.3d.i16.clamp">,
2827 GCCBuiltin<"__nvvm_sust_b_3d_i16_clamp">;
2828 def int_nvvm_sust_b_3d_i32_clamp
2829 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2830 llvm_i32_ty, llvm_i32_ty], [],
2831 "llvm.nvvm.sust.b.3d.i32.clamp">,
2832 GCCBuiltin<"__nvvm_sust_b_3d_i32_clamp">;
2833 def int_nvvm_sust_b_3d_i64_clamp
2834 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2835 llvm_i32_ty, llvm_i64_ty], [],
2836 "llvm.nvvm.sust.b.3d.i64.clamp">,
2837 GCCBuiltin<"__nvvm_sust_b_3d_i64_clamp">;
2838 def int_nvvm_sust_b_3d_v2i8_clamp
2839 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2840 llvm_i16_ty, llvm_i16_ty], [],
2841 "llvm.nvvm.sust.b.3d.v2i8.clamp">,
2842 GCCBuiltin<"__nvvm_sust_b_3d_v2i8_clamp">;
2843 def int_nvvm_sust_b_3d_v2i16_clamp
2844 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2845 llvm_i16_ty, llvm_i16_ty], [],
2846 "llvm.nvvm.sust.b.3d.v2i16.clamp">,
2847 GCCBuiltin<"__nvvm_sust_b_3d_v2i16_clamp">;
2848 def int_nvvm_sust_b_3d_v2i32_clamp
2849 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2850 llvm_i32_ty, llvm_i32_ty], [],
2851 "llvm.nvvm.sust.b.3d.v2i32.clamp">,
2852 GCCBuiltin<"__nvvm_sust_b_3d_v2i32_clamp">;
2853 def int_nvvm_sust_b_3d_v2i64_clamp
2854 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2855 llvm_i64_ty, llvm_i64_ty], [],
2856 "llvm.nvvm.sust.b.3d.v2i64.clamp">,
2857 GCCBuiltin<"__nvvm_sust_b_3d_v2i64_clamp">;
2858 def int_nvvm_sust_b_3d_v4i8_clamp
2859 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2860 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2861 "llvm.nvvm.sust.b.3d.v4i8.clamp">,
2862 GCCBuiltin<"__nvvm_sust_b_3d_v4i8_clamp">;
2863 def int_nvvm_sust_b_3d_v4i16_clamp
2864 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2865 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
2866 "llvm.nvvm.sust.b.3d.v4i16.clamp">,
2867 GCCBuiltin<"__nvvm_sust_b_3d_v4i16_clamp">;
2868 def int_nvvm_sust_b_3d_v4i32_clamp
2869 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
2870 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
2871 "llvm.nvvm.sust.b.3d.v4i32.clamp">,
2872 GCCBuiltin<"__nvvm_sust_b_3d_v4i32_clamp">;
2873
2874
2875 // .trap variant
15062876 def int_nvvm_sust_b_1d_i8_trap
15072877 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty], [],
15082878 "llvm.nvvm.sust.b.1d.i8.trap">,
15152885 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
15162886 "llvm.nvvm.sust.b.1d.i32.trap">,
15172887 GCCBuiltin<"__nvvm_sust_b_1d_i32_trap">;
2888 def int_nvvm_sust_b_1d_i64_trap
2889 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty], [],
2890 "llvm.nvvm.sust.b.1d.i64.trap">,
2891 GCCBuiltin<"__nvvm_sust_b_1d_i64_trap">;
15182892 def int_nvvm_sust_b_1d_v2i8_trap
15192893 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty, llvm_i16_ty], [],
15202894 "llvm.nvvm.sust.b.1d.v2i8.trap">,
15272901 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
15282902 "llvm.nvvm.sust.b.1d.v2i32.trap">,
15292903 GCCBuiltin<"__nvvm_sust_b_1d_v2i32_trap">;
2904 def int_nvvm_sust_b_1d_v2i64_trap
2905 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty, llvm_i64_ty], [],
2906 "llvm.nvvm.sust.b.1d.v2i64.trap">,
2907 GCCBuiltin<"__nvvm_sust_b_1d_v2i64_trap">;
15302908 def int_nvvm_sust_b_1d_v4i8_trap
15312909 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty,
15322910 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
15562934 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
15572935 "llvm.nvvm.sust.b.1d.array.i32.trap">,
15582936 GCCBuiltin<"__nvvm_sust_b_1d_array_i32_trap">;
2937 def int_nvvm_sust_b_1d_array_i64_trap
2938 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
2939 "llvm.nvvm.sust.b.1d.array.i64.trap">,
2940 GCCBuiltin<"__nvvm_sust_b_1d_array_i64_trap">;
15592941 def int_nvvm_sust_b_1d_array_v2i8_trap
15602942 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
15612943 llvm_i16_ty, llvm_i16_ty], [],
15712953 llvm_i32_ty, llvm_i32_ty], [],
15722954 "llvm.nvvm.sust.b.1d.array.v2i32.trap">,
15732955 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i32_trap">;
2956 def int_nvvm_sust_b_1d_array_v2i64_trap
2957 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
2958 llvm_i64_ty, llvm_i64_ty], [],
2959 "llvm.nvvm.sust.b.1d.array.v2i64.trap">,
2960 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i64_trap">;
15742961 def int_nvvm_sust_b_1d_array_v4i8_trap
15752962 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
15762963 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
16002987 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
16012988 "llvm.nvvm.sust.b.2d.i32.trap">,
16022989 GCCBuiltin<"__nvvm_sust_b_2d_i32_trap">;
2990 def int_nvvm_sust_b_2d_i64_trap
2991 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
2992 "llvm.nvvm.sust.b.2d.i64.trap">,
2993 GCCBuiltin<"__nvvm_sust_b_2d_i64_trap">;
16032994 def int_nvvm_sust_b_2d_v2i8_trap
16042995 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
16052996 llvm_i16_ty, llvm_i16_ty], [],
16153006 llvm_i32_ty, llvm_i32_ty], [],
16163007 "llvm.nvvm.sust.b.2d.v2i32.trap">,
16173008 GCCBuiltin<"__nvvm_sust_b_2d_v2i32_trap">;
3009 def int_nvvm_sust_b_2d_v2i64_trap
3010 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3011 llvm_i64_ty, llvm_i64_ty], [],
3012 "llvm.nvvm.sust.b.2d.v2i64.trap">,
3013 GCCBuiltin<"__nvvm_sust_b_2d_v2i64_trap">;
16183014 def int_nvvm_sust_b_2d_v4i8_trap
16193015 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
16203016 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
16473043 llvm_i32_ty, llvm_i32_ty], [],
16483044 "llvm.nvvm.sust.b.2d.array.i32.trap">,
16493045 GCCBuiltin<"__nvvm_sust_b_2d_array_i32_trap">;
3046 def int_nvvm_sust_b_2d_array_i64_trap
3047 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3048 llvm_i32_ty, llvm_i64_ty], [],
3049 "llvm.nvvm.sust.b.2d.array.i64.trap">,
3050 GCCBuiltin<"__nvvm_sust_b_2d_array_i64_trap">;
16503051 def int_nvvm_sust_b_2d_array_v2i8_trap
16513052 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
16523053 llvm_i16_ty, llvm_i16_ty], [],
16623063 llvm_i32_ty, llvm_i32_ty], [],
16633064 "llvm.nvvm.sust.b.2d.array.v2i32.trap">,
16643065 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i32_trap">;
3066 def int_nvvm_sust_b_2d_array_v2i64_trap
3067 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3068 llvm_i64_ty, llvm_i64_ty], [],
3069 "llvm.nvvm.sust.b.2d.array.v2i64.trap">,
3070 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i64_trap">;
16653071 def int_nvvm_sust_b_2d_array_v4i8_trap
16663072 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
16673073 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
16943100 llvm_i32_ty, llvm_i32_ty], [],
16953101 "llvm.nvvm.sust.b.3d.i32.trap">,
16963102 GCCBuiltin<"__nvvm_sust_b_3d_i32_trap">;
3103 def int_nvvm_sust_b_3d_i64_trap
3104 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3105 llvm_i32_ty, llvm_i64_ty], [],
3106 "llvm.nvvm.sust.b.3d.i64.trap">,
3107 GCCBuiltin<"__nvvm_sust_b_3d_i64_trap">;
16973108 def int_nvvm_sust_b_3d_v2i8_trap
16983109 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
16993110 llvm_i16_ty, llvm_i16_ty], [],
17093120 llvm_i32_ty, llvm_i32_ty], [],
17103121 "llvm.nvvm.sust.b.3d.v2i32.trap">,
17113122 GCCBuiltin<"__nvvm_sust_b_3d_v2i32_trap">;
3123 def int_nvvm_sust_b_3d_v2i64_trap
3124 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3125 llvm_i64_ty, llvm_i64_ty], [],
3126 "llvm.nvvm.sust.b.3d.v2i64.trap">,
3127 GCCBuiltin<"__nvvm_sust_b_3d_v2i64_trap">;
17123128 def int_nvvm_sust_b_3d_v4i8_trap
17133129 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
17143130 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
17243140 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
17253141 "llvm.nvvm.sust.b.3d.v4i32.trap">,
17263142 GCCBuiltin<"__nvvm_sust_b_3d_v4i32_trap">;
3143
3144
3145 // .zero variant
3146 def int_nvvm_sust_b_1d_i8_zero
3147 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty], [],
3148 "llvm.nvvm.sust.b.1d.i8.zero">,
3149 GCCBuiltin<"__nvvm_sust_b_1d_i8_zero">;
3150 def int_nvvm_sust_b_1d_i16_zero
3151 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty], [],
3152 "llvm.nvvm.sust.b.1d.i16.zero">,
3153 GCCBuiltin<"__nvvm_sust_b_1d_i16_zero">;
3154 def int_nvvm_sust_b_1d_i32_zero
3155 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty], [],
3156 "llvm.nvvm.sust.b.1d.i32.zero">,
3157 GCCBuiltin<"__nvvm_sust_b_1d_i32_zero">;
3158 def int_nvvm_sust_b_1d_i64_zero
3159 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty], [],
3160 "llvm.nvvm.sust.b.1d.i64.zero">,
3161 GCCBuiltin<"__nvvm_sust_b_1d_i64_zero">;
3162 def int_nvvm_sust_b_1d_v2i8_zero
3163 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty, llvm_i16_ty], [],
3164 "llvm.nvvm.sust.b.1d.v2i8.zero">,
3165 GCCBuiltin<"__nvvm_sust_b_1d_v2i8_zero">;
3166 def int_nvvm_sust_b_1d_v2i16_zero
3167 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty, llvm_i16_ty], [],
3168 "llvm.nvvm.sust.b.1d.v2i16.zero">,
3169 GCCBuiltin<"__nvvm_sust_b_1d_v2i16_zero">;
3170 def int_nvvm_sust_b_1d_v2i32_zero
3171 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3172 "llvm.nvvm.sust.b.1d.v2i32.zero">,
3173 GCCBuiltin<"__nvvm_sust_b_1d_v2i32_zero">;
3174 def int_nvvm_sust_b_1d_v2i64_zero
3175 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i64_ty, llvm_i64_ty], [],
3176 "llvm.nvvm.sust.b.1d.v2i64.zero">,
3177 GCCBuiltin<"__nvvm_sust_b_1d_v2i64_zero">;
3178 def int_nvvm_sust_b_1d_v4i8_zero
3179 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty,
3180 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3181 "llvm.nvvm.sust.b.1d.v4i8.zero">,
3182 GCCBuiltin<"__nvvm_sust_b_1d_v4i8_zero">;
3183 def int_nvvm_sust_b_1d_v4i16_zero
3184 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i16_ty,
3185 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3186 "llvm.nvvm.sust.b.1d.v4i16.zero">,
3187 GCCBuiltin<"__nvvm_sust_b_1d_v4i16_zero">;
3188 def int_nvvm_sust_b_1d_v4i32_zero
3189 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3190 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3191 "llvm.nvvm.sust.b.1d.v4i32.zero">,
3192 GCCBuiltin<"__nvvm_sust_b_1d_v4i32_zero">;
3193
3194
3195 def int_nvvm_sust_b_1d_array_i8_zero
3196 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
3197 "llvm.nvvm.sust.b.1d.array.i8.zero">,
3198 GCCBuiltin<"__nvvm_sust_b_1d_array_i8_zero">;
3199 def int_nvvm_sust_b_1d_array_i16_zero
3200 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
3201 "llvm.nvvm.sust.b.1d.array.i16.zero">,
3202 GCCBuiltin<"__nvvm_sust_b_1d_array_i16_zero">;
3203 def int_nvvm_sust_b_1d_array_i32_zero
3204 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3205 "llvm.nvvm.sust.b.1d.array.i32.zero">,
3206 GCCBuiltin<"__nvvm_sust_b_1d_array_i32_zero">;
3207 def int_nvvm_sust_b_1d_array_i64_zero
3208 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
3209 "llvm.nvvm.sust.b.1d.array.i64.zero">,
3210 GCCBuiltin<"__nvvm_sust_b_1d_array_i64_zero">;
3211 def int_nvvm_sust_b_1d_array_v2i8_zero
3212 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3213 llvm_i16_ty, llvm_i16_ty], [],
3214 "llvm.nvvm.sust.b.1d.array.v2i8.zero">,
3215 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i8_zero">;
3216 def int_nvvm_sust_b_1d_array_v2i16_zero
3217 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3218 llvm_i16_ty, llvm_i16_ty], [],
3219 "llvm.nvvm.sust.b.1d.array.v2i16.zero">,
3220 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i16_zero">;
3221 def int_nvvm_sust_b_1d_array_v2i32_zero
3222 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3223 llvm_i32_ty, llvm_i32_ty], [],
3224 "llvm.nvvm.sust.b.1d.array.v2i32.zero">,
3225 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i32_zero">;
3226 def int_nvvm_sust_b_1d_array_v2i64_zero
3227 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3228 llvm_i64_ty, llvm_i64_ty], [],
3229 "llvm.nvvm.sust.b.1d.array.v2i64.zero">,
3230 GCCBuiltin<"__nvvm_sust_b_1d_array_v2i64_zero">;
3231 def int_nvvm_sust_b_1d_array_v4i8_zero
3232 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
3233 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3234 "llvm.nvvm.sust.b.1d.array.v4i8.zero">,
3235 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i8_zero">;
3236 def int_nvvm_sust_b_1d_array_v4i16_zero
3237 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
3238 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3239 "llvm.nvvm.sust.b.1d.array.v4i16.zero">,
3240 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i16_zero">;
3241 def int_nvvm_sust_b_1d_array_v4i32_zero
3242 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3243 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3244 "llvm.nvvm.sust.b.1d.array.v4i32.zero">,
3245 GCCBuiltin<"__nvvm_sust_b_1d_array_v4i32_zero">;
3246
3247
3248 def int_nvvm_sust_b_2d_i8_zero
3249 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
3250 "llvm.nvvm.sust.b.2d.i8.zero">,
3251 GCCBuiltin<"__nvvm_sust_b_2d_i8_zero">;
3252 def int_nvvm_sust_b_2d_i16_zero
3253 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty], [],
3254 "llvm.nvvm.sust.b.2d.i16.zero">,
3255 GCCBuiltin<"__nvvm_sust_b_2d_i16_zero">;
3256 def int_nvvm_sust_b_2d_i32_zero
3257 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3258 "llvm.nvvm.sust.b.2d.i32.zero">,
3259 GCCBuiltin<"__nvvm_sust_b_2d_i32_zero">;
3260 def int_nvvm_sust_b_2d_i64_zero
3261 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i64_ty], [],
3262 "llvm.nvvm.sust.b.2d.i64.zero">,
3263 GCCBuiltin<"__nvvm_sust_b_2d_i64_zero">;
3264 def int_nvvm_sust_b_2d_v2i8_zero
3265 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3266 llvm_i16_ty, llvm_i16_ty], [],
3267 "llvm.nvvm.sust.b.2d.v2i8.zero">,
3268 GCCBuiltin<"__nvvm_sust_b_2d_v2i8_zero">;
3269 def int_nvvm_sust_b_2d_v2i16_zero
3270 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3271 llvm_i16_ty, llvm_i16_ty], [],
3272 "llvm.nvvm.sust.b.2d.v2i16.zero">,
3273 GCCBuiltin<"__nvvm_sust_b_2d_v2i16_zero">;
3274 def int_nvvm_sust_b_2d_v2i32_zero
3275 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3276 llvm_i32_ty, llvm_i32_ty], [],
3277 "llvm.nvvm.sust.b.2d.v2i32.zero">,
3278 GCCBuiltin<"__nvvm_sust_b_2d_v2i32_zero">;
3279 def int_nvvm_sust_b_2d_v2i64_zero
3280 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3281 llvm_i64_ty, llvm_i64_ty], [],
3282 "llvm.nvvm.sust.b.2d.v2i64.zero">,
3283 GCCBuiltin<"__nvvm_sust_b_2d_v2i64_zero">;
3284 def int_nvvm_sust_b_2d_v4i8_zero
3285 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
3286 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3287 "llvm.nvvm.sust.b.2d.v4i8.zero">,
3288 GCCBuiltin<"__nvvm_sust_b_2d_v4i8_zero">;
3289 def int_nvvm_sust_b_2d_v4i16_zero
3290 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i16_ty,
3291 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3292 "llvm.nvvm.sust.b.2d.v4i16.zero">,
3293 GCCBuiltin<"__nvvm_sust_b_2d_v4i16_zero">;
3294 def int_nvvm_sust_b_2d_v4i32_zero
3295 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3296 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3297 "llvm.nvvm.sust.b.2d.v4i32.zero">,
3298 GCCBuiltin<"__nvvm_sust_b_2d_v4i32_zero">;
3299
3300
3301 def int_nvvm_sust_b_2d_array_i8_zero
3302 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3303 llvm_i32_ty, llvm_i16_ty], [],
3304 "llvm.nvvm.sust.b.2d.array.i8.zero">,
3305 GCCBuiltin<"__nvvm_sust_b_2d_array_i8_zero">;
3306 def int_nvvm_sust_b_2d_array_i16_zero
3307 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3308 llvm_i32_ty, llvm_i16_ty], [],
3309 "llvm.nvvm.sust.b.2d.array.i16.zero">,
3310 GCCBuiltin<"__nvvm_sust_b_2d_array_i16_zero">;
3311 def int_nvvm_sust_b_2d_array_i32_zero
3312 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3313 llvm_i32_ty, llvm_i32_ty], [],
3314 "llvm.nvvm.sust.b.2d.array.i32.zero">,
3315 GCCBuiltin<"__nvvm_sust_b_2d_array_i32_zero">;
3316 def int_nvvm_sust_b_2d_array_i64_zero
3317 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3318 llvm_i32_ty, llvm_i64_ty], [],
3319 "llvm.nvvm.sust.b.2d.array.i64.zero">,
3320 GCCBuiltin<"__nvvm_sust_b_2d_array_i64_zero">;
3321 def int_nvvm_sust_b_2d_array_v2i8_zero
3322 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3323 llvm_i16_ty, llvm_i16_ty], [],
3324 "llvm.nvvm.sust.b.2d.array.v2i8.zero">,
3325 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i8_zero">;
3326 def int_nvvm_sust_b_2d_array_v2i16_zero
3327 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3328 llvm_i16_ty, llvm_i16_ty], [],
3329 "llvm.nvvm.sust.b.2d.array.v2i16.zero">,
3330 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i16_zero">;
3331 def int_nvvm_sust_b_2d_array_v2i32_zero
3332 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3333 llvm_i32_ty, llvm_i32_ty], [],
3334 "llvm.nvvm.sust.b.2d.array.v2i32.zero">,
3335 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i32_zero">;
3336 def int_nvvm_sust_b_2d_array_v2i64_zero
3337 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3338 llvm_i64_ty, llvm_i64_ty], [],
3339 "llvm.nvvm.sust.b.2d.array.v2i64.zero">,
3340 GCCBuiltin<"__nvvm_sust_b_2d_array_v2i64_zero">;
3341 def int_nvvm_sust_b_2d_array_v4i8_zero
3342 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3343 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3344 "llvm.nvvm.sust.b.2d.array.v4i8.zero">,
3345 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i8_zero">;
3346 def int_nvvm_sust_b_2d_array_v4i16_zero
3347 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3348 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3349 "llvm.nvvm.sust.b.2d.array.v4i16.zero">,
3350 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i16_zero">;
3351 def int_nvvm_sust_b_2d_array_v4i32_zero
3352 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3353 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3354 "llvm.nvvm.sust.b.2d.array.v4i32.zero">,
3355 GCCBuiltin<"__nvvm_sust_b_2d_array_v4i32_zero">;
3356
3357
3358 def int_nvvm_sust_b_3d_i8_zero
3359 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3360 llvm_i32_ty, llvm_i16_ty], [],
3361 "llvm.nvvm.sust.b.3d.i8.zero">,
3362 GCCBuiltin<"__nvvm_sust_b_3d_i8_zero">;
3363 def int_nvvm_sust_b_3d_i16_zero
3364 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3365 llvm_i32_ty, llvm_i16_ty], [],
3366 "llvm.nvvm.sust.b.3d.i16.zero">,
3367 GCCBuiltin<"__nvvm_sust_b_3d_i16_zero">;
3368 def int_nvvm_sust_b_3d_i32_zero
3369 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3370 llvm_i32_ty, llvm_i32_ty], [],
3371 "llvm.nvvm.sust.b.3d.i32.zero">,
3372 GCCBuiltin<"__nvvm_sust_b_3d_i32_zero">;
3373 def int_nvvm_sust_b_3d_i64_zero
3374 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty,
3375 llvm_i32_ty, llvm_i64_ty], [],
3376 "llvm.nvvm.sust.b.3d.i64.zero">,
3377 GCCBuiltin<"__nvvm_sust_b_3d_i64_zero">;
3378 def int_nvvm_sust_b_3d_v2i8_zero
3379 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3380 llvm_i16_ty, llvm_i16_ty], [],
3381 "llvm.nvvm.sust.b.3d.v2i8.zero">,
3382 GCCBuiltin<"__nvvm_sust_b_3d_v2i8_zero">;
3383 def int_nvvm_sust_b_3d_v2i16_zero
3384 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3385 llvm_i16_ty, llvm_i16_ty], [],
3386 "llvm.nvvm.sust.b.3d.v2i16.zero">,
3387 GCCBuiltin<"__nvvm_sust_b_3d_v2i16_zero">;
3388 def int_nvvm_sust_b_3d_v2i32_zero
3389 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3390 llvm_i32_ty, llvm_i32_ty], [],
3391 "llvm.nvvm.sust.b.3d.v2i32.zero">,
3392 GCCBuiltin<"__nvvm_sust_b_3d_v2i32_zero">;
3393 def int_nvvm_sust_b_3d_v2i64_zero
3394 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3395 llvm_i64_ty, llvm_i64_ty], [],
3396 "llvm.nvvm.sust.b.3d.v2i64.zero">,
3397 GCCBuiltin<"__nvvm_sust_b_3d_v2i64_zero">;
3398 def int_nvvm_sust_b_3d_v4i8_zero
3399 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3400 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3401 "llvm.nvvm.sust.b.3d.v4i8.zero">,
3402 GCCBuiltin<"__nvvm_sust_b_3d_v4i8_zero">;
3403 def int_nvvm_sust_b_3d_v4i16_zero
3404 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3405 llvm_i16_ty, llvm_i16_ty, llvm_i16_ty, llvm_i16_ty], [],
3406 "llvm.nvvm.sust.b.3d.v4i16.zero">,
3407 GCCBuiltin<"__nvvm_sust_b_3d_v4i16_zero">;
3408 def int_nvvm_sust_b_3d_v4i32_zero
3409 : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
3410 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [],
3411 "llvm.nvvm.sust.b.3d.v4i32.zero">,
3412 GCCBuiltin<"__nvvm_sust_b_3d_v4i32_zero">;
3413
3414
17273415
17283416 // Formatted
17293417
19493637 "llvm.nvvm.sust.p.3d.v4i32.trap">,
19503638 GCCBuiltin<"__nvvm_sust_p_3d_v4i32_trap">;
19513639
3640
19523641 def int_nvvm_rotate_b32
19533642 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
19543643 [IntrNoMem], "llvm.nvvm.rotate.b32">,
8383 #endif
8484 static const char *NamedMDForAnnotations = "nvvm.annotations";
8585
86 namespace NVPTXII {
87 enum {
88 // These must be kept in sync with TSFlags in NVPTXInstrFormats.td
89 IsTexFlag = 0x80,
90 IsSuldMask = 0x300,
91 IsSuldShift = 8,
92 IsSustFlag = 0x400,
93 IsSurfTexQueryFlag = 0x800,
94 IsTexModeUnifiedFlag = 0x1000
95 };
96 }
8697 }
8798
8899 #endif
329329 bool NVPTXAsmPrinter::lowerImageHandleOperand(const MachineInstr *MI,
330330 unsigned OpNo, MCOperand &MCOp) {
331331 const MachineOperand &MO = MI->getOperand(OpNo);
332
333 switch (MI->getOpcode()) {
334 default: return false;
335 case NVPTX::TEX_1D_F32_I32:
336 case NVPTX::TEX_1D_F32_F32:
337 case NVPTX::TEX_1D_F32_F32_LEVEL:
338 case NVPTX::TEX_1D_F32_F32_GRAD:
339 case NVPTX::TEX_1D_I32_I32:
340 case NVPTX::TEX_1D_I32_F32:
341 case NVPTX::TEX_1D_I32_F32_LEVEL:
342 case NVPTX::TEX_1D_I32_F32_GRAD:
343 case NVPTX::TEX_1D_ARRAY_F32_I32:
344 case NVPTX::TEX_1D_ARRAY_F32_F32:
345 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL:
346 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD:
347 case NVPTX::TEX_1D_ARRAY_I32_I32:
348 case NVPTX::TEX_1D_ARRAY_I32_F32:
349 case NVPTX::TEX_1D_ARRAY_I32_F32_LEVEL:
350 case NVPTX::TEX_1D_ARRAY_I32_F32_GRAD:
351 case NVPTX::TEX_2D_F32_I32:
352 case NVPTX::TEX_2D_F32_F32:
353 case NVPTX::TEX_2D_F32_F32_LEVEL:
354 case NVPTX::TEX_2D_F32_F32_GRAD:
355 case NVPTX::TEX_2D_I32_I32:
356 case NVPTX::TEX_2D_I32_F32:
357 case NVPTX::TEX_2D_I32_F32_LEVEL:
358 case NVPTX::TEX_2D_I32_F32_GRAD:
359 case NVPTX::TEX_2D_ARRAY_F32_I32:
360 case NVPTX::TEX_2D_ARRAY_F32_F32:
361 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL:
362 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD:
363 case NVPTX::TEX_2D_ARRAY_I32_I32:
364 case NVPTX::TEX_2D_ARRAY_I32_F32:
365 case NVPTX::TEX_2D_ARRAY_I32_F32_LEVEL:
366 case NVPTX::TEX_2D_ARRAY_I32_F32_GRAD:
367 case NVPTX::TEX_3D_F32_I32:
368 case NVPTX::TEX_3D_F32_F32:
369 case NVPTX::TEX_3D_F32_F32_LEVEL:
370 case NVPTX::TEX_3D_F32_F32_GRAD:
371 case NVPTX::TEX_3D_I32_I32:
372 case NVPTX::TEX_3D_I32_F32:
373 case NVPTX::TEX_3D_I32_F32_LEVEL:
374 case NVPTX::TEX_3D_I32_F32_GRAD:
375 {
332 const MCInstrDesc &MCID = MI->getDesc();
333
334 if (MCID.TSFlags & NVPTXII::IsTexFlag) {
376335 // This is a texture fetch, so operand 4 is a texref and operand 5 is
377336 // a samplerref
378 if (OpNo == 4) {
337 if (OpNo == 4 && MO.isImm()) {
379338 lowerImageHandleSymbol(MO.getImm(), MCOp);
380339 return true;
381340 }
382 if (OpNo == 5) {
341 if (OpNo == 5 && MO.isImm() && !(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) {
383342 lowerImageHandleSymbol(MO.getImm(), MCOp);
384343 return true;
385344 }
386345
387346 return false;
388 }
389 case NVPTX::SULD_1D_I8_TRAP:
390 case NVPTX::SULD_1D_I16_TRAP:
391 case NVPTX::SULD_1D_I32_TRAP:
392 case NVPTX::SULD_1D_ARRAY_I8_TRAP:
393 case NVPTX::SULD_1D_ARRAY_I16_TRAP:
394 case NVPTX::SULD_1D_ARRAY_I32_TRAP:
395 case NVPTX::SULD_2D_I8_TRAP:
396 case NVPTX::SULD_2D_I16_TRAP:
397 case NVPTX::SULD_2D_I32_TRAP:
398 case NVPTX::SULD_2D_ARRAY_I8_TRAP:
399 case NVPTX::SULD_2D_ARRAY_I16_TRAP:
400 case NVPTX::SULD_2D_ARRAY_I32_TRAP:
401 case NVPTX::SULD_3D_I8_TRAP:
402 case NVPTX::SULD_3D_I16_TRAP:
403 case NVPTX::SULD_3D_I32_TRAP: {
404 // This is a V1 surface load, so operand 1 is a surfref
405 if (OpNo == 1) {
347 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) {
348 unsigned VecSize =
349 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1);
350
351 // For a surface load of vector size N, the Nth operand will be the surfref
352 if (OpNo == VecSize && MO.isImm()) {
406353 lowerImageHandleSymbol(MO.getImm(), MCOp);
407354 return true;
408355 }
409356
410357 return false;
411 }
412 case NVPTX::SULD_1D_V2I8_TRAP:
413 case NVPTX::SULD_1D_V2I16_TRAP:
414 case NVPTX::SULD_1D_V2I32_TRAP:
415 case NVPTX::SULD_1D_ARRAY_V2I8_TRAP:
416 case NVPTX::SULD_1D_ARRAY_V2I16_TRAP:
417 case NVPTX::SULD_1D_ARRAY_V2I32_TRAP:
418 case NVPTX::SULD_2D_V2I8_TRAP:
419 case NVPTX::SULD_2D_V2I16_TRAP:
420 case NVPTX::SULD_2D_V2I32_TRAP:
421 case NVPTX::SULD_2D_ARRAY_V2I8_TRAP:
422 case NVPTX::SULD_2D_ARRAY_V2I16_TRAP:
423 case NVPTX::SULD_2D_ARRAY_V2I32_TRAP:
424 case NVPTX::SULD_3D_V2I8_TRAP:
425 case NVPTX::SULD_3D_V2I16_TRAP:
426 case NVPTX::SULD_3D_V2I32_TRAP: {
427 // This is a V2 surface load, so operand 2 is a surfref
428 if (OpNo == 2) {
358 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) {
359 // This is a surface store, so operand 0 is a surfref
360 if (OpNo == 0 && MO.isImm()) {
429361 lowerImageHandleSymbol(MO.getImm(), MCOp);
430362 return true;
431363 }
432364
433365 return false;
434 }
435 case NVPTX::SULD_1D_V4I8_TRAP:
436 case NVPTX::SULD_1D_V4I16_TRAP:
437 case NVPTX::SULD_1D_V4I32_TRAP:
438 case NVPTX::SULD_1D_ARRAY_V4I8_TRAP:
439 case NVPTX::SULD_1D_ARRAY_V4I16_TRAP:
440 case NVPTX::SULD_1D_ARRAY_V4I32_TRAP:
441 case NVPTX::SULD_2D_V4I8_TRAP:
442 case NVPTX::SULD_2D_V4I16_TRAP:
443 case NVPTX::SULD_2D_V4I32_TRAP:
444 case NVPTX::SULD_2D_ARRAY_V4I8_TRAP:
445 case NVPTX::SULD_2D_ARRAY_V4I16_TRAP:
446 case NVPTX::SULD_2D_ARRAY_V4I32_TRAP:
447 case NVPTX::SULD_3D_V4I8_TRAP:
448 case NVPTX::SULD_3D_V4I16_TRAP:
449 case NVPTX::SULD_3D_V4I32_TRAP: {
450 // This is a V4 surface load, so operand 4 is a surfref
451 if (OpNo == 4) {
366 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) {
367 // This is a query, so operand 1 is a surfref/texref
368 if (OpNo == 1 && MO.isImm()) {
452369 lowerImageHandleSymbol(MO.getImm(), MCOp);
453370 return true;
454371 }
455372
456373 return false;
457374 }
458 case NVPTX::SUST_B_1D_B8_TRAP:
459 case NVPTX::SUST_B_1D_B16_TRAP:
460 case NVPTX::SUST_B_1D_B32_TRAP:
461 case NVPTX::SUST_B_1D_V2B8_TRAP:
462 case NVPTX::SUST_B_1D_V2B16_TRAP:
463 case NVPTX::SUST_B_1D_V2B32_TRAP:
464 case NVPTX::SUST_B_1D_V4B8_TRAP:
465 case NVPTX::SUST_B_1D_V4B16_TRAP:
466 case NVPTX::SUST_B_1D_V4B32_TRAP:
467 case NVPTX::SUST_B_1D_ARRAY_B8_TRAP:
468 case NVPTX::SUST_B_1D_ARRAY_B16_TRAP:
469 case NVPTX::SUST_B_1D_ARRAY_B32_TRAP:
470 case NVPTX::SUST_B_1D_ARRAY_V2B8_TRAP:
471 case NVPTX::SUST_B_1D_ARRAY_V2B16_TRAP:
472 case NVPTX::SUST_B_1D_ARRAY_V2B32_TRAP:
473 case NVPTX::SUST_B_1D_ARRAY_V4B8_TRAP:
474 case NVPTX::SUST_B_1D_ARRAY_V4B16_TRAP:
475 case NVPTX::SUST_B_1D_ARRAY_V4B32_TRAP:
476 case NVPTX::SUST_B_2D_B8_TRAP:
477 case NVPTX::SUST_B_2D_B16_TRAP:
478 case NVPTX::SUST_B_2D_B32_TRAP:
479 case NVPTX::SUST_B_2D_V2B8_TRAP:
480 case NVPTX::SUST_B_2D_V2B16_TRAP:
481 case NVPTX::SUST_B_2D_V2B32_TRAP:
482 case NVPTX::SUST_B_2D_V4B8_TRAP:
483 case NVPTX::SUST_B_2D_V4B16_TRAP:
484 case NVPTX::SUST_B_2D_V4B32_TRAP:
485 case NVPTX::SUST_B_2D_ARRAY_B8_TRAP:
486 case NVPTX::SUST_B_2D_ARRAY_B16_TRAP:
487 case NVPTX::SUST_B_2D_ARRAY_B32_TRAP:
488 case NVPTX::SUST_B_2D_ARRAY_V2B8_TRAP:
489 case NVPTX::SUST_B_2D_ARRAY_V2B16_TRAP:
490 case NVPTX::SUST_B_2D_ARRAY_V2B32_TRAP:
491 case NVPTX::SUST_B_2D_ARRAY_V4B8_TRAP:
492 case NVPTX::SUST_B_2D_ARRAY_V4B16_TRAP:
493 case NVPTX::SUST_B_2D_ARRAY_V4B32_TRAP:
494 case NVPTX::SUST_B_3D_B8_TRAP:
495 case NVPTX::SUST_B_3D_B16_TRAP:
496 case NVPTX::SUST_B_3D_B32_TRAP:
497 case NVPTX::SUST_B_3D_V2B8_TRAP:
498 case NVPTX::SUST_B_3D_V2B16_TRAP:
499 case NVPTX::SUST_B_3D_V2B32_TRAP:
500 case NVPTX::SUST_B_3D_V4B8_TRAP:
501 case NVPTX::SUST_B_3D_V4B16_TRAP:
502 case NVPTX::SUST_B_3D_V4B32_TRAP:
503 case NVPTX::SUST_P_1D_B8_TRAP:
504 case NVPTX::SUST_P_1D_B16_TRAP:
505 case NVPTX::SUST_P_1D_B32_TRAP:
506 case NVPTX::SUST_P_1D_V2B8_TRAP:
507 case NVPTX::SUST_P_1D_V2B16_TRAP:
508 case NVPTX::SUST_P_1D_V2B32_TRAP:
509 case NVPTX::SUST_P_1D_V4B8_TRAP:
510 case NVPTX::SUST_P_1D_V4B16_TRAP:
511 case NVPTX::SUST_P_1D_V4B32_TRAP:
512 case NVPTX::SUST_P_1D_ARRAY_B8_TRAP:
513 case NVPTX::SUST_P_1D_ARRAY_B16_TRAP:
514 case NVPTX::SUST_P_1D_ARRAY_B32_TRAP:
515 case NVPTX::SUST_P_1D_ARRAY_V2B8_TRAP:
516 case NVPTX::SUST_P_1D_ARRAY_V2B16_TRAP:
517 case NVPTX::SUST_P_1D_ARRAY_V2B32_TRAP:
518 case NVPTX::SUST_P_1D_ARRAY_V4B8_TRAP:
519 case NVPTX::SUST_P_1D_ARRAY_V4B16_TRAP:
520 case NVPTX::SUST_P_1D_ARRAY_V4B32_TRAP:
521 case NVPTX::SUST_P_2D_B8_TRAP:
522 case NVPTX::SUST_P_2D_B16_TRAP:
523 case NVPTX::SUST_P_2D_B32_TRAP:
524 case NVPTX::SUST_P_2D_V2B8_TRAP:
525 case NVPTX::SUST_P_2D_V2B16_TRAP:
526 case NVPTX::SUST_P_2D_V2B32_TRAP:
527 case NVPTX::SUST_P_2D_V4B8_TRAP:
528 case NVPTX::SUST_P_2D_V4B16_TRAP:
529 case NVPTX::SUST_P_2D_V4B32_TRAP:
530 case NVPTX::SUST_P_2D_ARRAY_B8_TRAP:
531 case NVPTX::SUST_P_2D_ARRAY_B16_TRAP:
532 case NVPTX::SUST_P_2D_ARRAY_B32_TRAP:
533 case NVPTX::SUST_P_2D_ARRAY_V2B8_TRAP:
534 case NVPTX::SUST_P_2D_ARRAY_V2B16_TRAP:
535 case NVPTX::SUST_P_2D_ARRAY_V2B32_TRAP:
536 case NVPTX::SUST_P_2D_ARRAY_V4B8_TRAP:
537 case NVPTX::SUST_P_2D_ARRAY_V4B16_TRAP:
538 case NVPTX::SUST_P_2D_ARRAY_V4B32_TRAP:
539 case NVPTX::SUST_P_3D_B8_TRAP:
540 case NVPTX::SUST_P_3D_B16_TRAP:
541 case NVPTX::SUST_P_3D_B32_TRAP:
542 case NVPTX::SUST_P_3D_V2B8_TRAP:
543 case NVPTX::SUST_P_3D_V2B16_TRAP:
544 case NVPTX::SUST_P_3D_V2B32_TRAP:
545 case NVPTX::SUST_P_3D_V4B8_TRAP:
546 case NVPTX::SUST_P_3D_V4B16_TRAP:
547 case NVPTX::SUST_P_3D_V4B32_TRAP: {
548 // This is a surface store, so operand 0 is a surfref
549 if (OpNo == 0) {
550 lowerImageHandleSymbol(MO.getImm(), MCOp);
551 return true;
552 }
553
554 return false;
555 }
556 case NVPTX::TXQ_CHANNEL_ORDER:
557 case NVPTX::TXQ_CHANNEL_DATA_TYPE:
558 case NVPTX::TXQ_WIDTH:
559 case NVPTX::TXQ_HEIGHT:
560 case NVPTX::TXQ_DEPTH:
561 case NVPTX::TXQ_ARRAY_SIZE:
562 case NVPTX::TXQ_NUM_SAMPLES:
563 case NVPTX::TXQ_NUM_MIPMAP_LEVELS:
564 case NVPTX::SUQ_CHANNEL_ORDER:
565 case NVPTX::SUQ_CHANNEL_DATA_TYPE:
566 case NVPTX::SUQ_WIDTH:
567 case NVPTX::SUQ_HEIGHT:
568 case NVPTX::SUQ_DEPTH:
569 case NVPTX::SUQ_ARRAY_SIZE: {
570 // This is a query, so operand 1 is a surfref/texref
571 if (OpNo == 1) {
572 lowerImageHandleSymbol(MO.getImm(), MCOp);
573 return true;
574 }
575
576 return false;
577 }
578 }
375
376 return false;
579377 }
580378
581379 void NVPTXAsmPrinter::lowerImageHandleSymbol(unsigned Index, MCOperand &MCOp) {
169169 case ISD::INTRINSIC_W_CHAIN:
170170 ResNode = SelectIntrinsicChain(N);
171171 break;
172 case NVPTXISD::Tex1DFloatI32:
172 case NVPTXISD::Tex1DFloatS32:
173173 case NVPTXISD::Tex1DFloatFloat:
174174 case NVPTXISD::Tex1DFloatFloatLevel:
175175 case NVPTXISD::Tex1DFloatFloatGrad:
176 case NVPTXISD::Tex1DI32I32:
177 case NVPTXISD::Tex1DI32Float:
178 case NVPTXISD::Tex1DI32FloatLevel:
179 case NVPTXISD::Tex1DI32FloatGrad:
180 case NVPTXISD::Tex1DArrayFloatI32:
176 case NVPTXISD::Tex1DS32S32:
177 case NVPTXISD::Tex1DS32Float:
178 case NVPTXISD::Tex1DS32FloatLevel:
179 case NVPTXISD::Tex1DS32FloatGrad:
180 case NVPTXISD::Tex1DU32S32:
181 case NVPTXISD::Tex1DU32Float:
182 case NVPTXISD::Tex1DU32FloatLevel:
183 case NVPTXISD::Tex1DU32FloatGrad:
184 case NVPTXISD::Tex1DArrayFloatS32:
181185 case NVPTXISD::Tex1DArrayFloatFloat:
182186 case NVPTXISD::Tex1DArrayFloatFloatLevel:
183187 case NVPTXISD::Tex1DArrayFloatFloatGrad:
184 case NVPTXISD::Tex1DArrayI32I32:
185 case NVPTXISD::Tex1DArrayI32Float:
186 case NVPTXISD::Tex1DArrayI32FloatLevel:
187 case NVPTXISD::Tex1DArrayI32FloatGrad:
188 case NVPTXISD::Tex2DFloatI32:
188 case NVPTXISD::Tex1DArrayS32S32:
189 case NVPTXISD::Tex1DArrayS32Float:
190 case NVPTXISD::Tex1DArrayS32FloatLevel:
191 case NVPTXISD::Tex1DArrayS32FloatGrad:
192 case NVPTXISD::Tex1DArrayU32S32:
193 case NVPTXISD::Tex1DArrayU32Float:
194 case NVPTXISD::Tex1DArrayU32FloatLevel:
195 case NVPTXISD::Tex1DArrayU32FloatGrad:
196 case NVPTXISD::Tex2DFloatS32:
189197 case NVPTXISD::Tex2DFloatFloat:
190198 case NVPTXISD::Tex2DFloatFloatLevel:
191199 case NVPTXISD::Tex2DFloatFloatGrad:
192 case NVPTXISD::Tex2DI32I32:
193 case NVPTXISD::Tex2DI32Float:
194 case NVPTXISD::Tex2DI32FloatLevel:
195 case NVPTXISD::Tex2DI32FloatGrad:
196 case NVPTXISD::Tex2DArrayFloatI32:
200 case NVPTXISD::Tex2DS32S32:
201 case NVPTXISD::Tex2DS32Float:
202 case NVPTXISD::Tex2DS32FloatLevel:
203 case NVPTXISD::Tex2DS32FloatGrad:
204 case NVPTXISD::Tex2DU32S32:
205 case NVPTXISD::Tex2DU32Float:
206 case NVPTXISD::Tex2DU32FloatLevel:
207 case NVPTXISD::Tex2DU32FloatGrad:
208 case NVPTXISD::Tex2DArrayFloatS32:
197209 case NVPTXISD::Tex2DArrayFloatFloat:
198210 case NVPTXISD::Tex2DArrayFloatFloatLevel:
199211 case NVPTXISD::Tex2DArrayFloatFloatGrad:
200 case NVPTXISD::Tex2DArrayI32I32:
201 case NVPTXISD::Tex2DArrayI32Float:
202 case NVPTXISD::Tex2DArrayI32FloatLevel:
203 case NVPTXISD::Tex2DArrayI32FloatGrad:
204 case NVPTXISD::Tex3DFloatI32:
212 case NVPTXISD::Tex2DArrayS32S32:
213 case NVPTXISD::Tex2DArrayS32Float:
214 case NVPTXISD::Tex2DArrayS32FloatLevel:
215 case NVPTXISD::Tex2DArrayS32FloatGrad:
216 case NVPTXISD::Tex2DArrayU32S32:
217 case NVPTXISD::Tex2DArrayU32Float:
218 case NVPTXISD::Tex2DArrayU32FloatLevel:
219 case NVPTXISD::Tex2DArrayU32FloatGrad:
220 case NVPTXISD::Tex3DFloatS32:
205221 case NVPTXISD::Tex3DFloatFloat:
206222 case NVPTXISD::Tex3DFloatFloatLevel:
207223 case NVPTXISD::Tex3DFloatFloatGrad:
208 case NVPTXISD::Tex3DI32I32:
209 case NVPTXISD::Tex3DI32Float:
210 case NVPTXISD::Tex3DI32FloatLevel:
211 case NVPTXISD::Tex3DI32FloatGrad:
224 case NVPTXISD::Tex3DS32S32:
225 case NVPTXISD::Tex3DS32Float:
226 case NVPTXISD::Tex3DS32FloatLevel:
227 case NVPTXISD::Tex3DS32FloatGrad:
228 case NVPTXISD::Tex3DU32S32:
229 case NVPTXISD::Tex3DU32Float:
230 case NVPTXISD::Tex3DU32FloatLevel:
231 case NVPTXISD::Tex3DU32FloatGrad:
232 case NVPTXISD::TexCubeFloatFloat:
233 case NVPTXISD::TexCubeFloatFloatLevel:
234 case NVPTXISD::TexCubeS32Float:
235 case NVPTXISD::TexCubeS32FloatLevel:
236 case NVPTXISD::TexCubeU32Float:
237 case NVPTXISD::TexCubeU32FloatLevel:
238 case NVPTXISD::TexCubeArrayFloatFloat:
239 case NVPTXISD::TexCubeArrayFloatFloatLevel:
240 case NVPTXISD::TexCubeArrayS32Float:
241 case NVPTXISD::TexCubeArrayS32FloatLevel:
242 case NVPTXISD::TexCubeArrayU32Float:
243 case NVPTXISD::TexCubeArrayU32FloatLevel:
244 case NVPTXISD::Tld4R2DFloatFloat:
245 case NVPTXISD::Tld4G2DFloatFloat:
246 case NVPTXISD::Tld4B2DFloatFloat:
247 case NVPTXISD::Tld4A2DFloatFloat:
248 case NVPTXISD::Tld4R2DS64Float:
249 case NVPTXISD::Tld4G2DS64Float:
250 case NVPTXISD::Tld4B2DS64Float:
251 case NVPTXISD::Tld4A2DS64Float:
252 case NVPTXISD::Tld4R2DU64Float:
253 case NVPTXISD::Tld4G2DU64Float:
254 case NVPTXISD::Tld4B2DU64Float:
255 case NVPTXISD::Tld4A2DU64Float:
256 case NVPTXISD::TexUnified1DFloatS32:
257 case NVPTXISD::TexUnified1DFloatFloat:
258 case NVPTXISD::TexUnified1DFloatFloatLevel:
259 case NVPTXISD::TexUnified1DFloatFloatGrad:
260 case NVPTXISD::TexUnified1DS32S32:
261 case NVPTXISD::TexUnified1DS32Float:
262 case NVPTXISD::TexUnified1DS32FloatLevel:
263 case NVPTXISD::TexUnified1DS32FloatGrad:
264 case NVPTXISD::TexUnified1DU32S32:
265 case NVPTXISD::TexUnified1DU32Float:
266 case NVPTXISD::TexUnified1DU32FloatLevel:
267 case NVPTXISD::TexUnified1DU32FloatGrad:
268 case NVPTXISD::TexUnified1DArrayFloatS32:
269 case NVPTXISD::TexUnified1DArrayFloatFloat:
270 case NVPTXISD::TexUnified1DArrayFloatFloatLevel:
271 case NVPTXISD::TexUnified1DArrayFloatFloatGrad:
272 case NVPTXISD::TexUnified1DArrayS32S32:
273 case NVPTXISD::TexUnified1DArrayS32Float:
274 case NVPTXISD::TexUnified1DArrayS32FloatLevel:
275 case NVPTXISD::TexUnified1DArrayS32FloatGrad:
276 case NVPTXISD::TexUnified1DArrayU32S32:
277 case NVPTXISD::TexUnified1DArrayU32Float:
278 case NVPTXISD::TexUnified1DArrayU32FloatLevel:
279 case NVPTXISD::TexUnified1DArrayU32FloatGrad:
280 case NVPTXISD::TexUnified2DFloatS32:
281 case NVPTXISD::TexUnified2DFloatFloat:
282 case NVPTXISD::TexUnified2DFloatFloatLevel:
283 case NVPTXISD::TexUnified2DFloatFloatGrad:
284 case NVPTXISD::TexUnified2DS32S32:
285 case NVPTXISD::TexUnified2DS32Float:
286 case NVPTXISD::TexUnified2DS32FloatLevel:
287 case NVPTXISD::TexUnified2DS32FloatGrad:
288 case NVPTXISD::TexUnified2DU32S32:
289 case NVPTXISD::TexUnified2DU32Float:
290 case NVPTXISD::TexUnified2DU32FloatLevel:
291 case NVPTXISD::TexUnified2DU32FloatGrad:
292 case NVPTXISD::TexUnified2DArrayFloatS32:
293 case NVPTXISD::TexUnified2DArrayFloatFloat:
294 case NVPTXISD::TexUnified2DArrayFloatFloatLevel:
295 case NVPTXISD::TexUnified2DArrayFloatFloatGrad:
296 case NVPTXISD::TexUnified2DArrayS32S32:
297 case NVPTXISD::TexUnified2DArrayS32Float:
298 case NVPTXISD::TexUnified2DArrayS32FloatLevel:
299 case NVPTXISD::TexUnified2DArrayS32FloatGrad:
300 case NVPTXISD::TexUnified2DArrayU32S32:
301 case NVPTXISD::TexUnified2DArrayU32Float:
302 case NVPTXISD::TexUnified2DArrayU32FloatLevel:
303 case NVPTXISD::TexUnified2DArrayU32FloatGrad:
304 case NVPTXISD::TexUnified3DFloatS32:
305 case NVPTXISD::TexUnified3DFloatFloat:
306 case NVPTXISD::TexUnified3DFloatFloatLevel:
307 case NVPTXISD::TexUnified3DFloatFloatGrad:
308 case NVPTXISD::TexUnified3DS32S32:
309 case NVPTXISD::TexUnified3DS32Float:
310 case NVPTXISD::TexUnified3DS32FloatLevel:
311 case NVPTXISD::TexUnified3DS32FloatGrad:
312 case NVPTXISD::TexUnified3DU32S32:
313 case NVPTXISD::TexUnified3DU32Float:
314 case NVPTXISD::TexUnified3DU32FloatLevel:
315 case NVPTXISD::TexUnified3DU32FloatGrad:
316 case NVPTXISD::TexUnifiedCubeFloatFloat:
317 case NVPTXISD::TexUnifiedCubeFloatFloatLevel:
318 case NVPTXISD::TexUnifiedCubeS32Float:
319 case NVPTXISD::TexUnifiedCubeS32FloatLevel:
320 case NVPTXISD::TexUnifiedCubeU32Float:
321 case NVPTXISD::TexUnifiedCubeU32FloatLevel:
322 case NVPTXISD::TexUnifiedCubeArrayFloatFloat:
323 case NVPTXISD::TexUnifiedCubeArrayFloatFloatLevel:
324 case NVPTXISD::TexUnifiedCubeArrayS32Float:
325 case NVPTXISD::TexUnifiedCubeArrayS32FloatLevel:
326 case NVPTXISD::TexUnifiedCubeArrayU32Float:
327 case NVPTXISD::TexUnifiedCubeArrayU32FloatLevel:
328 case NVPTXISD::Tld4UnifiedR2DFloatFloat:
329 case NVPTXISD::Tld4UnifiedG2DFloatFloat:
330 case NVPTXISD::Tld4UnifiedB2DFloatFloat:
331 case NVPTXISD::Tld4UnifiedA2DFloatFloat:
332 case NVPTXISD::Tld4UnifiedR2DS64Float:
333 case NVPTXISD::Tld4UnifiedG2DS64Float:
334 case NVPTXISD::Tld4UnifiedB2DS64Float:
335 case NVPTXISD::Tld4UnifiedA2DS64Float:
336 case NVPTXISD::Tld4UnifiedR2DU64Float:
337 case NVPTXISD::Tld4UnifiedG2DU64Float:
338 case NVPTXISD::Tld4UnifiedB2DU64Float:
339 case NVPTXISD::Tld4UnifiedA2DU64Float:
212340 ResNode = SelectTextureIntrinsic(N);
213341 break;
342 case NVPTXISD::Suld1DI8Clamp:
343 case NVPTXISD::Suld1DI16Clamp:
344 case NVPTXISD::Suld1DI32Clamp:
345 case NVPTXISD::Suld1DI64Clamp:
346 case NVPTXISD::Suld1DV2I8Clamp:
347 case NVPTXISD::Suld1DV2I16Clamp:
348 case NVPTXISD::Suld1DV2I32Clamp:
349 case NVPTXISD::Suld1DV2I64Clamp:
350 case NVPTXISD::Suld1DV4I8Clamp:
351 case NVPTXISD::Suld1DV4I16Clamp:
352 case NVPTXISD::Suld1DV4I32Clamp:
353 case NVPTXISD::Suld1DArrayI8Clamp:
354 case NVPTXISD::Suld1DArrayI16Clamp:
355 case NVPTXISD::Suld1DArrayI32Clamp:
356 case NVPTXISD::Suld1DArrayI64Clamp:
357 case NVPTXISD::Suld1DArrayV2I8Clamp:
358 case NVPTXISD::Suld1DArrayV2I16Clamp:
359 case NVPTXISD::Suld1DArrayV2I32Clamp:
360 case NVPTXISD::Suld1DArrayV2I64Clamp:
361 case NVPTXISD::Suld1DArrayV4I8Clamp:
362 case NVPTXISD::Suld1DArrayV4I16Clamp:
363 case NVPTXISD::Suld1DArrayV4I32Clamp:
364 case NVPTXISD::Suld2DI8Clamp:
365 case NVPTXISD::Suld2DI16Clamp:
366 case NVPTXISD::Suld2DI32Clamp:
367 case NVPTXISD::Suld2DI64Clamp:
368 case NVPTXISD::Suld2DV2I8Clamp:
369 case NVPTXISD::Suld2DV2I16Clamp:
370 case NVPTXISD::Suld2DV2I32Clamp:
371 case NVPTXISD::Suld2DV2I64Clamp:
372 case NVPTXISD::Suld2DV4I8Clamp:
373 case NVPTXISD::Suld2DV4I16Clamp:
374 case NVPTXISD::Suld2DV4I32Clamp:
375 case NVPTXISD::Suld2DArrayI8Clamp:
376 case NVPTXISD::Suld2DArrayI16Clamp:
377 case NVPTXISD::Suld2DArrayI32Clamp:
378 case NVPTXISD::Suld2DArrayI64Clamp:
379 case NVPTXISD::Suld2DArrayV2I8Clamp:
380 case NVPTXISD::Suld2DArrayV2I16Clamp:
381 case NVPTXISD::Suld2DArrayV2I32Clamp:
382 case NVPTXISD::Suld2DArrayV2I64Clamp:
383 case NVPTXISD::Suld2DArrayV4I8Clamp:
384 case NVPTXISD::Suld2DArrayV4I16Clamp:
385 case NVPTXISD::Suld2DArrayV4I32Clamp:
386 case NVPTXISD::Suld3DI8Clamp:
387 case NVPTXISD::Suld3DI16Clamp:
388 case NVPTXISD::Suld3DI32Clamp:
389 case NVPTXISD::Suld3DI64Clamp:
390 case NVPTXISD::Suld3DV2I8Clamp:
391 case NVPTXISD::Suld3DV2I16Clamp:
392 case NVPTXISD::Suld3DV2I32Clamp:
393 case NVPTXISD::Suld3DV2I64Clamp:
394 case NVPTXISD::Suld3DV4I8Clamp:
395 case NVPTXISD::Suld3DV4I16Clamp:
396 case NVPTXISD::Suld3DV4I32Clamp:
214397 case NVPTXISD::Suld1DI8Trap:
215398 case NVPTXISD::Suld1DI16Trap:
216399 case NVPTXISD::Suld1DI32Trap:
400 case NVPTXISD::Suld1DI64Trap:
217401 case NVPTXISD::Suld1DV2I8Trap:
218402 case NVPTXISD::Suld1DV2I16Trap:
219403 case NVPTXISD::Suld1DV2I32Trap:
404 case NVPTXISD::Suld1DV2I64Trap:
220405 case NVPTXISD::Suld1DV4I8Trap:
221406 case NVPTXISD::Suld1DV4I16Trap:
222407 case NVPTXISD::Suld1DV4I32Trap:
223408 case NVPTXISD::Suld1DArrayI8Trap:
224409 case NVPTXISD::Suld1DArrayI16Trap:
225410 case NVPTXISD::Suld1DArrayI32Trap:
411 case NVPTXISD::Suld1DArrayI64Trap:
226412 case NVPTXISD::Suld1DArrayV2I8Trap:
227413 case NVPTXISD::Suld1DArrayV2I16Trap:
228414 case NVPTXISD::Suld1DArrayV2I32Trap:
415 case NVPTXISD::Suld1DArrayV2I64Trap:
229416 case NVPTXISD::Suld1DArrayV4I8Trap:
230417 case NVPTXISD::Suld1DArrayV4I16Trap:
231418 case NVPTXISD::Suld1DArrayV4I32Trap:
232419 case NVPTXISD::Suld2DI8Trap:
233420 case NVPTXISD::Suld2DI16Trap:
234421 case NVPTXISD::Suld2DI32Trap:
422 case NVPTXISD::Suld2DI64Trap:
235423 case NVPTXISD::Suld2DV2I8Trap:
236424 case NVPTXISD::Suld2DV2I16Trap:
237425 case NVPTXISD::Suld2DV2I32Trap:
426 case NVPTXISD::Suld2DV2I64Trap:
238427 case NVPTXISD::Suld2DV4I8Trap:
239428 case NVPTXISD::Suld2DV4I16Trap:
240429 case NVPTXISD::Suld2DV4I32Trap:
241430 case NVPTXISD::Suld2DArrayI8Trap:
242431 case NVPTXISD::Suld2DArrayI16Trap:
243432 case NVPTXISD::Suld2DArrayI32Trap:
433 case NVPTXISD::Suld2DArrayI64Trap:
244434 case NVPTXISD::Suld2DArrayV2I8Trap:
245435 case NVPTXISD::Suld2DArrayV2I16Trap:
246436 case NVPTXISD::Suld2DArrayV2I32Trap:
437 case NVPTXISD::Suld2DArrayV2I64Trap:
247438 case NVPTXISD::Suld2DArrayV4I8Trap:
248439 case NVPTXISD::Suld2DArrayV4I16Trap:
249440 case NVPTXISD::Suld2DArrayV4I32Trap:
250441 case NVPTXISD::Suld3DI8Trap:
251442 case NVPTXISD::Suld3DI16Trap:
252443 case NVPTXISD::Suld3DI32Trap:
444 case NVPTXISD::Suld3DI64Trap:
253445 case NVPTXISD::Suld3DV2I8Trap:
254446 case NVPTXISD::Suld3DV2I16Trap:
255447 case NVPTXISD::Suld3DV2I32Trap:
448 case NVPTXISD::Suld3DV2I64Trap:
256449 case NVPTXISD::Suld3DV4I8Trap:
257450 case NVPTXISD::Suld3DV4I16Trap:
258451 case NVPTXISD::Suld3DV4I32Trap:
452 case NVPTXISD::Suld1DI8Zero:
453 case NVPTXISD::Suld1DI16Zero:
454 case NVPTXISD::Suld1DI32Zero:
455 case NVPTXISD::Suld1DI64Zero:
456 case NVPTXISD::Suld1DV2I8Zero:
457 case NVPTXISD::Suld1DV2I16Zero:
458 case NVPTXISD::Suld1DV2I32Zero:
459 case NVPTXISD::Suld1DV2I64Zero:
460 case NVPTXISD::Suld1DV4I8Zero:
461 case NVPTXISD::Suld1DV4I16Zero:
462 case NVPTXISD::Suld1DV4I32Zero:
463 case NVPTXISD::Suld1DArrayI8Zero:
464 case NVPTXISD::Suld1DArrayI16Zero:
465 case NVPTXISD::Suld1DArrayI32Zero:
466 case NVPTXISD::Suld1DArrayI64Zero:
467 case NVPTXISD::Suld1DArrayV2I8Zero:
468 case NVPTXISD::Suld1DArrayV2I16Zero:
469 case NVPTXISD::Suld1DArrayV2I32Zero:
470 case NVPTXISD::Suld1DArrayV2I64Zero:
471 case NVPTXISD::Suld1DArrayV4I8Zero:
472 case NVPTXISD::Suld1DArrayV4I16Zero:
473 case NVPTXISD::Suld1DArrayV4I32Zero:
474 case NVPTXISD::Suld2DI8Zero:
475 case NVPTXISD::Suld2DI16Zero:
476 case NVPTXISD::Suld2DI32Zero:
477 case NVPTXISD::Suld2DI64Zero:
478 case NVPTXISD::Suld2DV2I8Zero:
479 case NVPTXISD::Suld2DV2I16Zero:
480 case NVPTXISD::Suld2DV2I32Zero:
481 case NVPTXISD::Suld2DV2I64Zero:
482 case NVPTXISD::Suld2DV4I8Zero:
483 case NVPTXISD::Suld2DV4I16Zero:
484 case NVPTXISD::Suld2DV4I32Zero:
485 case NVPTXISD::Suld2DArrayI8Zero:
486 case NVPTXISD::Suld2DArrayI16Zero:
487 case NVPTXISD::Suld2DArrayI32Zero:
488 case NVPTXISD::Suld2DArrayI64Zero:
489 case NVPTXISD::Suld2DArrayV2I8Zero:
490 case NVPTXISD::Suld2DArrayV2I16Zero:
491 case NVPTXISD::Suld2DArrayV2I32Zero:
492 case NVPTXISD::Suld2DArrayV2I64Zero:
493 case NVPTXISD::Suld2DArrayV4I8Zero:
494 case NVPTXISD::Suld2DArrayV4I16Zero:
495 case NVPTXISD::Suld2DArrayV4I32Zero:
496 case NVPTXISD::Suld3DI8Zero:
497 case NVPTXISD::Suld3DI16Zero:
498 case NVPTXISD::Suld3DI32Zero:
499 case NVPTXISD::Suld3DI64Zero:
500 case NVPTXISD::Suld3DV2I8Zero:
501 case NVPTXISD::Suld3DV2I16Zero:
502 case NVPTXISD::Suld3DV2I32Zero:
503 case NVPTXISD::Suld3DV2I64Zero:
504 case NVPTXISD::Suld3DV4I8Zero:
505 case NVPTXISD::Suld3DV4I16Zero:
506 case NVPTXISD::Suld3DV4I32Zero:
259507 ResNode = SelectSurfaceIntrinsic(N);
260508 break;
261509 case ISD::AND:
27803028
27813029 SDNode *NVPTXDAGToDAGISel::SelectTextureIntrinsic(SDNode *N) {
27823030 SDValue Chain = N->getOperand(0);
2783 SDValue TexRef = N->getOperand(1);
2784 SDValue SampRef = N->getOperand(2);
27853031 SDNode *Ret = nullptr;
27863032 unsigned Opc = 0;
27873033 SmallVector Ops;
27883034
27893035 switch (N->getOpcode()) {
27903036 default: return nullptr;
2791 case NVPTXISD::Tex1DFloatI32:
2792 Opc = NVPTX::TEX_1D_F32_I32;
3037 case NVPTXISD::Tex1DFloatS32:
3038 Opc = NVPTX::TEX_1D_F32_S32;
27933039 break;
27943040 case NVPTXISD::Tex1DFloatFloat:
27953041 Opc = NVPTX::TEX_1D_F32_F32;
28003046 case NVPTXISD::Tex1DFloatFloatGrad:
28013047 Opc = NVPTX::TEX_1D_F32_F32_GRAD;
28023048 break;
2803 case NVPTXISD::Tex1DI32I32:
2804 Opc = NVPTX::TEX_1D_I32_I32;
2805 break;
2806 case NVPTXISD::Tex1DI32Float:
2807 Opc = NVPTX::TEX_1D_I32_F32;
2808 break;
2809 case NVPTXISD::Tex1DI32FloatLevel:
2810 Opc = NVPTX::TEX_1D_I32_F32_LEVEL;
2811 break;
2812 case NVPTXISD::Tex1DI32FloatGrad:
2813 Opc = NVPTX::TEX_1D_I32_F32_GRAD;
2814 break;
2815 case NVPTXISD::Tex1DArrayFloatI32:
2816 Opc = NVPTX::TEX_1D_ARRAY_F32_I32;
3049 case NVPTXISD::Tex1DS32S32:
3050 Opc = NVPTX::TEX_1D_S32_S32;
3051 break;
3052 case NVPTXISD::Tex1DS32Float:
3053 Opc = NVPTX::TEX_1D_S32_F32;
3054 break;
3055 case NVPTXISD::Tex1DS32FloatLevel:
3056 Opc = NVPTX::TEX_1D_S32_F32_LEVEL;
3057 break;
3058 case NVPTXISD::Tex1DS32FloatGrad:
3059 Opc = NVPTX::TEX_1D_S32_F32_GRAD;
3060 break;
3061 case NVPTXISD::Tex1DU32S32:
3062 Opc = NVPTX::TEX_1D_U32_S32;
3063 break;
3064 case NVPTXISD::Tex1DU32Float:
3065 Opc = NVPTX::TEX_1D_U32_F32;
3066 break;
3067 case NVPTXISD::Tex1DU32FloatLevel:
3068 Opc = NVPTX::TEX_1D_U32_F32_LEVEL;
3069 break;
3070 case NVPTXISD::Tex1DU32FloatGrad:
3071 Opc = NVPTX::TEX_1D_U32_F32_GRAD;
3072 break;
3073 case NVPTXISD::Tex1DArrayFloatS32:
3074 Opc = NVPTX::TEX_1D_ARRAY_F32_S32;
28173075 break;
28183076 case NVPTXISD::Tex1DArrayFloatFloat:
28193077 Opc = NVPTX::TEX_1D_ARRAY_F32_F32;
28243082 case NVPTXISD::Tex1DArrayFloatFloatGrad:
28253083 Opc = NVPTX::TEX_1D_ARRAY_F32_F32_GRAD;
28263084 break;
2827 case NVPTXISD::Tex1DArrayI32I32:
2828 Opc = NVPTX::TEX_1D_ARRAY_I32_I32;
2829 break;
2830 case NVPTXISD::Tex1DArrayI32Float:
2831 Opc = NVPTX::TEX_1D_ARRAY_I32_F32;
2832 break;
2833 case NVPTXISD::Tex1DArrayI32FloatLevel:
2834 Opc = NVPTX::TEX_1D_ARRAY_I32_F32_LEVEL;
2835 break;
2836 case NVPTXISD::Tex1DArrayI32FloatGrad:
2837 Opc = NVPTX::TEX_1D_ARRAY_I32_F32_GRAD;
2838 break;
2839 case NVPTXISD::Tex2DFloatI32:
2840 Opc = NVPTX::TEX_2D_F32_I32;
3085 case NVPTXISD::Tex1DArrayS32S32:
3086 Opc = NVPTX::TEX_1D_ARRAY_S32_S32;
3087 break;
3088 case NVPTXISD::Tex1DArrayS32Float:
3089 Opc = NVPTX::TEX_1D_ARRAY_S32_F32;
3090 break;
3091 case NVPTXISD::Tex1DArrayS32FloatLevel:
3092 Opc = NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL;
3093 break;
3094 case NVPTXISD::Tex1DArrayS32FloatGrad:
3095 Opc = NVPTX::TEX_1D_ARRAY_S32_F32_GRAD;
3096 break;
3097 case NVPTXISD::Tex1DArrayU32S32:
3098 Opc = NVPTX::TEX_1D_ARRAY_U32_S32;
3099 break;
3100 case NVPTXISD::Tex1DArrayU32Float:
3101 Opc = NVPTX::TEX_1D_ARRAY_U32_F32;
3102 break;
3103 case NVPTXISD::Tex1DArrayU32FloatLevel:
3104 Opc = NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL;
3105 break;
3106 case NVPTXISD::Tex1DArrayU32FloatGrad:
3107 Opc = NVPTX::TEX_1D_ARRAY_U32_F32_GRAD;
3108 break;
3109 case NVPTXISD::Tex2DFloatS32:
3110 Opc = NVPTX::TEX_2D_F32_S32;
28413111 break;
28423112 case NVPTXISD::Tex2DFloatFloat:
28433113 Opc = NVPTX::TEX_2D_F32_F32;
28483118 case NVPTXISD::Tex2DFloatFloatGrad:
28493119 Opc = NVPTX::TEX_2D_F32_F32_GRAD;
28503120 break;
2851 case NVPTXISD::Tex2DI32I32:
2852 Opc = NVPTX::TEX_2D_I32_I32;
2853 break;
2854 case NVPTXISD::Tex2DI32Float:
2855 Opc = NVPTX::TEX_2D_I32_F32;
2856 break;
2857 case NVPTXISD::Tex2DI32FloatLevel:
2858 Opc = NVPTX::TEX_2D_I32_F32_LEVEL;
2859 break;
2860 case NVPTXISD::Tex2DI32FloatGrad:
2861 Opc = NVPTX::TEX_2D_I32_F32_GRAD;
2862 break;
2863 case NVPTXISD::Tex2DArrayFloatI32:
2864 Opc = NVPTX::TEX_2D_ARRAY_F32_I32;
3121 case NVPTXISD::Tex2DS32S32:
3122 Opc = NVPTX::TEX_2D_S32_S32;
3123 break;
3124 case NVPTXISD::Tex2DS32Float:
3125 Opc = NVPTX::TEX_2D_S32_F32;
3126 break;
3127 case NVPTXISD::Tex2DS32FloatLevel:
3128 Opc = NVPTX::TEX_2D_S32_F32_LEVEL;
3129 break;
3130 case NVPTXISD::Tex2DS32FloatGrad:
3131 Opc = NVPTX::TEX_2D_S32_F32_GRAD;
3132 break;
3133 case NVPTXISD::Tex2DU32S32:
3134 Opc = NVPTX::TEX_2D_U32_S32;
3135 break;
3136 case NVPTXISD::Tex2DU32Float:
3137 Opc = NVPTX::TEX_2D_U32_F32;
3138 break;
3139 case NVPTXISD::Tex2DU32FloatLevel:
3140 Opc = NVPTX::TEX_2D_U32_F32_LEVEL;
3141 break;
3142 case NVPTXISD::Tex2DU32FloatGrad:
3143 Opc = NVPTX::TEX_2D_U32_F32_GRAD;
3144 break;
3145 case NVPTXISD::Tex2DArrayFloatS32:
3146 Opc = NVPTX::TEX_2D_ARRAY_F32_S32;
28653147 break;
28663148 case NVPTXISD::Tex2DArrayFloatFloat:
28673149 Opc = NVPTX::TEX_2D_ARRAY_F32_F32;
28723154 case NVPTXISD::Tex2DArrayFloatFloatGrad:
28733155 Opc = NVPTX::TEX_2D_ARRAY_F32_F32_GRAD;
28743156 break;
2875 case NVPTXISD::Tex2DArrayI32I32:
2876 Opc = NVPTX::TEX_2D_ARRAY_I32_I32;
2877 break;
2878 case NVPTXISD::Tex2DArrayI32Float:
2879 Opc = NVPTX::TEX_2D_ARRAY_I32_F32;
2880 break;
2881 case NVPTXISD::Tex2DArrayI32FloatLevel:
2882 Opc = NVPTX::TEX_2D_ARRAY_I32_F32_LEVEL;
2883 break;
2884 case NVPTXISD::Tex2DArrayI32FloatGrad:
2885 Opc = NVPTX::TEX_2D_ARRAY_I32_F32_GRAD;
2886 break;
2887 case NVPTXISD::Tex3DFloatI32:
2888 Opc = NVPTX::TEX_3D_F32_I32;
3157 case NVPTXISD::Tex2DArrayS32S32:
3158 Opc = NVPTX::TEX_2D_ARRAY_S32_S32;
3159 break;
3160 case NVPTXISD::Tex2DArrayS32Float:
3161 Opc = NVPTX::TEX_2D_ARRAY_S32_F32;
3162 break;
3163 case NVPTXISD::Tex2DArrayS32FloatLevel:
3164 Opc = NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL;
3165 break;
3166 case NVPTXISD::Tex2DArrayS32FloatGrad:
3167 Opc = NVPTX::TEX_2D_ARRAY_S32_F32_GRAD;
3168 break;
3169 case NVPTXISD::Tex2DArrayU32S32:
3170 Opc = NVPTX::TEX_2D_ARRAY_U32_S32;
3171 break;
3172 case NVPTXISD::Tex2DArrayU32Float:
3173 Opc = NVPTX::TEX_2D_ARRAY_U32_F32;
3174 break;
3175 case NVPTXISD::Tex2DArrayU32FloatLevel:
3176 Opc = NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL;
3177 break;
3178 case NVPTXISD::Tex2DArrayU32FloatGrad:
3179 Opc = NVPTX::TEX_2D_ARRAY_U32_F32_GRAD;
3180 break;
3181 case NVPTXISD::Tex3DFloatS32:
3182 Opc = NVPTX::TEX_3D_F32_S32;
28893183 break;
28903184 case NVPTXISD::Tex3DFloatFloat:
28913185 Opc = NVPTX::TEX_3D_F32_F32;
28963190 case NVPTXISD::Tex3DFloatFloatGrad:
28973191 Opc = NVPTX::TEX_3D_F32_F32_GRAD;
28983192 break;
2899 case NVPTXISD::Tex3DI32I32:
2900 Opc = NVPTX::TEX_3D_I32_I32;
2901 break;
2902 case NVPTXISD::Tex3DI32Float:
2903 Opc = NVPTX::TEX_3D_I32_F32;
2904 break;
2905 case NVPTXISD::Tex3DI32FloatLevel:
2906 Opc = NVPTX::TEX_3D_I32_F32_LEVEL;
2907 break;
2908 case NVPTXISD::Tex3DI32FloatGrad:
2909 Opc = NVPTX::TEX_3D_I32_F32_GRAD;
3193 case NVPTXISD::Tex3DS32S32:
3194 Opc = NVPTX::TEX_3D_S32_S32;
3195 break;
3196 case NVPTXISD::Tex3DS32Float:
3197 Opc = NVPTX::TEX_3D_S32_F32;
3198 break;
3199 case NVPTXISD::Tex3DS32FloatLevel:
3200 Opc = NVPTX::TEX_3D_S32_F32_LEVEL;
3201 break;
3202 case NVPTXISD::Tex3DS32FloatGrad:
3203 Opc = NVPTX::TEX_3D_S32_F32_GRAD;
3204 break;
3205 case NVPTXISD::Tex3DU32S32:
3206 Opc = NVPTX::TEX_3D_U32_S32;
3207 break;
3208 case NVPTXISD::Tex3DU32Float:
3209 Opc = NVPTX::TEX_3D_U32_F32;
3210 break;
3211 case NVPTXISD::Tex3DU32FloatLevel:
3212 Opc = NVPTX::TEX_3D_U32_F32_LEVEL;
3213 break;
3214 case NVPTXISD::Tex3DU32FloatGrad:
3215 Opc = NVPTX::TEX_3D_U32_F32_GRAD;
3216 break;
3217 case NVPTXISD::TexCubeFloatFloat:
3218 Opc = NVPTX::TEX_CUBE_F32_F32;
3219 break;
3220 case NVPTXISD::TexCubeFloatFloatLevel:
3221 Opc = NVPTX::TEX_CUBE_F32_F32_LEVEL;
3222 break;
3223 case NVPTXISD::TexCubeS32Float:
3224 Opc = NVPTX::TEX_CUBE_S32_F32;
3225 break;
3226 case NVPTXISD::TexCubeS32FloatLevel:
3227 Opc = NVPTX::TEX_CUBE_S32_F32_LEVEL;
3228 break;
3229 case NVPTXISD::TexCubeU32Float:
3230 Opc = NVPTX::TEX_CUBE_U32_F32;
3231 break;
3232 case NVPTXISD::TexCubeU32FloatLevel:
3233 Opc = NVPTX::TEX_CUBE_U32_F32_LEVEL;
3234 break;
3235 case NVPTXISD::TexCubeArrayFloatFloat:
3236 Opc = NVPTX::TEX_CUBE_ARRAY_F32_F32;
3237 break;
3238 case NVPTXISD::TexCubeArrayFloatFloatLevel:
3239 Opc = NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL;
3240 break;
3241 case NVPTXISD::TexCubeArrayS32Float:
3242 Opc = NVPTX::TEX_CUBE_ARRAY_S32_F32;
3243 break;
3244 case NVPTXISD::TexCubeArrayS32FloatLevel:
3245 Opc = NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL;
3246 break;
3247 case NVPTXISD::TexCubeArrayU32Float:
3248 Opc = NVPTX::TEX_CUBE_ARRAY_U32_F32;
3249 break;
3250 case NVPTXISD::TexCubeArrayU32FloatLevel:
3251 Opc = NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL;
3252 break;
3253 case NVPTXISD::Tld4R2DFloatFloat:
3254 Opc = NVPTX::TLD4_R_2D_F32_F32;
3255 break;
3256 case NVPTXISD::Tld4G2DFloatFloat:
3257 Opc = NVPTX::TLD4_G_2D_F32_F32;
3258 break;
3259 case NVPTXISD::Tld4B2DFloatFloat:
3260 Opc = NVPTX::TLD4_B_2D_F32_F32;
3261 break;
3262 case NVPTXISD::Tld4A2DFloatFloat:
3263 Opc = NVPTX::TLD4_A_2D_F32_F32;
3264 break;
3265 case NVPTXISD::Tld4R2DS64Float:
3266 Opc = NVPTX::TLD4_R_2D_S32_F32;
3267 break;
3268 case NVPTXISD::Tld4G2DS64Float:
3269 Opc = NVPTX::TLD4_G_2D_S32_F32;
3270 break;
3271 case NVPTXISD::Tld4B2DS64Float:
3272 Opc = NVPTX::TLD4_B_2D_S32_F32;
3273 break;
3274 case NVPTXISD::Tld4A2DS64Float:
3275 Opc = NVPTX::TLD4_A_2D_S32_F32;
3276 break;
3277 case NVPTXISD::Tld4R2DU64Float:
3278 Opc = NVPTX::TLD4_R_2D_U32_F32;
3279 break;
3280 case NVPTXISD::Tld4G2DU64Float:
3281 Opc = NVPTX::TLD4_G_2D_U32_F32;
3282 break;
3283 case NVPTXISD::Tld4B2DU64Float:
3284 Opc = NVPTX::TLD4_B_2D_U32_F32;
3285 break;
3286 case NVPTXISD::Tld4A2DU64Float:
3287 Opc = NVPTX::TLD4_A_2D_U32_F32;
3288 break;
3289 case NVPTXISD::TexUnified1DFloatS32:
3290 Opc = NVPTX::TEX_UNIFIED_1D_F32_S32;
3291 break;
3292 case NVPTXISD::TexUnified1DFloatFloat:
3293 Opc = NVPTX::TEX_UNIFIED_1D_F32_F32;
3294 break;
3295 case NVPTXISD::TexUnified1DFloatFloatLevel:
3296 Opc = NVPTX::TEX_UNIFIED_1D_F32_F32_LEVEL;
3297 break;
3298 case NVPTXISD::TexUnified1DFloatFloatGrad:
3299 Opc = NVPTX::TEX_UNIFIED_1D_F32_F32_GRAD;
3300 break;
3301 case NVPTXISD::TexUnified1DS32S32:
3302 Opc = NVPTX::TEX_UNIFIED_1D_S32_S32;
3303 break;
3304 case NVPTXISD::TexUnified1DS32Float:
3305 Opc = NVPTX::TEX_UNIFIED_1D_S32_F32;
3306 break;
3307 case NVPTXISD::TexUnified1DS32FloatLevel:
3308 Opc = NVPTX::TEX_UNIFIED_1D_S32_F32_LEVEL;
3309 break;
3310 case NVPTXISD::TexUnified1DS32FloatGrad:
3311 Opc = NVPTX::TEX_UNIFIED_1D_S32_F32_GRAD;
3312 break;
3313 case NVPTXISD::TexUnified1DU32S32:
3314 Opc = NVPTX::TEX_UNIFIED_1D_U32_S32;
3315 break;
3316 case NVPTXISD::TexUnified1DU32Float:
3317 Opc = NVPTX::TEX_UNIFIED_1D_U32_F32;
3318 break;
3319 case NVPTXISD::TexUnified1DU32FloatLevel:
3320 Opc = NVPTX::TEX_UNIFIED_1D_U32_F32_LEVEL;
3321 break;
3322 case NVPTXISD::TexUnified1DU32FloatGrad:
3323 Opc = NVPTX::TEX_UNIFIED_1D_U32_F32_GRAD;
3324 break;
3325 case NVPTXISD::TexUnified1DArrayFloatS32:
3326 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_F32_S32;
3327 break;
3328 case NVPTXISD::TexUnified1DArrayFloatFloat:
3329 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32;
3330 break;
3331 case NVPTXISD::TexUnified1DArrayFloatFloatLevel:
3332 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_LEVEL;
3333 break;
3334 case NVPTXISD::TexUnified1DArrayFloatFloatGrad:
3335 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_GRAD;
3336 break;
3337 case NVPTXISD::TexUnified1DArrayS32S32:
3338 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_S32_S32;
3339 break;
3340 case NVPTXISD::TexUnified1DArrayS32Float:
3341 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32;
3342 break;
3343 case NVPTXISD::TexUnified1DArrayS32FloatLevel:
3344 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_LEVEL;
3345 break;
3346 case NVPTXISD::TexUnified1DArrayS32FloatGrad:
3347 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_GRAD;
3348 break;
3349 case NVPTXISD::TexUnified1DArrayU32S32:
3350 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_U32_S32;
3351 break;
3352 case NVPTXISD::TexUnified1DArrayU32Float:
3353 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32;
3354 break;
3355 case NVPTXISD::TexUnified1DArrayU32FloatLevel:
3356 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_LEVEL;
3357 break;
3358 case NVPTXISD::TexUnified1DArrayU32FloatGrad:
3359 Opc = NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_GRAD;
3360 break;
3361 case NVPTXISD::TexUnified2DFloatS32:
3362 Opc = NVPTX::TEX_UNIFIED_2D_F32_S32;
3363 break;
3364 case NVPTXISD::TexUnified2DFloatFloat:
3365 Opc = NVPTX::TEX_UNIFIED_2D_F32_F32;
3366 break;
3367 case NVPTXISD::TexUnified2DFloatFloatLevel:
3368 Opc = NVPTX::TEX_UNIFIED_2D_F32_F32_LEVEL;
3369 break;
3370 case NVPTXISD::TexUnified2DFloatFloatGrad:
3371 Opc = NVPTX::TEX_UNIFIED_2D_F32_F32_GRAD;
3372 break;
3373 case NVPTXISD::TexUnified2DS32S32:
3374 Opc = NVPTX::TEX_UNIFIED_2D_S32_S32;
3375 break;
3376 case NVPTXISD::TexUnified2DS32Float:
3377 Opc = NVPTX::TEX_UNIFIED_2D_S32_F32;
3378 break;
3379 case NVPTXISD::TexUnified2DS32FloatLevel:
3380 Opc = NVPTX::TEX_UNIFIED_2D_S32_F32_LEVEL;
3381 break;
3382 case NVPTXISD::TexUnified2DS32FloatGrad:
3383 Opc = NVPTX::TEX_UNIFIED_2D_S32_F32_GRAD;
3384 break;
3385 case NVPTXISD::TexUnified2DU32S32:
3386 Opc = NVPTX::TEX_UNIFIED_2D_U32_S32;
3387 break;
3388 case NVPTXISD::TexUnified2DU32Float:
3389 Opc = NVPTX::TEX_UNIFIED_2D_U32_F32;
3390 break;
3391 case NVPTXISD::TexUnified2DU32FloatLevel:
3392 Opc = NVPTX::TEX_UNIFIED_2D_U32_F32_LEVEL;
3393 break;
3394 case NVPTXISD::TexUnified2DU32FloatGrad:
3395 Opc = NVPTX::TEX_UNIFIED_2D_U32_F32_GRAD;
3396 break;
3397 case NVPTXISD::TexUnified2DArrayFloatS32:
3398 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_F32_S32;
3399 break;
3400 case NVPTXISD::TexUnified2DArrayFloatFloat:
3401 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32;
3402 break;
3403 case NVPTXISD::TexUnified2DArrayFloatFloatLevel:
3404 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_LEVEL;
3405 break;
3406 case NVPTXISD::TexUnified2DArrayFloatFloatGrad:
3407 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_GRAD;
3408 break;
3409 case NVPTXISD::TexUnified2DArrayS32S32:
3410 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_S32_S32;
3411 break;
3412 case NVPTXISD::TexUnified2DArrayS32Float:
3413 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32;
3414 break;
3415 case NVPTXISD::TexUnified2DArrayS32FloatLevel:
3416 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_LEVEL;
3417 break;
3418 case NVPTXISD::TexUnified2DArrayS32FloatGrad:
3419 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_GRAD;
3420 break;
3421 case NVPTXISD::TexUnified2DArrayU32S32:
3422 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_U32_S32;
3423 break;
3424 case NVPTXISD::TexUnified2DArrayU32Float:
3425 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32;
3426 break;
3427 case NVPTXISD::TexUnified2DArrayU32FloatLevel:
3428 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_LEVEL;
3429 break;
3430 case NVPTXISD::TexUnified2DArrayU32FloatGrad:
3431 Opc = NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_GRAD;
3432 break;
3433 case NVPTXISD::TexUnified3DFloatS32:
3434 Opc = NVPTX::TEX_UNIFIED_3D_F32_S32;
3435 break;
3436 case NVPTXISD::TexUnified3DFloatFloat:
3437 Opc = NVPTX::TEX_UNIFIED_3D_F32_F32;
3438 break;
3439 case NVPTXISD::TexUnified3DFloatFloatLevel:
3440 Opc = NVPTX::TEX_UNIFIED_3D_F32_F32_LEVEL;
3441 break;
3442 case NVPTXISD::TexUnified3DFloatFloatGrad:
3443 Opc = NVPTX::TEX_UNIFIED_3D_F32_F32_GRAD;
3444 break;
3445 case NVPTXISD::TexUnified3DS32S32:
3446 Opc = NVPTX::TEX_UNIFIED_3D_S32_S32;
3447 break;
3448 case NVPTXISD::TexUnified3DS32Float:
3449 Opc = NVPTX::TEX_UNIFIED_3D_S32_F32;
3450 break;
3451 case NVPTXISD::TexUnified3DS32FloatLevel:
3452 Opc = NVPTX::TEX_UNIFIED_3D_S32_F32_LEVEL;
3453 break;
3454 case NVPTXISD::TexUnified3DS32FloatGrad:
3455 Opc = NVPTX::TEX_UNIFIED_3D_S32_F32_GRAD;
3456 break;
3457 case NVPTXISD::TexUnified3DU32S32:
3458 Opc = NVPTX::TEX_UNIFIED_3D_U32_S32;
3459 break;
3460 case NVPTXISD::TexUnified3DU32Float:
3461 Opc = NVPTX::TEX_UNIFIED_3D_U32_F32;
3462 break;
3463 case NVPTXISD::TexUnified3DU32FloatLevel:
3464 Opc = NVPTX::TEX_UNIFIED_3D_U32_F32_LEVEL;
3465 break;
3466 case NVPTXISD::TexUnified3DU32FloatGrad:
3467 Opc = NVPTX::TEX_UNIFIED_3D_U32_F32_GRAD;
3468 break;
3469 case NVPTXISD::TexUnifiedCubeFloatFloat:
3470 Opc = NVPTX::TEX_UNIFIED_CUBE_F32_F32;
3471 break;
3472 case NVPTXISD::TexUnifiedCubeFloatFloatLevel:
3473 Opc = NVPTX::TEX_UNIFIED_CUBE_F32_F32_LEVEL;
3474 break;
3475 case NVPTXISD::TexUnifiedCubeS32Float:
3476 Opc = NVPTX::TEX_UNIFIED_CUBE_S32_F32;
3477 break;
3478 case NVPTXISD::TexUnifiedCubeS32FloatLevel:
3479 Opc = NVPTX::TEX_UNIFIED_CUBE_S32_F32_LEVEL;
3480 break;
3481 case NVPTXISD::TexUnifiedCubeU32Float:
3482 Opc = NVPTX::TEX_UNIFIED_CUBE_U32_F32;
3483 break;
3484 case NVPTXISD::TexUnifiedCubeU32FloatLevel:
3485 Opc = NVPTX::TEX_UNIFIED_CUBE_U32_F32_LEVEL;
3486 break;
3487 case NVPTXISD::TexUnifiedCubeArrayFloatFloat:
3488 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32;
3489 break;
3490 case NVPTXISD::TexUnifiedCubeArrayFloatFloatLevel:
3491 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_LEVEL;
3492 break;
3493 case NVPTXISD::TexUnifiedCubeArrayS32Float:
3494 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32;
3495 break;
3496 case NVPTXISD::TexUnifiedCubeArrayS32FloatLevel:
3497 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_LEVEL;
3498 break;
3499 case NVPTXISD::TexUnifiedCubeArrayU32Float:
3500 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32;
3501 break;
3502 case NVPTXISD::TexUnifiedCubeArrayU32FloatLevel:
3503 Opc = NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_LEVEL;
3504 break;
3505 case NVPTXISD::Tld4UnifiedR2DFloatFloat:
3506 Opc = NVPTX::TLD4_UNIFIED_R_2D_F32_F32;
3507 break;
3508 case NVPTXISD::Tld4UnifiedG2DFloatFloat:
3509 Opc = NVPTX::TLD4_UNIFIED_G_2D_F32_F32;
3510 break;
3511 case NVPTXISD::Tld4UnifiedB2DFloatFloat:
3512 Opc = NVPTX::TLD4_UNIFIED_B_2D_F32_F32;
3513 break;
3514 case NVPTXISD::Tld4UnifiedA2DFloatFloat:
3515 Opc = NVPTX::TLD4_UNIFIED_A_2D_F32_F32;
3516 break;
3517 case NVPTXISD::Tld4UnifiedR2DS64Float:
3518 Opc = NVPTX::TLD4_UNIFIED_R_2D_S32_F32;
3519 break;
3520 case NVPTXISD::Tld4UnifiedG2DS64Float:
3521 Opc = NVPTX::TLD4_UNIFIED_G_2D_S32_F32;
3522 break;
3523 case NVPTXISD::Tld4UnifiedB2DS64Float:
3524 Opc = NVPTX::TLD4_UNIFIED_B_2D_S32_F32;
3525 break;
3526 case NVPTXISD::Tld4UnifiedA2DS64Float:
3527 Opc = NVPTX::TLD4_UNIFIED_A_2D_S32_F32;
3528 break;
3529 case NVPTXISD::Tld4UnifiedR2DU64Float:
3530 Opc = NVPTX::TLD4_UNIFIED_R_2D_U32_F32;
3531 break;
3532 case NVPTXISD::Tld4UnifiedG2DU64Float:
3533 Opc = NVPTX::TLD4_UNIFIED_G_2D_U32_F32;
3534 break;
3535 case NVPTXISD::Tld4UnifiedB2DU64Float:
3536 Opc = NVPTX::TLD4_UNIFIED_B_2D_U32_F32;
3537 break;
3538 case NVPTXISD::Tld4UnifiedA2DU64Float:
3539 Opc = NVPTX::TLD4_UNIFIED_A_2D_U32_F32;
29103540 break;
29113541 }
29123542
2913 Ops.push_back(TexRef);
2914 Ops.push_back(SampRef);
2915
2916 // Copy over indices
2917 for (unsigned i = 3; i < N->getNumOperands(); ++i) {
3543 // Copy over operands
3544 for (unsigned i = 1; i < N->getNumOperands(); ++i) {
29183545 Ops.push_back(N->getOperand(i));
29193546 }
29203547
29313558 SmallVector Ops;
29323559 switch (N->getOpcode()) {
29333560 default: return nullptr;
3561 case NVPTXISD::Suld1DI8Clamp:
3562 Opc = NVPTX::SULD_1D_I8_CLAMP;
3563 Ops.push_back(TexHandle);
3564 Ops.push_back(N->getOperand(2));
3565 Ops.push_back(Chain);
3566 break;
3567 case NVPTXISD::Suld1DI16Clamp:
3568 Opc = NVPTX::SULD_1D_I16_CLAMP;
3569 Ops.push_back(TexHandle);
3570 Ops.push_back(N->getOperand(2));
3571 Ops.push_back(Chain);
3572 break;
3573 case NVPTXISD::Suld1DI32Clamp:
3574 Opc = NVPTX::SULD_1D_I32_CLAMP;
3575 Ops.push_back(TexHandle);
3576 Ops.push_back(N->getOperand(2));
3577 Ops.push_back(Chain);
3578 break;
3579 case NVPTXISD::Suld1DI64Clamp:
3580 Opc = NVPTX::SULD_1D_I64_CLAMP;
3581 Ops.push_back(TexHandle);
3582 Ops.push_back(N->getOperand(2));
3583 Ops.push_back(Chain);
3584 break;
3585 case NVPTXISD::Suld1DV2I8Clamp:
3586 Opc = NVPTX::SULD_1D_V2I8_CLAMP;
3587 Ops.push_back(TexHandle);
3588 Ops.push_back(N->getOperand(2));
3589 Ops.push_back(Chain);
3590 break;
3591 case NVPTXISD::Suld1DV2I16Clamp:
3592 Opc = NVPTX::SULD_1D_V2I16_CLAMP;
3593 Ops.push_back(TexHandle);
3594 Ops.push_back(N->getOperand(2));
3595 Ops.push_back(Chain);
3596 break;
3597 case NVPTXISD::Suld1DV2I32Clamp:
3598 Opc = NVPTX::SULD_1D_V2I32_CLAMP;
3599 Ops.push_back(TexHandle);
3600 Ops.push_back(N->getOperand(2));
3601 Ops.push_back(Chain);
3602 break;
3603 case NVPTXISD::Suld1DV2I64Clamp:
3604 Opc = NVPTX::SULD_1D_V2I64_CLAMP;
3605 Ops.push_back(TexHandle);
3606 Ops.push_back(N->getOperand(2));
3607 Ops.push_back(Chain);
3608 break;
3609 case NVPTXISD::Suld1DV4I8Clamp:
3610 Opc = NVPTX::SULD_1D_V4I8_CLAMP;
3611 Ops.push_back(TexHandle);
3612 Ops.push_back(N->getOperand(2));
3613 Ops.push_back(Chain);
3614 break;
3615