llvm.org GIT mirror llvm / d5b679c
Weekly fix of register allocation dependent unit tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 8 years ago
7 changed file(s) with 40 addition(s) and 33 deletion(s). Raw diff Collapse all Expand all
2222 %tmp2 = load i8** %scevgep5
2323 %0 = ptrtoint i8* %tmp2 to i32
2424
25 ; ARM: ands r12, r12, #3
25 ; ARM: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
2626 ; ARM-NEXT: beq
2727
2828 ; THUMB: movs r[[R0:[0-9]+]], #3
3030 ; THUMB-NEXT: cmp r[[R0]], #0
3131 ; THUMB-NEXT: beq
3232
33 ; T2: ands r12, r12, #3
33 ; T2: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
3434 ; T2-NEXT: beq
3535
3636 %and = and i32 %0, 3
4141 br label %L2
4242
4343 L2: ; preds = %L3, %bb2
44 ; THUMB: muls
4445 %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; [#uses=1]
4546 %phitmp = mul i32 %res.2, 6 ; [#uses=1]
4647 br label %L1
4748
4849 L1: ; preds = %L2, %bb2
4950 %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; [#uses=1]
50 ; ARM: ldr r1, LCPI
51 ; ARM: add r1, pc, r1
52 ; ARM: str r1
53 ; THUMB: ldr.n r2, LCPI
54 ; THUMB: add r2, pc
55 ; THUMB: str r2
56 ; THUMB2: ldr.n r2, LCPI
57 ; THUMB2-NEXT: str r2
51 ; ARM: ldr [[R1:r[0-9]+]], LCPI
52 ; ARM: add [[R1b:r[0-9]+]], pc, [[R1]]
53 ; ARM: str [[R1b]]
54 ; THUMB: ldr.n
55 ; THUMB: add
56 ; THUMB: ldr.n [[R2:r[0-9]+]], LCPI
57 ; THUMB: add [[R2]], pc
58 ; THUMB: str [[R2]]
59 ; THUMB2: ldr.n [[R2:r[0-9]+]], LCPI
60 ; THUMB2-NEXT: str{{(.w)?}} [[R2]]
5861 store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
5962 ret i32 %res.3
6063 }
0 ; RUN: llc < %s -mtriple=armv6-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V6
1 ; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5
2 ; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI
1 ; RUN: llc < %s -mtriple=armv5-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V5
2 ; RUN: llc < %s -mtriple=armv6-eabi -regalloc=linearscan | FileCheck %s -check-prefix=EABI
33 ; rdar://r6949835
44
55 ; Magic ARM pair hints works best with linearscan.
None ; RUN: llc < %s -stats |& grep {39.*Number of machine instrs printed}
1 ; RUN: llc < %s -stats |& not grep {.*Number of re-materialization}
0 ; RUN: llc < %s | FileCheck %s
21 ; This test really wants to check that the resultant "cond_true" block only
32 ; has a single store in it, and that cond_true55 only has code to materialize
43 ; the constant and do a store. We do *not* want something like this:
76 ; add r8, r0, r6
87 ; str r10, [r8, #+4]
98 ;
9 ; CHECK: ldr [[R6:r[0-9*]+]], LCP
10 ; CHECK: cmp {{.*}}, [[R6]]
11 ; CHECK: ldrle
12 ; CHECK-NEXT: strle
13
1014 target triple = "arm-apple-darwin8"
1115
1216 define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) {
77 define void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
88 entry:
99 ; GENERIC: t:
10 ; GENERIC: ldrb r2
11 ; GENERIC: ldrb r3
12 ; GENERIC: ldrb r12
13 ; GENERIC: ldrb r1
14 ; GENERIC: strb r1
15 ; GENERIC: strb r12
16 ; GENERIC: strb r3
17 ; GENERIC: strb r2
10 ; GENERIC: ldrb [[R2:r[0-9]+]]
11 ; GENERIC: ldrb [[R3:r[0-9]+]]
12 ; GENERIC: ldrb [[R12:r[0-9]+]]
13 ; GENERIC: ldrb [[R1:r[0-9]+]]
14 ; GENERIC: strb [[R1]]
15 ; GENERIC: strb [[R12]]
16 ; GENERIC: strb [[R3]]
17 ; GENERIC: strb [[R2]]
1818
1919 ; DARWIN_V6: t:
2020 ; DARWIN_V6: ldr r1
1313
1414 bb.nph: ; preds = %entry
1515 ; CHECK: BB#1
16 ; CHECK: movw r2, :lower16:L_GV$non_lazy_ptr
17 ; CHECK: movt r2, :upper16:L_GV$non_lazy_ptr
18 ; CHECK: ldr r2, [r2]
19 ; CHECK: ldr r3, [r2]
16 ; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr
17 ; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr
18 ; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]]
19 ; CHECK: ldr{{.*}}, [r[[R2b]]
2020 ; CHECK: LBB0_2
2121 ; CHECK-NOT: LCPI0_0:
2222
2323 ; PIC: BB#1
24 ; PIC: movw r2, :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4))
25 ; PIC: movt r2, :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4))
26 ; PIC: add r2, pc
27 ; PIC: ldr r2, [r2]
28 ; PIC: ldr r3, [r2]
24 ; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4))
25 ; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4))
26 ; PIC: add r[[R2]], pc
27 ; PIC: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]]
28 ; PIC: ldr{{.*}}, [r[[R2b]]
2929 ; PIC: LBB0_2
3030 ; PIC-NOT: LCPI0_0:
3131 ; PIC: .section
8888 ; CHECK: bb.nph
8989 ; CHECK: movw {{(r[0-9])|(lr)}}, #32768
9090 ; CHECK: movs {{(r[0-9]+)|(lr)}}, #0
91 ; CHECK: movw [[REGISTER:(r[0-9])|(lr)]], #16386
91 ; CHECK: movw [[REGISTER:(r[0-9]+)|(lr)]], #16386
9292 ; CHECK: movw {{(r[0-9]+)|(lr)}}, #65534
9393 ; CHECK: movt {{(r[0-9]+)|(lr)}}, #65535
9494 br label %bb
1717 ret i32 0
1818 }
1919
20 ; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax
20 ; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip)
2121 ; CHECK: movb 38(%rsp), [[R0:%.+]]
2222 ; CHECK: movb 8(%rsp), [[R1:%.+]]
2323 ; CHECK: movb [[R1]], 8(%rsp)