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Merging r259894: ------------------------------------------------------------------------ r259894 | thomas.stellard | 2016-02-05 09:42:38 -0800 (Fri, 05 Feb 2016) | 8 lines AMDGPU/SI: Correctly initialize SIInsertWaits pass Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16724 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@271594 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 3 years ago
3 changed file(s) with 22 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
4848 FunctionPass *createSIFixSGPRCopiesPass();
4949 FunctionPass *createSIFixSGPRLiveRangesPass();
5050 FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
51 FunctionPass *createSIInsertWaits(TargetMachine &tm);
51 FunctionPass *createSIInsertWaitsPass();
5252
5353 ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C);
5454
9090
9191 void initializeSIAnnotateControlFlowPass(PassRegistry&);
9292 extern char &SIAnnotateControlFlowPassID;
93
94 void initializeSIInsertWaitsPass(PassRegistry&);
95 extern char &SIInsertWaitsID;
9396
9497 extern Target TheAMDGPUTarget;
9598 extern Target TheGCNTarget;
5353 initializeAMDGPUAnnotateUniformValuesPass(*PR);
5454 initializeAMDGPUPromoteAllocaPass(*PR);
5555 initializeSIAnnotateControlFlowPass(*PR);
56 initializeSIInsertWaitsPass(*PR);
5657 }
5758
5859 static std::unique_ptr createTLOF(const Triple &TT) {
358359 }
359360
360361 void GCNPassConfig::addPreEmitPass() {
361 addPass(createSIInsertWaits(*TM), false);
362 addPass(createSIInsertWaitsPass(), false);
362363 addPass(createSILowerControlFlowPass(*TM), false);
363364 }
364365
2525 #include "llvm/CodeGen/MachineInstrBuilder.h"
2626 #include "llvm/CodeGen/MachineRegisterInfo.h"
2727
28 #define DEBUG_TYPE "si-insert-waits"
29
2830 using namespace llvm;
2931
3032 namespace {
5254 class SIInsertWaits : public MachineFunctionPass {
5355
5456 private:
55 static char ID;
5657 const SIInstrInfo *TII;
5758 const SIRegisterInfo *TRI;
5859 const MachineRegisterInfo *MRI;
115116 void handleSendMsg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I);
116117
117118 public:
118 SIInsertWaits(TargetMachine &tm) :
119 static char ID;
120
121 SIInsertWaits() :
119122 MachineFunctionPass(ID),
120123 TII(nullptr),
121124 TRI(nullptr),
135138
136139 } // End anonymous namespace
137140
141 INITIALIZE_PASS_BEGIN(SIInsertWaits, DEBUG_TYPE,
142 "SI Insert Waits", false, false)
143 INITIALIZE_PASS_END(SIInsertWaits, DEBUG_TYPE,
144 "SI Insert Waits", false, false)
145
138146 char SIInsertWaits::ID = 0;
147
148 char &llvm::SIInsertWaitsID = SIInsertWaits::ID;
149
150 FunctionPass *llvm::createSIInsertWaitsPass() {
151 return new SIInsertWaits();
152 }
139153
140154 const Counters SIInsertWaits::WaitCounts = { { 15, 7, 15 } };
141155 const Counters SIInsertWaits::ZeroCounts = { { 0, 0, 0 } };
142156
143 FunctionPass *llvm::createSIInsertWaits(TargetMachine &tm) {
144 return new SIInsertWaits(tm);
145 }
146157
147158 Counters SIInsertWaits::getHwCounts(MachineInstr &MI) {
148159 uint64_t TSFlags = MI.getDesc().TSFlags;