llvm.org GIT mirror llvm / d53cdbf
[RuntimeDyld][MachO] Support ARM64_RELOC_BRANCH26 for BL instructions by relaxing an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326290 91177308-0d34-0410-b5e6-96231b3b80d8 Lang Hames 2 years ago
2 changed file(s) with 12 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
6565 Addend = *reinterpret_cast(LocalAddress);
6666 break;
6767 case MachO::ARM64_RELOC_BRANCH26: {
68 // Verify that the relocation points to the expected branch instruction.
69 auto *p = reinterpret_cast(LocalAddress);
70 assert((*p & 0xFC000000) == 0x14000000 && "Expected branch instruction.");
68 // Verify that the relocation points to a B/BL instruction.
69 auto *p = reinterpret_cast(LocalAddress);
70 assert(((*p & 0xFC000000) == 0x14000000 ||
71 (*p & 0xFC000000) == 0x94000000)
72 && "Expected branch instruction.");
7173
7274 // Get the 26 bit addend encoded in the branch instruction and sign-extend
7375 // to 64 bit. The lower 2 bits are always zeros and are therefore implicit
2222 b _foo
2323 ret
2424
25 .globl _test_branch_reloc_bl
26 .align 2
27 # rtdyld-check: decode_operand(br2, 0)[25:0] = (_foo - br2)[27:2]
28 _test_branch_reloc_bl:
29 br2:
30 bl _foo
31 ret
2532
2633 # Test ARM64_RELOC_PAGE21 and ARM64_RELOC_PAGEOFF12 relocation. adrp encodes
2734 # the PC-relative page (4 KiB) difference between the adrp instruction and the