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[SystemZ] Register compare-and-branch support This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Sandiford 7 years ago
26 changed file(s) with 1344 addition(s) and 79 deletion(s). Raw diff Collapse all Expand all
16081608 return NewMBB;
16091609 }
16101610
1611 bool SystemZTargetLowering::
1612 convertPrevCompareToBranch(MachineBasicBlock *MBB,
1613 MachineBasicBlock::iterator MBBI,
1614 unsigned CCMask, MachineBasicBlock *Target) const {
1615 MachineBasicBlock::iterator Compare = MBBI;
1616 MachineBasicBlock::iterator Begin = MBB->begin();
1617 do
1618 {
1619 if (Compare == Begin)
1620 return false;
1621 --Compare;
1622 }
1623 while (Compare->isDebugValue());
1624
1625 const SystemZInstrInfo *TII = TM.getInstrInfo();
1626 unsigned FusedOpcode = TII->getCompareAndBranch(Compare->getOpcode());
1627 if (!FusedOpcode)
1628 return false;
1629
1630 DebugLoc DL = Compare->getDebugLoc();
1631 BuildMI(*MBB, MBBI, DL, TII->get(FusedOpcode))
1632 .addOperand(Compare->getOperand(0)).addOperand(Compare->getOperand(1))
1633 .addImm(CCMask).addMBB(Target);
1634 Compare->removeFromParent();
1635 return true;
1636 }
1637
16111638 // Implement EmitInstrWithCustomInserter for pseudo Select* instruction MI.
16121639 MachineBasicBlock *
16131640 SystemZTargetLowering::emitSelect(MachineInstr *MI,
16251652 MachineBasicBlock *FalseMBB = emitBlockAfter(StartMBB);
16261653
16271654 // StartMBB:
1628 // ...
1629 // TrueVal = ...
1630 // cmpTY ccX, r1, r2
1631 // jCC JoinMBB
1655 // BRC CCMask, JoinMBB
16321656 // # fallthrough to FalseMBB
1657 //
1658 // The original DAG glues comparisons to their uses, both to ensure
1659 // that no CC-clobbering instructions are inserted between them, and
1660 // to ensure that comparison results are not reused. This means that
1661 // this Select is the sole user of any preceding comparison instruction
1662 // and that we can try to use a fused compare and branch instead.
16331663 MBB = StartMBB;
1634 BuildMI(MBB, DL, TII->get(SystemZ::BRC)).addImm(CCMask).addMBB(JoinMBB);
1664 if (!convertPrevCompareToBranch(MBB, MI, CCMask, JoinMBB))
1665 BuildMI(MBB, DL, TII->get(SystemZ::BRC)).addImm(CCMask).addMBB(JoinMBB);
16351666 MBB->addSuccessor(JoinMBB);
16361667 MBB->addSuccessor(FalseMBB);
16371668
18531884 if (IsSubWord)
18541885 BuildMI(MBB, DL, TII->get(SystemZ::RLL), RotatedOldVal)
18551886 .addReg(OldVal).addReg(BitShift).addImm(0);
1856 BuildMI(MBB, DL, TII->get(CompareOpcode))
1857 .addReg(RotatedOldVal).addReg(Src2);
1858 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
1859 .addImm(KeepOldMask).addMBB(UpdateMBB);
1887 unsigned FusedOpcode = TII->getCompareAndBranch(CompareOpcode);
1888 if (FusedOpcode)
1889 BuildMI(MBB, DL, TII->get(FusedOpcode))
1890 .addReg(RotatedOldVal).addReg(Src2)
1891 .addImm(KeepOldMask).addMBB(UpdateMBB);
1892 else {
1893 BuildMI(MBB, DL, TII->get(CompareOpcode))
1894 .addReg(RotatedOldVal).addReg(Src2);
1895 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
1896 .addImm(KeepOldMask).addMBB(UpdateMBB);
1897 }
18601898 MBB->addSuccessor(UpdateMBB);
18611899 MBB->addSuccessor(UseAltMBB);
18621900
19581996 // ^^ Replace the upper 32-BitSize bits of the
19591997 // comparison value with those that we loaded,
19601998 // so that we can use a full word comparison.
1961 // CR %Dest, %RetryCmpVal
1962 // JNE DoneMBB
1999 // CRJNE %Dest, %RetryCmpVal, DoneMBB
19632000 // # Fall through to SetMBB
19642001 MBB = LoopMBB;
19652002 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
19752012 .addReg(OldVal).addReg(BitShift).addImm(BitSize);
19762013 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RetryCmpVal)
19772014 .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);
1978 BuildMI(MBB, DL, TII->get(SystemZ::CR))
1979 .addReg(Dest).addReg(RetryCmpVal);
1980 BuildMI(MBB, DL, TII->get(SystemZ::BRC)).addImm(MaskNE).addMBB(DoneMBB);
2015 BuildMI(MBB, DL, TII->get(SystemZ::CRJ))
2016 .addReg(Dest).addReg(RetryCmpVal)
2017 .addImm(MaskNE).addMBB(DoneMBB);
19812018 MBB->addSuccessor(DoneMBB);
19822019 MBB->addSuccessor(SetMBB);
19832020
22262263
22272264 case SystemZ::ATOMIC_CMP_SWAPW:
22282265 return emitAtomicCmpSwapW(MI, MBB);
2266 case SystemZ::BRC:
2267 // The original DAG glues comparisons to their uses, both to ensure
2268 // that no CC-clobbering instructions are inserted between them, and
2269 // to ensure that comparison results are not reused. This means that
2270 // a BRC is the sole user of a preceding comparison and that we can
2271 // try to use a fused compare and branch instead.
2272 if (convertPrevCompareToBranch(MBB, MI, MI->getOperand(0).getImm(),
2273 MI->getOperand(1).getMBB()))
2274 MI->eraseFromParent();
2275 return MBB;
22292276 default:
22302277 llvm_unreachable("Unexpected instr type to insert");
22312278 }
1515 #define LLVM_TARGET_SystemZ_ISELLOWERING_H
1616
1717 #include "SystemZ.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
1819 #include "llvm/CodeGen/SelectionDAG.h"
1920 #include "llvm/Target/TargetLowering.h"
2021
188189 SDValue lowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
189190 SDValue lowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
190191
192 // If the last instruction before MBBI in MBB was some form of COMPARE,
193 // try to replace it with a COMPARE AND BRANCH just before MBBI.
194 // CCMask and Target are the BRC-like operands for the branch.
195 // Return true if the change was made.
196 bool convertPrevCompareToBranch(MachineBasicBlock *MBB,
197 MachineBasicBlock::iterator MBBI,
198 unsigned CCMask,
199 MachineBasicBlock *Target) const;
200
191201 // Implement EmitInstrWithCustomInserter for individual operation types.
192202 MachineBasicBlock *emitSelect(MachineInstr *MI,
193203 MachineBasicBlock *BB) const;
107107 let Inst{23-20} = R1;
108108 let Inst{19-16} = op{3-0};
109109 let Inst{15-0} = I2;
110 }
111
112 class InstRIEb op, dag outs, dag ins, string asmstr, list pattern>
113 : InstSystemZ<6, outs, ins, asmstr, pattern> {
114 field bits<48> Inst;
115 field bits<48> SoftFail = 0;
116
117 bits<4> R1;
118 bits<4> R2;
119 bits<4> M3;
120 bits<16> RI4;
121
122 let Inst{47-40} = op{15-8};
123 let Inst{39-36} = R1;
124 let Inst{35-32} = R2;
125 let Inst{31-16} = RI4;
126 let Inst{15-12} = M3;
127 let Inst{11-8} = 0;
128 let Inst{7-0} = op{7-0};
110129 }
111130
112131 class InstRIEf op, dag outs, dag ins, string asmstr, list pattern>
129129 // Can't handle indirect branches.
130130 SystemZII::Branch Branch(getBranchInfo(I));
131131 if (!Branch.Target->isMBB())
132 return true;
133
134 // Punt on compound branches.
135 if (Branch.Type != SystemZII::BranchNormal)
132136 return true;
133137
134138 if (Branch.CCMask == SystemZ::CCMASK_ANY) {
360364 case SystemZ::BR:
361365 case SystemZ::J:
362366 case SystemZ::JG:
363 return SystemZII::Branch(SystemZ::CCMASK_ANY, &MI->getOperand(0));
367 return SystemZII::Branch(SystemZII::BranchNormal, SystemZ::CCMASK_ANY,
368 &MI->getOperand(0));
364369
365370 case SystemZ::BRC:
366371 case SystemZ::BRCL:
367 return SystemZII::Branch(MI->getOperand(0).getImm(), &MI->getOperand(1));
372 return SystemZII::Branch(SystemZII::BranchNormal,
373 MI->getOperand(0).getImm(), &MI->getOperand(1));
374
375 case SystemZ::CRJ:
376 return SystemZII::Branch(SystemZII::BranchC, MI->getOperand(2).getImm(),
377 &MI->getOperand(3));
378
379 case SystemZ::CGRJ:
380 return SystemZII::Branch(SystemZII::BranchCG, MI->getOperand(2).getImm(),
381 &MI->getOperand(3));
368382
369383 default:
370384 llvm_unreachable("Unrecognized branch opcode");
425439 return 0;
426440 }
427441
442 unsigned SystemZInstrInfo::getCompareAndBranch(unsigned Opcode) const {
443 switch (Opcode) {
444 case SystemZ::CR:
445 return SystemZ::CRJ;
446 case SystemZ::CGR:
447 return SystemZ::CGRJ;
448 default:
449 return 0;
450 }
451 }
452
428453 void SystemZInstrInfo::loadImmediate(MachineBasicBlock &MBB,
429454 MachineBasicBlock::iterator MBBI,
430455 unsigned Reg, uint64_t Value) const {
4141 // @GOT (aka @GOTENT)
4242 MO_GOT = (1 << 0)
4343 };
44 // Classifies a branch.
45 enum BranchType {
46 // An instruction that branches on the current value of CC.
47 BranchNormal,
48
49 // An instruction that peforms a 32-bit signed comparison and branches
50 // on the result.
51 BranchC,
52
53 // An instruction that peforms a 64-bit signed comparison and branches
54 // on the result.
55 BranchCG
56 };
4457 // Information about a branch instruction.
4558 struct Branch {
59 // The type of the branch.
60 BranchType Type;
61
4662 // CCMASK_ is set if the branch should be taken when CC == N.
4763 unsigned CCMask;
4864
4965 // The target of the branch.
5066 const MachineOperand *Target;
5167
52 Branch(unsigned ccMask, const MachineOperand *target)
53 : CCMask(ccMask), Target(target) {}
68 Branch(BranchType type, unsigned ccMask, const MachineOperand *target)
69 : Type(type), CCMask(ccMask), Target(target) {}
5470 };
5571 }
5672
124140 // exists.
125141 unsigned getOpcodeForOffset(unsigned Opcode, int64_t Offset) const;
126142
143 // If Opcode is a COMPARE opcode for which an associated COMPARE AND
144 // BRANCH exists, return the opcode for the latter, otherwise return 0.
145 unsigned getCompareAndBranch(unsigned Opcode) const;
146
127147 // Emit code before MBBI in MI to move immediate value Value into
128148 // physical register Reg.
129149 void loadImmediate(MachineBasicBlock &MBB,
5757 // in their raw BRC/BRCL form, with the 4-bit condition-code mask being
5858 // the first operand. It seems friendlier to use mnemonic forms like
5959 // JE and JLH when writing out the assembly though.
60 multiclass CondBranches {
60 //
61 // Using a custom inserter for BRC gives us a chance to convert the BRC
62 // and a preceding compare into a single compare-and-branch instruction.
63 // The inserter makes no change in cases where a separate branch really
64 // is needed.
65 multiclass CondBranches {
6166 let isBranch = 1, isTerminator = 1, Uses = [CC] in {
62 def "" : InstRI<0xA74, (outs), (ins imm:$R1, brtarget16:$I2), short, []>;
63 def L : InstRIL<0xC04, (outs), (ins imm:$R1, brtarget32:$I2), long, []>;
64 }
65 }
66 let isCodeGenOnly = 1 in
67 def "" : InstRI<0xA74, (outs), (ins ccmask:$R1, brtarget16:$I2), short, []>;
68 def L : InstRIL<0xC04, (outs), (ins ccmask:$R1, brtarget32:$I2), long, []>;
69 }
70 }
71 let isCodeGenOnly = 1, usesCustomInserter = 1 in
6772 defm BRC : CondBranches;
6873 defm AsmBRC : CondBranches;
6974
7075 def : Pat<(z_br_ccmask cond4:$cond, bb:$dst), (BRC cond4:$cond, bb:$dst)>;
7176
72 // Define AsmParser mnemonics for each condition code.
73 multiclass CondExtendedMnemonic Cond, string name> {
74 let R1 = Cond in {
75 def "" : InstRI<0xA74, (outs), (ins brtarget16:$I2),
76 "j"##name##"\t$I2", []>;
77 // Fused compare-and-branch instructions. As for normal branches,
78 // we handle these instructions internally in their raw CRJ-like form,
79 // but use assembly macros like CRJE when writing them out.
80 //
81 // These instructions do not use or clobber the condition codes.
82 // We nevertheless pretend that they clobber CC, so that we can lower
83 // them to separate comparisons and BRCLs if the branch ends up being
84 // out of range.
85 multiclass CompareBranches {
86 let isBranch = 1, isTerminator = 1, Defs = [CC] in {
87 def RJ : InstRIEb<0xEC76, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
88 brtarget16:$RI4),
89 "crj"#pos1#"\t$R1, $R2, "#pos2#"$RI4", []>;
90 def GRJ : InstRIEb<0xEC64, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
91 brtarget16:$RI4),
92 "cgrj"#pos1#"\t$R1, $R2, "#pos2#"$RI4", []>;
93 }
94 }
95 let isCodeGenOnly = 1 in
96 defm C : CompareBranches;
97 defm AsmC : CompareBranches;
98
99 // Define AsmParser mnemonics for each general condition-code mask
100 // (integer or floating-point)
101 multiclass CondExtendedMnemonic ccmask, string name> {
102 let R1 = ccmask in {
103 def "" : InstRI<0xA74, (outs), (ins brtarget16:$I2), "j"#name#"\t$I2", []>;
77104 def L : InstRIL<0xC04, (outs), (ins brtarget32:$I2),
78 "jg"##name##"\t$I2", []>;
105 "jg"#name#"\t$I2", []>;
79106 }
80107 }
81108 defm AsmJO : CondExtendedMnemonic<1, "o">;
92119 defm AsmJLE : CondExtendedMnemonic<12, "le">;
93120 defm AsmJNH : CondExtendedMnemonic<13, "nh">;
94121 defm AsmJNO : CondExtendedMnemonic<14, "no">;
122
123 // Define AsmParser mnemonics for each integer condition-code mask.
124 // This is like the list above, except that condition 3 is not possible
125 // and that the low bit of the mask is therefore always 0. This means
126 // that each condition has two names. Conditions "o" and "no" are not used.
127 //
128 // We don't make one of the two names an alias of the other because
129 // we need the custom parsing routines to select the correct register class.
130 multiclass IntCondExtendedMnemonicA ccmask, string name> {
131 let M3 = ccmask in {
132 def CR : InstRIEb<0xEC76, (outs), (ins GR32:$R1, GR32:$R2,
133 brtarget16:$RI4),
134 "crj"##name##"\t$R1, $R2, $RI4", []>;
135 def CGR : InstRIEb<0xEC64, (outs), (ins GR64:$R1, GR64:$R2,
136 brtarget16:$RI4),
137 "cgrj"##name##"\t$R1, $R2, $RI4", []>;
138 }
139 }
140 multiclass IntCondExtendedMnemonic ccmask, string name1, string name2>
141 : IntCondExtendedMnemonicA {
142 let isAsmParserOnly = 1 in
143 defm Alt : IntCondExtendedMnemonicA;
144 }
145 defm AsmJH : IntCondExtendedMnemonic<2, "h", "nle">;
146 defm AsmJL : IntCondExtendedMnemonic<4, "l", "nhe">;
147 defm AsmJLH : IntCondExtendedMnemonic<6, "lh", "ne">;
148 defm AsmJE : IntCondExtendedMnemonic<8, "e", "nlh">;
149 defm AsmJHE : IntCondExtendedMnemonic<10, "he", "nl">;
150 defm AsmJLE : IntCondExtendedMnemonic<12, "le", "nh">;
95151
96152 def Select32 : SelectWrapper;
97153 def Select64 : SelectWrapper;
150150 bool mustRelaxBranch(const TerminatorInfo &Terminator, uint64_t Address);
151151 bool mustRelaxABranch();
152152 void setWorstCaseAddresses();
153 void splitCompareBranch(MachineInstr *MI, unsigned CompareOpcode);
153154 void relaxBranch(TerminatorInfo &Terminator);
154155 void relaxBranches();
155156
219220 // Relaxes to BRCL, which is 2 bytes longer.
220221 Terminator.ExtraRelaxSize = 2;
221222 break;
223 case SystemZ::CRJ:
224 // Relaxes to a CR/BRCL sequence, which is 2 bytes longer.
225 Terminator.ExtraRelaxSize = 2;
226 break;
227 case SystemZ::CGRJ:
228 // Relaxes to a CGR/BRCL sequence, which is 4 bytes longer.
229 Terminator.ExtraRelaxSize = 4;
230 break;
222231 default:
223232 llvm_unreachable("Unrecognized branch instruction");
224233 }
318327 }
319328 }
320329
330 // Split MI into the comparison given by CompareOpcode followed
331 // a BRCL on the result.
332 void SystemZLongBranch::splitCompareBranch(MachineInstr *MI,
333 unsigned CompareOpcode) {
334 MachineBasicBlock *MBB = MI->getParent();
335 DebugLoc DL = MI->getDebugLoc();
336 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode))
337 .addOperand(MI->getOperand(0))
338 .addOperand(MI->getOperand(1));
339 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
340 .addOperand(MI->getOperand(2))
341 .addOperand(MI->getOperand(3));
342 // The implicit use of CC is a killing use.
343 BRCL->getOperand(2).setIsKill();
344 MI->eraseFromParent();
345 }
346
321347 // Relax the branch described by Terminator.
322348 void SystemZLongBranch::relaxBranch(TerminatorInfo &Terminator) {
323349 MachineInstr *Branch = Terminator.Branch;
327353 break;
328354 case SystemZ::BRC:
329355 Branch->setDesc(TII->get(SystemZ::BRCL));
356 break;
357 case SystemZ::CRJ:
358 splitCompareBranch(Branch, SystemZ::CR);
359 break;
360 case SystemZ::CGRJ:
361 splitCompareBranch(Branch, SystemZ::CGR);
330362 break;
331363 default:
332364 llvm_unreachable("Unrecognized branch");
0 # Test 32-bit COMPARE AND BRANCH in cases where the sheer number of
1 # instructions causes some branches to be out of range.
2 # RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
3
4 # Construct:
5 #
6 # before0:
7 # conditional branch to after0
8 # ...
9 # beforeN:
10 # conditional branch to after0
11 # main:
12 # 0xffcc bytes, from MVIY instructions
13 # conditional branch to main
14 # after0:
15 # ...
16 # conditional branch to main
17 # afterN:
18 #
19 # Each conditional branch sequence occupies 12 bytes if it uses a short
20 # branch and 14 if it uses a long one. The ones before "main:" have to
21 # take the branch length into account, which is 6 for short branches,
22 # so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
23 # The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
24 # can use short branches.
25 #
26 # CHECK: lb [[REG:%r[0-5]]], 0(%r3)
27 # CHECK: cr %r4, [[REG]]
28 # CHECK: jge [[LABEL:\.L[^ ]*]]
29 # CHECK: lb [[REG:%r[0-5]]], 1(%r3)
30 # CHECK: cr %r4, [[REG]]
31 # CHECK: jge [[LABEL]]
32 # CHECK: lb [[REG:%r[0-5]]], 2(%r3)
33 # CHECK: cr %r4, [[REG]]
34 # CHECK: jge [[LABEL]]
35 # CHECK: lb [[REG:%r[0-5]]], 3(%r3)
36 # CHECK: cr %r4, [[REG]]
37 # CHECK: jge [[LABEL]]
38 # CHECK: lb [[REG:%r[0-5]]], 4(%r3)
39 # CHECK: cr %r4, [[REG]]
40 # CHECK: jge [[LABEL]]
41 # CHECK: lb [[REG:%r[0-5]]], 5(%r3)
42 # CHECK: crje %r4, [[REG]], [[LABEL]]
43 # CHECK: lb [[REG:%r[0-5]]], 6(%r3)
44 # CHECK: crje %r4, [[REG]], [[LABEL]]
45 # CHECK: lb [[REG:%r[0-5]]], 7(%r3)
46 # CHECK: crje %r4, [[REG]], [[LABEL]]
47 # ...main goes here...
48 # CHECK: lb [[REG:%r[0-5]]], 25(%r3)
49 # CHECK: crje %r4, [[REG]], [[LABEL:\.L[^ ]*]]
50 # CHECK: lb [[REG:%r[0-5]]], 26(%r3)
51 # CHECK: crje %r4, [[REG]], [[LABEL]]
52 # CHECK: lb [[REG:%r[0-5]]], 27(%r3)
53 # CHECK: crje %r4, [[REG]], [[LABEL]]
54 # CHECK: lb [[REG:%r[0-5]]], 28(%r3)
55 # CHECK: crje %r4, [[REG]], [[LABEL]]
56 # CHECK: lb [[REG:%r[0-5]]], 29(%r3)
57 # CHECK: cr %r4, [[REG]]
58 # CHECK: jge [[LABEL]]
59 # CHECK: lb [[REG:%r[0-5]]], 30(%r3)
60 # CHECK: cr %r4, [[REG]]
61 # CHECK: jge [[LABEL]]
62 # CHECK: lb [[REG:%r[0-5]]], 31(%r3)
63 # CHECK: cr %r4, [[REG]]
64 # CHECK: jge [[LABEL]]
65 # CHECK: lb [[REG:%r[0-5]]], 32(%r3)
66 # CHECK: cr %r4, [[REG]]
67 # CHECK: jge [[LABEL]]
68
69 branch_blocks = 8
70 main_size = 0xffcc
71
72 print 'define void @f1(i8 *%base, i8 *%stop, i32 %limit) {'
73 print 'entry:'
74 print ' br label %before0'
75 print ''
76
77 for i in xrange(branch_blocks):
78 next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
79 print 'before%d:' % i
80 print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i)
81 print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i)
82 print ' %%bext%d = sext i8 %%bcur%d to i32' % (i, i)
83 print ' %%btest%d = icmp eq i32 %%limit, %%bext%d' % (i, i)
84 print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
85 print ''
86
87 print '%s:' % next
88 a, b = 1, 1
89 for i in xrange(0, main_size, 6):
90 a, b = b, a + b
91 offset = 4096 + b % 500000
92 value = a % 256
93 print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset)
94 print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i)
95
96 for i in xrange(branch_blocks):
97 print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25)
98 print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i)
99 print ' %%aext%d = sext i8 %%acur%d to i32' % (i, i)
100 print ' %%atest%d = icmp eq i32 %%limit, %%aext%d' % (i, i)
101 print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i)
102 print ''
103 print 'after%d:' % i
104
105 print ' ret void'
106 print '}'
0 # Test 64-bit COMPARE AND BRANCH in cases where the sheer number of
1 # instructions causes some branches to be out of range.
2 # RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
3
4 # Construct:
5 #
6 # before0:
7 # conditional branch to after0
8 # ...
9 # beforeN:
10 # conditional branch to after0
11 # main:
12 # 0xffcc bytes, from MVIY instructions
13 # conditional branch to main
14 # after0:
15 # ...
16 # conditional branch to main
17 # afterN:
18 #
19 # Each conditional branch sequence occupies 12 bytes if it uses a short
20 # branch and 16 if it uses a long one. The ones before "main:" have to
21 # take the branch length into account, which is 6 for short branches,
22 # so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
23 # The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
24 # can use short branches. The conservative algorithm we use makes
25 # one of the forward branches unnecessarily long, as noted in the
26 # check output below.
27 #
28 # CHECK: lgb [[REG:%r[0-5]]], 0(%r3)
29 # CHECK: cgr %r4, [[REG]]
30 # CHECK: jge [[LABEL:\.L[^ ]*]]
31 # CHECK: lgb [[REG:%r[0-5]]], 1(%r3)
32 # CHECK: cgr %r4, [[REG]]
33 # CHECK: jge [[LABEL]]
34 # CHECK: lgb [[REG:%r[0-5]]], 2(%r3)
35 # CHECK: cgr %r4, [[REG]]
36 # CHECK: jge [[LABEL]]
37 # CHECK: lgb [[REG:%r[0-5]]], 3(%r3)
38 # CHECK: cgr %r4, [[REG]]
39 # CHECK: jge [[LABEL]]
40 # CHECK: lgb [[REG:%r[0-5]]], 4(%r3)
41 # CHECK: cgr %r4, [[REG]]
42 # CHECK: jge [[LABEL]]
43 # ...as mentioned above, the next one could be a CGRJE instead...
44 # CHECK: lgb [[REG:%r[0-5]]], 5(%r3)
45 # CHECK: cgr %r4, [[REG]]
46 # CHECK: jge [[LABEL]]
47 # CHECK: lgb [[REG:%r[0-5]]], 6(%r3)
48 # CHECK: cgrje %r4, [[REG]], [[LABEL]]
49 # CHECK: lgb [[REG:%r[0-5]]], 7(%r3)
50 # CHECK: cgrje %r4, [[REG]], [[LABEL]]
51 # ...main goes here...
52 # CHECK: lgb [[REG:%r[0-5]]], 25(%r3)
53 # CHECK: cgrje %r4, [[REG]], [[LABEL:\.L[^ ]*]]
54 # CHECK: lgb [[REG:%r[0-5]]], 26(%r3)
55 # CHECK: cgrje %r4, [[REG]], [[LABEL]]
56 # CHECK: lgb [[REG:%r[0-5]]], 27(%r3)
57 # CHECK: cgrje %r4, [[REG]], [[LABEL]]
58 # CHECK: lgb [[REG:%r[0-5]]], 28(%r3)
59 # CHECK: cgrje %r4, [[REG]], [[LABEL]]
60 # CHECK: lgb [[REG:%r[0-5]]], 29(%r3)
61 # CHECK: cgr %r4, [[REG]]
62 # CHECK: jge [[LABEL]]
63 # CHECK: lgb [[REG:%r[0-5]]], 30(%r3)
64 # CHECK: cgr %r4, [[REG]]
65 # CHECK: jge [[LABEL]]
66 # CHECK: lgb [[REG:%r[0-5]]], 31(%r3)
67 # CHECK: cgr %r4, [[REG]]
68 # CHECK: jge [[LABEL]]
69 # CHECK: lgb [[REG:%r[0-5]]], 32(%r3)
70 # CHECK: cgr %r4, [[REG]]
71 # CHECK: jge [[LABEL]]
72
73 branch_blocks = 8
74 main_size = 0xffcc
75
76 print 'define void @f1(i8 *%base, i8 *%stop, i64 %limit) {'
77 print 'entry:'
78 print ' br label %before0'
79 print ''
80
81 for i in xrange(branch_blocks):
82 next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
83 print 'before%d:' % i
84 print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i)
85 print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i)
86 print ' %%bext%d = sext i8 %%bcur%d to i64' % (i, i)
87 print ' %%btest%d = icmp eq i64 %%limit, %%bext%d' % (i, i)
88 print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
89 print ''
90
91 print '%s:' % next
92 a, b = 1, 1
93 for i in xrange(0, main_size, 6):
94 a, b = b, a + b
95 offset = 4096 + b % 500000
96 value = a % 256
97 print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset)
98 print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i)
99
100 for i in xrange(branch_blocks):
101 print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25)
102 print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i)
103 print ' %%aext%d = sext i8 %%acur%d to i64' % (i, i)
104 print ' %%atest%d = icmp eq i64 %%limit, %%aext%d' % (i, i)
105 print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i)
106 print ''
107 print 'after%d:' % i
108
109 print ' ret void'
110 print '}'
1818 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
1919 ; CHECK: [[LOOP:\.[^:]*]]:
2020 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
21 ; CHECK: cr [[ROT]], %r3
22 ; CHECK: jle [[KEEP:\..*]]
21 ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]]
2322 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
2423 ; CHECK: [[KEEP]]:
2524 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
3938 ; CHECK-SHIFT2: f1:
4039 ; CHECK-SHIFT2: sll %r3, 24
4140 ; CHECK-SHIFT2: rll
42 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
41 ; CHECK-SHIFT2: crjle {{%r[0-9]+}}, %r3
4342 ; CHECK-SHIFT2: rll
4443 ; CHECK-SHIFT2: rll
4544 ; CHECK-SHIFT2: br %r14
5554 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
5655 ; CHECK: [[LOOP:\.[^:]*]]:
5756 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
58 ; CHECK: cr [[ROT]], %r3
59 ; CHECK: jhe [[KEEP:\..*]]
57 ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]]
6058 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
6159 ; CHECK: [[KEEP]]:
6260 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
7674 ; CHECK-SHIFT2: f2:
7775 ; CHECK-SHIFT2: sll %r3, 24
7876 ; CHECK-SHIFT2: rll
79 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
77 ; CHECK-SHIFT2: crjhe {{%r[0-9]+}}, %r3
8078 ; CHECK-SHIFT2: rll
8179 ; CHECK-SHIFT2: rll
8280 ; CHECK-SHIFT2: br %r14
163161 define i8 @f5(i8 *%src) {
164162 ; CHECK: f5:
165163 ; CHECK: llilh [[SRC2:%r[0-9]+]], 33024
166 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
164 ; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
167165 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
168166 ; CHECK: br %r14
169167 ;
180178 define i8 @f6(i8 *%src) {
181179 ; CHECK: f6:
182180 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32256
183 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
181 ; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
184182 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
185183 ; CHECK: br %r14
186184 ;
1818 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
1919 ; CHECK: [[LOOP:\.[^:]*]]:
2020 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
21 ; CHECK: cr [[ROT]], %r3
22 ; CHECK: jle [[KEEP:\..*]]
21 ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]]
2322 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
2423 ; CHECK: [[KEEP]]:
2524 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
3938 ; CHECK-SHIFT2: f1:
4039 ; CHECK-SHIFT2: sll %r3, 16
4140 ; CHECK-SHIFT2: rll
42 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
41 ; CHECK-SHIFT2: crjle {{%r[0-9]+}}, %r3
4342 ; CHECK-SHIFT2: rll
4443 ; CHECK-SHIFT2: rll
4544 ; CHECK-SHIFT2: br %r14
5554 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
5655 ; CHECK: [[LOOP:\.[^:]*]]:
5756 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
58 ; CHECK: cr [[ROT]], %r3
59 ; CHECK: jhe [[KEEP:\..*]]
57 ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]]
6058 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
6159 ; CHECK: [[KEEP]]:
6260 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
7674 ; CHECK-SHIFT2: f2:
7775 ; CHECK-SHIFT2: sll %r3, 16
7876 ; CHECK-SHIFT2: rll
79 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
77 ; CHECK-SHIFT2: crjhe {{%r[0-9]+}}, %r3
8078 ; CHECK-SHIFT2: rll
8179 ; CHECK-SHIFT2: rll
8280 ; CHECK-SHIFT2: br %r14
163161 define i16 @f5(i16 *%src) {
164162 ; CHECK: f5:
165163 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32769
166 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
164 ; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
167165 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
168166 ; CHECK: br %r14
169167 ;
180178 define i16 @f6(i16 *%src) {
181179 ; CHECK: f6:
182180 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32766
183 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
181 ; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
184182 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
185183 ; CHECK: br %r14
186184 ;
66 ; CHECK: f1:
77 ; CHECK: l %r2, 0(%r3)
88 ; CHECK: [[LOOP:\.[^:]*]]:
9 ; CHECK: cr %r2, %r4
109 ; CHECK: lr [[NEW:%r[0-9]+]], %r2
11 ; CHECK: jle [[KEEP:\..*]]
10 ; CHECK: crjle %r2, %r4, [[KEEP:\..*]]
1211 ; CHECK: lr [[NEW]], %r4
1312 ; CHECK: cs %r2, [[NEW]], 0(%r3)
1413 ; CHECK: jlh [[LOOP]]
2221 ; CHECK: f2:
2322 ; CHECK: l %r2, 0(%r3)
2423 ; CHECK: [[LOOP:\.[^:]*]]:
25 ; CHECK: cr %r2, %r4
2624 ; CHECK: lr [[NEW:%r[0-9]+]], %r2
27 ; CHECK: jhe [[KEEP:\..*]]
25 ; CHECK: crjhe %r2, %r4, [[KEEP:\..*]]
2826 ; CHECK: lr [[NEW]], %r4
2927 ; CHECK: cs %r2, [[NEW]], 0(%r3)
3028 ; CHECK: jlh [[LOOP]]
163161 ; CHECK: lhi [[LIMIT:%r[0-9]+]], 42
164162 ; CHECK: l %r2, 0(%r3)
165163 ; CHECK: [[LOOP:\.[^:]*]]:
166 ; CHECK: cr %r2, [[LIMIT]]
167164 ; CHECK: lr [[NEW:%r[0-9]+]], %r2
168 ; CHECK: jle [[KEEP:\..*]]
165 ; CHECK: crjle %r2, [[LIMIT]], [[KEEP:\..*]]
169166 ; CHECK: lr [[NEW]], [[LIMIT]]
170167 ; CHECK: cs %r2, [[NEW]], 0(%r3)
171168 ; CHECK: jlh [[LOOP]]
66 ; CHECK: f1:
77 ; CHECK: lg %r2, 0(%r3)
88 ; CHECK: [[LOOP:\.[^:]*]]:
9 ; CHECK: cgr %r2, %r4
109 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
11 ; CHECK: jle [[KEEP:\..*]]
10 ; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
1211 ; CHECK: lgr [[NEW]], %r4
1312 ; CHECK: csg %r2, [[NEW]], 0(%r3)
1413 ; CHECK: jlh [[LOOP]]
2221 ; CHECK: f2:
2322 ; CHECK: lg %r2, 0(%r3)
2423 ; CHECK: [[LOOP:\.[^:]*]]:
25 ; CHECK: cgr %r2, %r4
2624 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
27 ; CHECK: jhe [[KEEP:\..*]]
25 ; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
2826 ; CHECK: lgr [[NEW]], %r4
2927 ; CHECK: csg %r2, [[NEW]], 0(%r3)
3028 ; CHECK: jlh [[LOOP]]
130128 ; CHECK: lghi [[LIMIT:%r[0-9]+]], 42
131129 ; CHECK: lg %r2, 0(%r3)
132130 ; CHECK: [[LOOP:\.[^:]*]]:
133 ; CHECK: cgr %r2, [[LIMIT]]
134131 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
135 ; CHECK: jle [[KEEP:\..*]]
132 ; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
136133 ; CHECK: lgr [[NEW]], [[LIMIT]]
137134 ; CHECK: csg %r2, [[NEW]], 0(%r3)
138135 ; CHECK: jlh [[LOOP]]
0 ; Test all condition-code masks that are relevant for signed integer
1 ; comparisons.
1 ; comparisons, in cases where a separate branch is better than COMPARE
2 ; AND BRANCH.
23 ;
34 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
45
0 ; Test all condition-code masks that are relevant for CRJ.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3
4 declare i32 @foo();
5
6 define void @f1(i32 %target) {
7 ; CHECK: f1:
8 ; CHECK: .cfi_def_cfa_offset
9 ; CHECK: .L[[LABEL:.*]]:
10 ; CHECK: crje %r2, {{%r[0-9]+}}, .L[[LABEL]]
11 br label %loop
12 loop:
13 %val = call i32 @foo()
14 %cond = icmp eq i32 %val, %target
15 br i1 %cond, label %loop, label %exit
16 exit:
17 ret void
18 }
19
20 define void @f2(i32 %target) {
21 ; CHECK: f2:
22 ; CHECK: .cfi_def_cfa_offset
23 ; CHECK: .L[[LABEL:.*]]:
24 ; CHECK: crjlh %r2, {{%r[0-9]+}}, .L[[LABEL]]
25 br label %loop
26 loop:
27 %val = call i32 @foo()
28 %cond = icmp ne i32 %val, %target
29 br i1 %cond, label %loop, label %exit
30 exit:
31 ret void
32 }
33
34 define void @f3(i32 %target) {
35 ; CHECK: f3:
36 ; CHECK: .cfi_def_cfa_offset
37 ; CHECK: .L[[LABEL:.*]]:
38 ; CHECK: crjle %r2, {{%r[0-9]+}}, .L[[LABEL]]
39 br label %loop
40 loop:
41 %val = call i32 @foo()
42 %cond = icmp sle i32 %val, %target
43 br i1 %cond, label %loop, label %exit
44 exit:
45 ret void
46 }
47
48 define void @f4(i32 %target) {
49 ; CHECK: f4:
50 ; CHECK: .cfi_def_cfa_offset
51 ; CHECK: .L[[LABEL:.*]]:
52 ; CHECK: crjl %r2, {{%r[0-9]+}}, .L[[LABEL]]
53 br label %loop
54 loop:
55 %val = call i32 @foo()
56 %cond = icmp slt i32 %val, %target
57 br i1 %cond, label %loop, label %exit
58 exit:
59 ret void
60 }
61
62 define void @f5(i32 %target) {
63 ; CHECK: f5:
64 ; CHECK: .cfi_def_cfa_offset
65 ; CHECK: .L[[LABEL:.*]]:
66 ; CHECK: crjh %r2, {{%r[0-9]+}}, .L[[LABEL]]
67 br label %loop
68 loop:
69 %val = call i32 @foo()
70 %cond = icmp sgt i32 %val, %target
71 br i1 %cond, label %loop, label %exit
72 exit:
73 ret void
74 }
75
76 define void @f6(i32 %target) {
77 ; CHECK: f6:
78 ; CHECK: .cfi_def_cfa_offset
79 ; CHECK: .L[[LABEL:.*]]:
80 ; CHECK: crjhe %r2, {{%r[0-9]+}}, .L[[LABEL]]
81 br label %loop
82 loop:
83 %val = call i32 @foo()
84 %cond = icmp sge i32 %val, %target
85 br i1 %cond, label %loop, label %exit
86 exit:
87 ret void
88 }
0 ; Test all condition-code masks that are relevant for CGRJ.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3
4 declare i64 @foo();
5
6 define void @f1(i64 %target) {
7 ; CHECK: f1:
8 ; CHECK: .cfi_def_cfa_offset
9 ; CHECK: .L[[LABEL:.*]]:
10 ; CHECK: cgrje %r2, {{%r[0-9]+}}, .L[[LABEL]]
11 br label %loop
12 loop:
13 %val = call i64 @foo()
14 %cond = icmp eq i64 %val, %target
15 br i1 %cond, label %loop, label %exit
16 exit:
17 ret void
18 }
19
20 define void @f2(i64 %target) {
21 ; CHECK: f2:
22 ; CHECK: .cfi_def_cfa_offset
23 ; CHECK: .L[[LABEL:.*]]:
24 ; CHECK: cgrjlh %r2, {{%r[0-9]+}}, .L[[LABEL]]
25 br label %loop
26 loop:
27 %val = call i64 @foo()
28 %cond = icmp ne i64 %val, %target
29 br i1 %cond, label %loop, label %exit
30 exit:
31 ret void
32 }
33
34 define void @f3(i64 %target) {
35 ; CHECK: f3:
36 ; CHECK: .cfi_def_cfa_offset
37 ; CHECK: .L[[LABEL:.*]]:
38 ; CHECK: cgrjle %r2, {{%r[0-9]+}}, .L[[LABEL]]
39 br label %loop
40 loop:
41 %val = call i64 @foo()
42 %cond = icmp sle i64 %val, %target
43 br i1 %cond, label %loop, label %exit
44 exit:
45 ret void
46 }
47
48 define void @f4(i64 %target) {
49 ; CHECK: f4:
50 ; CHECK: .cfi_def_cfa_offset
51 ; CHECK: .L[[LABEL:.*]]:
52 ; CHECK: cgrjl %r2, {{%r[0-9]+}}, .L[[LABEL]]
53 br label %loop
54 loop:
55 %val = call i64 @foo()
56 %cond = icmp slt i64 %val, %target
57 br i1 %cond, label %loop, label %exit
58 exit:
59 ret void
60 }
61
62 define void @f5(i64 %target) {
63 ; CHECK: f5:
64 ; CHECK: .cfi_def_cfa_offset
65 ; CHECK: .L[[LABEL:.*]]:
66 ; CHECK: cgrjh %r2, {{%r[0-9]+}}, .L[[LABEL]]
67 br label %loop
68 loop:
69 %val = call i64 @foo()
70 %cond = icmp sgt i64 %val, %target
71 br i1 %cond, label %loop, label %exit
72 exit:
73 ret void
74 }
75
76 define void @f6(i64 %target) {
77 ; CHECK: f6:
78 ; CHECK: .cfi_def_cfa_offset
79 ; CHECK: .L[[LABEL:.*]]:
80 ; CHECK: cgrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]]
81 br label %loop
82 loop:
83 %val = call i64 @foo()
84 %cond = icmp sge i64 %val, %target
85 br i1 %cond, label %loop, label %exit
86 exit:
87 ret void
88 }
1717 ; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
1818 ; CHECK-MAIN: rll %r2, [[OLD]], 8([[SHIFT]])
1919 ; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0
20 ; CHECK-MAIN: cr %r2, %r4
21 ; CHECK-MAIN: jlh [[EXIT:\.[^ ]*]]
20 ; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
2221 ; CHECK-MAIN: risbg %r5, %r2, 32, 55, 0
2322 ; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
2423 ; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
1717 ; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
1818 ; CHECK-MAIN: rll %r2, [[OLD]], 16([[SHIFT]])
1919 ; CHECK-MAIN: risbg %r4, %r2, 32, 47, 0
20 ; CHECK-MAIN: cr %r2, %r4
21 ; CHECK-MAIN: jlh [[EXIT:\.[^ ]*]]
20 ; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
2221 ; CHECK-MAIN: risbg %r5, %r2, 32, 47, 0
2322 ; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -16({{%r[1-9]+}})
2423 ; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
44 ; Check register comparison.
55 define double @f1(double %a, double %b, i32 %i1, i32 %i2) {
66 ; CHECK: f1:
7 ; CHECK: cr %r2, %r3
8 ; CHECK-NEXT: jl
7 ; CHECK: crjl %r2, %r3
98 ; CHECK: ldr %f0, %f2
109 ; CHECK: br %r14
1110 %cond = icmp slt i32 %i1, %i2
44 ; Check CGR.
55 define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
66 ; CHECK: f1:
7 ; CHECK: cgr %r2, %r3
8 ; CHECK-NEXT: jl
7 ; CHECK: cgrjl %r2, %r3
98 ; CHECK: ldr %f0, %f2
109 ; CHECK: br %r14
1110 %cond = icmp slt i64 %i1, %i2
6464 ; Check the next value up, which must use register comparison.
6565 define double @f6(double %a, double %b, i64 %i1) {
6666 ; CHECK: f6:
67 ; CHECK: cgr
68 ; CHECK-NEXT: jl
67 ; CHECK: cgrjl
6968 ; CHECK: ldr %f0, %f2
7069 ; CHECK: br %r14
7170 %cond = icmp slt i64 %i1, 2147483648
124123 ; Check the next value down, which must use register comparison.
125124 define double @f11(double %a, double %b, i64 %i1) {
126125 ; CHECK: f11:
127 ; CHECK: cgr
128 ; CHECK-NEXT: jl
126 ; CHECK: cgrjl
129127 ; CHECK: ldr %f0, %f2
130128 ; CHECK: br %r14
131129 %cond = icmp slt i64 %i1, -2147483649
7676 ; Check the next value up, which must use a register comparison.
7777 define double @f7(double %a, double %b, i64 %i1) {
7878 ; CHECK: f7:
79 ; CHECK: cgr %r2,
80 ; CHECK-NEXT: je
79 ; CHECK: cgrje %r2,
8180 ; CHECK: ldr %f0, %f2
8281 ; CHECK: br %r14
8382 %cond = icmp eq i64 %i1, 4294967296
136135 ; Check the next value down, which must use register comparison.
137136 define double @f12(double %a, double %b, i64 %i1) {
138137 ; CHECK: f12:
139 ; CHECK: cgr
140 ; CHECK-NEXT: je
138 ; CHECK: cgrje
141139 ; CHECK: ldr %f0, %f2
142140 ; CHECK: br %r14
143141 %cond = icmp eq i64 %i1, -2147483649
7676 ; Check the next value up, which must use a register comparison.
7777 define double @f7(double %a, double %b, i64 %i1) {
7878 ; CHECK: f7:
79 ; CHECK: cgr %r2,
80 ; CHECK-NEXT: jlh
79 ; CHECK: cgrjlh %r2,
8180 ; CHECK: ldr %f0, %f2
8281 ; CHECK: br %r14
8382 %cond = icmp ne i64 %i1, 4294967296
136135 ; Check the next value down, which must use register comparison.
137136 define double @f12(double %a, double %b, i64 %i1) {
138137 ; CHECK: f12:
139 ; CHECK: cgr
140 ; CHECK-NEXT: jlh
138 ; CHECK: cgrjlh
141139 ; CHECK: ldr %f0, %f2
142140 ; CHECK: br %r14
143141 %cond = icmp ne i64 %i1, -2147483649
930930 # CHECK: strl %r15, 0x100000530
931931 0xc4 0xff 0x7f 0xff 0xff 0xff
932932
933 # 0x00000538:
934 # CHECK: cgrj %r0, %r0, 0, 0x538
935 0xec 0x00 0x00 0x00 0x00 0x64
936
937 # 0x0000053e:
938 # CHECK: cgrj %r0, %r15, 0, 0x53e
939 0xec 0x0f 0x00 0x00 0x00 0x64
940
941 # 0x00000544:
942 # CHECK: cgrj %r15, %r0, 0, 0x544
943 0xec 0xf0 0x00 0x00 0x00 0x64
944
945 # 0x0000054a:
946 # CHECK: cgrj %r7, %r8, 0, 0x54a
947 0xec 0x78 0x00 0x00 0x00 0x64
948
949 # 0x00000550:
950 # CHECK: cgrj %r0, %r0, 0, 0x54e
951 0xec 0x00 0xff 0xff 0x00 0x64
952
953 # 0x00000556:
954 # CHECK: cgrj %r0, %r0, 0, 0xffffffffffff0556
955 0xec 0x00 0x80 0x00 0x00 0x64
956
957 # 0x0000055c:
958 # CHECK: cgrj %r0, %r0, 0, 0x1055a
959 0xec 0x00 0x7f 0xff 0x00 0x64
960
961 # 0x00000562:
962 # CHECK: cgrj %r0, %r0, 1, 0x562
963 0xec 0x00 0x00 0x00 0x10 0x64
964
965 # 0x00000568:
966 # CHECK: cgrjh %r0, %r0, 0x568
967 0xec 0x00 0x00 0x00 0x20 0x64
968
969 # 0x0000056e:
970 # CHECK: cgrj %r0, %r0, 3, 0x56e
971 0xec 0x00 0x00 0x00 0x30 0x64
972
973 # 0x00000574:
974 # CHECK: cgrjl %r0, %r0, 0x574
975 0xec 0x00 0x00 0x00 0x40 0x64
976
977 # 0x0000057a:
978 # CHECK: cgrj %r0, %r0, 5, 0x57a
979 0xec 0x00 0x00 0x00 0x50 0x64
980
981 # 0x00000580:
982 # CHECK: cgrjlh %r0, %r0, 0x580
983 0xec 0x00 0x00 0x00 0x60 0x64
984
985 # 0x00000586:
986 # CHECK: cgrj %r0, %r0, 7, 0x586
987 0xec 0x00 0x00 0x00 0x70 0x64
988
989 # 0x0000058c:
990 # CHECK: cgrje %r0, %r0, 0x58c
991 0xec 0x00 0x00 0x00 0x80 0x64
992
993 # 0x00000592:
994 # CHECK: cgrj %r0, %r0, 9, 0x592
995 0xec 0x00 0x00 0x00 0x90 0x64
996
997 # 0x00000598:
998 # CHECK: cgrjhe %r0, %r0, 0x598
999 0xec 0x00 0x00 0x00 0xa0 0x64
1000
1001 # 0x0000059e:
1002 # CHECK: cgrj %r0, %r0, 11, 0x59e
1003 0xec 0x00 0x00 0x00 0xb0 0x64
1004
1005 # 0x000005a4:
1006 # CHECK: cgrjle %r0, %r0, 0x5a4
1007 0xec 0x00 0x00 0x00 0xc0 0x64
1008
1009 # 0x000005aa:
1010 # CHECK: cgrj %r0, %r0, 13, 0x5aa
1011 0xec 0x00 0x00 0x00 0xd0 0x64
1012
1013 # 0x000005b0:
1014 # CHECK: cgrj %r0, %r0, 14, 0x5b0
1015 0xec 0x00 0x00 0x00 0xe0 0x64
1016
1017 # 0x000005b6:
1018 # CHECK: cgrj %r0, %r0, 15, 0x5b6
1019 0xec 0x00 0x00 0x00 0xf0 0x64
1020
1021 # 0x000005bc:
1022 # CHECK: crj %r0, %r0, 0, 0x5bc
1023 0xec 0x00 0x00 0x00 0x00 0x76
1024
1025 # 0x000005c2:
1026 # CHECK: crj %r0, %r15, 0, 0x5c2
1027 0xec 0x0f 0x00 0x00 0x00 0x76
1028
1029 # 0x000005c8:
1030 # CHECK: crj %r15, %r0, 0, 0x5c8
1031 0xec 0xf0 0x00 0x00 0x00 0x76
1032
1033 # 0x000005ce:
1034 # CHECK: crj %r7, %r8, 0, 0x5ce
1035 0xec 0x78 0x00 0x00 0x00 0x76
1036
1037 # 0x000005d4:
1038 # CHECK: crj %r0, %r0, 0, 0x5d2
1039 0xec 0x00 0xff 0xff 0x00 0x76
1040
1041 # 0x000005da:
1042 # CHECK: crj %r0, %r0, 0, 0xffffffffffff05da
1043 0xec 0x00 0x80 0x00 0x00 0x76
1044
1045 # 0x000005e0:
1046 # CHECK: crj %r0, %r0, 0, 0x105de
1047 0xec 0x00 0x7f 0xff 0x00 0x76
1048
1049 # 0x000005e6:
1050 # CHECK: crj %r0, %r0, 1, 0x5e6
1051 0xec 0x00 0x00 0x00 0x10 0x76
1052
1053 # 0x000005ec:
1054 # CHECK: crjh %r0, %r0, 0x5ec
1055 0xec 0x00 0x00 0x00 0x20 0x76
1056
1057 # 0x000005f2:
1058 # CHECK: crj %r0, %r0, 3, 0x5f2
1059 0xec 0x00 0x00 0x00 0x30 0x76
1060
1061 # 0x000005f8:
1062 # CHECK: crjl %r0, %r0, 0x5f8
1063 0xec 0x00 0x00 0x00 0x40 0x76
1064
1065 # 0x000005fe:
1066 # CHECK: crj %r0, %r0, 5, 0x5fe
1067 0xec 0x00 0x00 0x00 0x50 0x76
1068
1069 # 0x00000604:
1070 # CHECK: crjlh %r0, %r0, 0x604
1071 0xec 0x00 0x00 0x00 0x60 0x76
1072
1073 # 0x0000060a:
1074 # CHECK: crj %r0, %r0, 7, 0x60a
1075 0xec 0x00 0x00 0x00 0x70 0x76
1076
1077 # 0x00000610:
1078 # CHECK: crje %r0, %r0, 0x610
1079 0xec 0x00 0x00 0x00 0x80 0x76
1080
1081 # 0x00000616:
1082 # CHECK: crj %r0, %r0, 9, 0x616
1083 0xec 0x00 0x00 0x00 0x90 0x76
1084
1085 # 0x0000061c:
1086 # CHECK: crjhe %r0, %r0, 0x61c
1087 0xec 0x00 0x00 0x00 0xa0 0x76
1088
1089 # 0x00000622:
1090 # CHECK: crj %r0, %r0, 11, 0x622
1091 0xec 0x00 0x00 0x00 0xb0 0x76
1092
1093 # 0x00000628:
1094 # CHECK: crjle %r0, %r0, 0x628
1095 0xec 0x00 0x00 0x00 0xc0 0x76
1096
1097 # 0x0000062e:
1098 # CHECK: crj %r0, %r0, 13, 0x62e
1099 0xec 0x00 0x00 0x00 0xd0 0x76
1100
1101 # 0x00000634:
1102 # CHECK: crj %r0, %r0, 14, 0x634
1103 0xec 0x00 0x00 0x00 0xe0 0x76
1104
1105 # 0x0000063a:
1106 # CHECK: crj %r0, %r0, 15, 0x63a
1107 0xec 0x00 0x00 0x00 0xf0 0x76
452452 cghsi 0, 32768
453453
454454 #CHECK: error: offset out of range
455 #CHECK: cgrj %r0, %r0, 0, -0x100002
456 #CHECK: error: offset out of range
457 #CHECK: cgrj %r0, %r0, 0, -1
458 #CHECK: error: offset out of range
459 #CHECK: cgrj %r0, %r0, 0, 1
460 #CHECK: error: offset out of range
461 #CHECK: cgrj %r0, %r0, 0, 0x10000
462
463 cgrj %r0, %r0, 0, -0x100002
464 cgrj %r0, %r0, 0, -1
465 cgrj %r0, %r0, 0, 1
466 cgrj %r0, %r0, 0, 0x10000
467
468 #CHECK: error: invalid instruction
469 #CHECK: cgrjo %r0, %r0, 0, 0
470 #CHECK: error: invalid instruction
471 #CHECK: cgrjno %r0, %r0, 0, 0
472
473 cgrjo %r0, %r0, 0, 0
474 cgrjno %r0, %r0, 0, 0
475
476 #CHECK: error: offset out of range
455477 #CHECK: cgrl %r0, -0x1000000002
456478 #CHECK: error: offset out of range
457479 #CHECK: cgrl %r0, -1
754776
755777 cly %r0, -524289
756778 cly %r0, 524288
779
780 #CHECK: error: offset out of range
781 #CHECK: crj %r0, %r0, 0, -0x100002
782 #CHECK: error: offset out of range
783 #CHECK: crj %r0, %r0, 0, -1
784 #CHECK: error: offset out of range
785 #CHECK: crj %r0, %r0, 0, 1
786 #CHECK: error: offset out of range
787 #CHECK: crj %r0, %r0, 0, 0x10000
788
789 crj %r0, %r0, 0, -0x100002
790 crj %r0, %r0, 0, -1
791 crj %r0, %r0, 0, 1
792 crj %r0, %r0, 0, 0x10000
793
794 #CHECK: error: invalid instruction
795 #CHECK: crjo %r0, %r0, 0, 0
796 #CHECK: error: invalid instruction
797 #CHECK: crjno %r0, %r0, 0, 0
798
799 crjo %r0, %r0, 0, 0
800 crjno %r0, %r0, 0, 0
757801
758802 #CHECK: error: offset out of range
759803 #CHECK: crl %r0, -0x1000000002
15221522 cgr %r15,%r0
15231523 cgr %r7,%r8
15241524
1525 #CHECK: cgrj %r0, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x64]
1526 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
1527 #CHECK: cgrj %r0, %r15, 0, .[[LAB:L.*]] # encoding: [0xec,0x0f,A,A,0x00,0x64]
1528 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
1529 #CHECK: cgrj %r15, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x64]
1530 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
1531 #CHECK: cgrj %r7, %r8, 0, .[[LAB:L.*]] # encoding: [0xec,0x78,A,A,0x00,0x64]
1532 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
1533 cgrj %r0,%r0,0,0
1534 cgrj %r0,%r15,0,0
1535 cgrj %r15,%r0,0,0
1536 cgrj %r7,%r8,0,0
1537
1538 #CHECK: cgrj %r1, %r2, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x12,A,A,0x00,0x64]
1539 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL
1540 cgrj %r1, %r2, 0, -0x10000
1541 #CHECK: cgrj %r1, %r2, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x12,A,A,0x00,0x64]
1542 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL
1543 cgrj %r1, %r2, 0, -2
1544 #CHECK: cgrj %r1, %r2, 0, .[[LAB:L.*]] # encoding: [0xec,0x12,A,A,0x00,0x64]
1545 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
1546 cgrj %r1, %r2, 0, 0
1547 #CHECK: cgrj %r1, %r2, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x12,A,A,0x00,0x64]
1548 #CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL
1549 cgrj %r1, %r2, 0, 0xfffe
1550
1551 #CHECK: cgrj %r1, %r2, 0, foo # encoding: [0xec,0x12,A,A,0x00,0x64]
1552 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1553 cgrj %r1, %r2, 0, foo
1554
1555 #CHECK: cgrj %r1, %r2, 1, foo # encoding: [0xec,0x12,A,A,0x10,0x64]
1556 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1557 cgrj %r1, %r2, 1, foo
1558
1559 #CHECK: cgrj %r1, %r2, 2, foo # encoding: [0xec,0x12,A,A,0x20,0x64]
1560 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1561 #CHECK: cgrjh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x64]
1562 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1563 #CHECK: cgrjnle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x64]
1564 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1565 cgrj %r1, %r2, 2, foo
1566 cgrjh %r1, %r2, foo
1567 cgrjnle %r1, %r2, foo
1568
1569 #CHECK: cgrj %r1, %r2, 3, foo # encoding: [0xec,0x12,A,A,0x30,0x64]
1570 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1571 cgrj %r1, %r2, 3, foo
1572
1573 #CHECK: cgrj %r1, %r2, 4, foo # encoding: [0xec,0x12,A,A,0x40,0x64]
1574 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1575 #CHECK: cgrjl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x64]
1576 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1577 #CHECK: cgrjnhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x64]
1578 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1579 cgrj %r1, %r2, 4, foo
1580 cgrjl %r1, %r2, foo
1581 cgrjnhe %r1, %r2, foo
1582
1583 #CHECK: cgrj %r1, %r2, 5, foo # encoding: [0xec,0x12,A,A,0x50,0x64]
1584 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1585 cgrj %r1, %r2, 5, foo
1586
1587 #CHECK: cgrj %r1, %r2, 6, foo # encoding: [0xec,0x12,A,A,0x60,0x64]
1588 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1589 #CHECK: cgrjlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x64]
1590 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1591 #CHECK: cgrjne %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x64]
1592 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1593 cgrj %r1, %r2, 6, foo
1594 cgrjlh %r1, %r2, foo
1595 cgrjne %r1, %r2, foo
1596
1597 #CHECK: cgrj %r1, %r2, 7, foo # encoding: [0xec,0x12,A,A,0x70,0x64]
1598 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1599 cgrj %r1, %r2, 7, foo
1600
1601 #CHECK: cgrj %r1, %r2, 8, foo # encoding: [0xec,0x12,A,A,0x80,0x64]
1602 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1603 #CHECK: cgrje %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x64]
1604 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1605 #CHECK: cgrjnlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x64]
1606 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1607 cgrj %r1, %r2, 8, foo
1608 cgrje %r1, %r2, foo
1609 cgrjnlh %r1, %r2, foo
1610
1611 #CHECK: cgrj %r1, %r2, 9, foo # encoding: [0xec,0x12,A,A,0x90,0x64]
1612 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1613 cgrj %r1, %r2, 9, foo
1614
1615 #CHECK: cgrj %r1, %r2, 10, foo # encoding: [0xec,0x12,A,A,0xa0,0x64]
1616 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1617 #CHECK: cgrjhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x64]
1618 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1619 #CHECK: cgrjnl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x64]
1620 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1621 cgrj %r1, %r2, 10, foo
1622 cgrjhe %r1, %r2, foo
1623 cgrjnl %r1, %r2, foo
1624
1625 #CHECK: cgrj %r1, %r2, 11, foo # encoding: [0xec,0x12,A,A,0xb0,0x64]
1626 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1627 cgrj %r1, %r2, 11, foo
1628
1629 #CHECK: cgrj %r1, %r2, 12, foo # encoding: [0xec,0x12,A,A,0xc0,0x64]
1630 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1631 #CHECK: cgrjle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x64]
1632 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1633 #CHECK: cgrjnh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x64]
1634 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1635 cgrj %r1, %r2, 12, foo
1636 cgrjle %r1, %r2, foo
1637 cgrjnh %r1, %r2, foo
1638
1639 #CHECK: cgrj %r1, %r2, 13, foo # encoding: [0xec,0x12,A,A,0xd0,0x64]
1640 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1641 cgrj %r1, %r2, 13, foo
1642
1643 #CHECK: cgrj %r1, %r2, 14, foo # encoding: [0xec,0x12,A,A,0xe0,0x64]
1644 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1645 cgrj %r1, %r2, 14, foo
1646
1647 #CHECK: cgrj %r1, %r2, 15, foo # encoding: [0xec,0x12,A,A,0xf0,0x64]
1648 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
1649 cgrj %r1, %r2, 15, foo
1650
1651 #CHECK: cgrj %r1, %r2, 0, bar+100 # encoding: [0xec,0x12,A,A,0x00,0x64]
1652 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1653 cgrj %r1, %r2, 0, bar+100
1654
1655 #CHECK: cgrjh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x64]
1656 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1657 cgrjh %r1, %r2, bar+100
1658
1659 #CHECK: cgrjnle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x64]
1660 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1661 cgrjnle %r1, %r2, bar+100
1662
1663 #CHECK: cgrjl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x64]
1664 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1665 cgrjl %r1, %r2, bar+100
1666
1667 #CHECK: cgrjnhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x64]
1668 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1669 cgrjnhe %r1, %r2, bar+100
1670
1671 #CHECK: cgrjlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x64]
1672 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1673 cgrjlh %r1, %r2, bar+100
1674
1675 #CHECK: cgrjne %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x64]
1676 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1677 cgrjne %r1, %r2, bar+100
1678
1679 #CHECK: cgrje %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x64]
1680 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1681 cgrje %r1, %r2, bar+100
1682
1683 #CHECK: cgrjnlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x64]
1684 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1685 cgrjnlh %r1, %r2, bar+100
1686
1687 #CHECK: cgrjhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x64]
1688 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1689 cgrjhe %r1, %r2, bar+100
1690
1691 #CHECK: cgrjnl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x64]
1692 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1693 cgrjnl %r1, %r2, bar+100
1694
1695 #CHECK: cgrjle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x64]
1696 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1697 cgrjle %r1, %r2, bar+100
1698
1699 #CHECK: cgrjnh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x64]
1700 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
1701 cgrjnh %r1, %r2, bar+100
1702
1703 #CHECK: cgrj %r1, %r2, 0, bar@PLT # encoding: [0xec,0x12,A,A,0x00,0x64]
1704 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1705 cgrj %r1, %r2, 0, bar@PLT
1706
1707 #CHECK: cgrjh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x64]
1708 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1709 cgrjh %r1, %r2, bar@PLT
1710
1711 #CHECK: cgrjnle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x64]
1712 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1713 cgrjnle %r1, %r2, bar@PLT
1714
1715 #CHECK: cgrjl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x64]
1716 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1717 cgrjl %r1, %r2, bar@PLT
1718
1719 #CHECK: cgrjnhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x64]
1720 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1721 cgrjnhe %r1, %r2, bar@PLT
1722
1723 #CHECK: cgrjlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x64]
1724 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1725 cgrjlh %r1, %r2, bar@PLT
1726
1727 #CHECK: cgrjne %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x64]
1728 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1729 cgrjne %r1, %r2, bar@PLT
1730
1731 #CHECK: cgrje %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x64]
1732 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1733 cgrje %r1, %r2, bar@PLT
1734
1735 #CHECK: cgrjnlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x64]
1736 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1737 cgrjnlh %r1, %r2, bar@PLT
1738
1739 #CHECK: cgrjhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x64]
1740 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1741 cgrjhe %r1, %r2, bar@PLT
1742
1743 #CHECK: cgrjnl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x64]
1744 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1745 cgrjnl %r1, %r2, bar@PLT
1746
1747 #CHECK: cgrjle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x64]
1748 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1749 cgrjle %r1, %r2, bar@PLT
1750
1751 #CHECK: cgrjnh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x64]
1752 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
1753 cgrjnh %r1, %r2, bar@PLT
1754
15251755 #CHECK: cgrl %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x08,A,A,A,A]
15261756 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL
15271757 cgrl %r0, -0x100000000
21312361 cr %r0,%r15
21322362 cr %r15,%r0
21332363 cr %r7,%r8
2364
2365 #CHECK: crj %r0, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0x00,A,A,0x00,0x76]
2366 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
2367 #CHECK: crj %r0, %r15, 0, .[[LAB:L.*]] # encoding: [0xec,0x0f,A,A,0x00,0x76]
2368 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
2369 #CHECK: crj %r15, %r0, 0, .[[LAB:L.*]] # encoding: [0xec,0xf0,A,A,0x00,0x76]
2370 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
2371 #CHECK: crj %r7, %r8, 0, .[[LAB:L.*]] # encoding: [0xec,0x78,A,A,0x00,0x76]
2372 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
2373 crj %r0,%r0,0,0
2374 crj %r0,%r15,0,0
2375 crj %r15,%r0,0,0
2376 crj %r7,%r8,0,0
2377
2378 #CHECK: crj %r1, %r2, 0, .[[LAB:L.*]]-65536 # encoding: [0xec,0x12,A,A,0x00,0x76]
2379 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-65536)+2, kind: FK_390_PC16DBL
2380 crj %r1, %r2, 0, -0x10000
2381 #CHECK: crj %r1, %r2, 0, .[[LAB:L.*]]-2 # encoding: [0xec,0x12,A,A,0x00,0x76]
2382 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC16DBL
2383 crj %r1, %r2, 0, -2
2384 #CHECK: crj %r1, %r2, 0, .[[LAB:L.*]] # encoding: [0xec,0x12,A,A,0x00,0x76]
2385 #CHECK: fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC16DBL
2386 crj %r1, %r2, 0, 0
2387 #CHECK: crj %r1, %r2, 0, .[[LAB:L.*]]+65534 # encoding: [0xec,0x12,A,A,0x00,0x76]
2388 #CHECK: fixup A - offset: 2, value: (.[[LAB]]+65534)+2, kind: FK_390_PC16DBL
2389 crj %r1, %r2, 0, 0xfffe
2390
2391 #CHECK: crj %r1, %r2, 0, foo # encoding: [0xec,0x12,A,A,0x00,0x76]
2392 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2393 crj %r1, %r2, 0, foo
2394
2395 #CHECK: crj %r1, %r2, 1, foo # encoding: [0xec,0x12,A,A,0x10,0x76]
2396 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2397 crj %r1, %r2, 1, foo
2398
2399 #CHECK: crj %r1, %r2, 2, foo # encoding: [0xec,0x12,A,A,0x20,0x76]
2400 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2401 #CHECK: crjh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x76]
2402 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2403 #CHECK: crjnle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x20,0x76]
2404 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2405 crj %r1, %r2, 2, foo
2406 crjh %r1, %r2, foo
2407 crjnle %r1, %r2, foo
2408
2409 #CHECK: crj %r1, %r2, 3, foo # encoding: [0xec,0x12,A,A,0x30,0x76]
2410 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2411 crj %r1, %r2, 3, foo
2412
2413 #CHECK: crj %r1, %r2, 4, foo # encoding: [0xec,0x12,A,A,0x40,0x76]
2414 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2415 #CHECK: crjl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x76]
2416 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2417 #CHECK: crjnhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x40,0x76]
2418 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2419 crj %r1, %r2, 4, foo
2420 crjl %r1, %r2, foo
2421 crjnhe %r1, %r2, foo
2422
2423 #CHECK: crj %r1, %r2, 5, foo # encoding: [0xec,0x12,A,A,0x50,0x76]
2424 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2425 crj %r1, %r2, 5, foo
2426
2427 #CHECK: crj %r1, %r2, 6, foo # encoding: [0xec,0x12,A,A,0x60,0x76]
2428 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2429 #CHECK: crjlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x76]
2430 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2431 #CHECK: crjne %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x60,0x76]
2432 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2433 crj %r1, %r2, 6, foo
2434 crjlh %r1, %r2, foo
2435 crjne %r1, %r2, foo
2436
2437 #CHECK: crj %r1, %r2, 7, foo # encoding: [0xec,0x12,A,A,0x70,0x76]
2438 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2439 crj %r1, %r2, 7, foo
2440
2441 #CHECK: crj %r1, %r2, 8, foo # encoding: [0xec,0x12,A,A,0x80,0x76]
2442 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2443 #CHECK: crje %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x76]
2444 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2445 #CHECK: crjnlh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0x80,0x76]
2446 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2447 crj %r1, %r2, 8, foo
2448 crje %r1, %r2, foo
2449 crjnlh %r1, %r2, foo
2450
2451 #CHECK: crj %r1, %r2, 9, foo # encoding: [0xec,0x12,A,A,0x90,0x76]
2452 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2453 crj %r1, %r2, 9, foo
2454
2455 #CHECK: crj %r1, %r2, 10, foo # encoding: [0xec,0x12,A,A,0xa0,0x76]
2456 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2457 #CHECK: crjhe %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x76]
2458 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2459 #CHECK: crjnl %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xa0,0x76]
2460 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2461 crj %r1, %r2, 10, foo
2462 crjhe %r1, %r2, foo
2463 crjnl %r1, %r2, foo
2464
2465 #CHECK: crj %r1, %r2, 11, foo # encoding: [0xec,0x12,A,A,0xb0,0x76]
2466 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2467 crj %r1, %r2, 11, foo
2468
2469 #CHECK: crj %r1, %r2, 12, foo # encoding: [0xec,0x12,A,A,0xc0,0x76]
2470 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2471 #CHECK: crjle %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x76]
2472 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2473 #CHECK: crjnh %r1, %r2, foo # encoding: [0xec,0x12,A,A,0xc0,0x76]
2474 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2475 crj %r1, %r2, 12, foo
2476 crjle %r1, %r2, foo
2477 crjnh %r1, %r2, foo
2478
2479 #CHECK: crj %r1, %r2, 13, foo # encoding: [0xec,0x12,A,A,0xd0,0x76]
2480 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2481 crj %r1, %r2, 13, foo
2482
2483 #CHECK: crj %r1, %r2, 14, foo # encoding: [0xec,0x12,A,A,0xe0,0x76]
2484 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2485 crj %r1, %r2, 14, foo
2486
2487 #CHECK: crj %r1, %r2, 15, foo # encoding: [0xec,0x12,A,A,0xf0,0x76]
2488 #CHECK: fixup A - offset: 2, value: foo+2, kind: FK_390_PC16DBL
2489 crj %r1, %r2, 15, foo
2490
2491 #CHECK: crj %r1, %r2, 0, bar+100 # encoding: [0xec,0x12,A,A,0x00,0x76]
2492 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2493 crj %r1, %r2, 0, bar+100
2494
2495 #CHECK: crjh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x76]
2496 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2497 crjh %r1, %r2, bar+100
2498
2499 #CHECK: crjnle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x20,0x76]
2500 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2501 crjnle %r1, %r2, bar+100
2502
2503 #CHECK: crjl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x76]
2504 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2505 crjl %r1, %r2, bar+100
2506
2507 #CHECK: crjnhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x40,0x76]
2508 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2509 crjnhe %r1, %r2, bar+100
2510
2511 #CHECK: crjlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x76]
2512 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2513 crjlh %r1, %r2, bar+100
2514
2515 #CHECK: crjne %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x60,0x76]
2516 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2517 crjne %r1, %r2, bar+100
2518
2519 #CHECK: crje %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x76]
2520 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2521 crje %r1, %r2, bar+100
2522
2523 #CHECK: crjnlh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0x80,0x76]
2524 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2525 crjnlh %r1, %r2, bar+100
2526
2527 #CHECK: crjhe %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x76]
2528 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2529 crjhe %r1, %r2, bar+100
2530
2531 #CHECK: crjnl %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xa0,0x76]
2532 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2533 crjnl %r1, %r2, bar+100
2534
2535 #CHECK: crjle %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x76]
2536 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2537 crjle %r1, %r2, bar+100
2538
2539 #CHECK: crjnh %r1, %r2, bar+100 # encoding: [0xec,0x12,A,A,0xc0,0x76]
2540 #CHECK: fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC16DBL
2541 crjnh %r1, %r2, bar+100
2542
2543 #CHECK: crj %r1, %r2, 0, bar@PLT # encoding: [0xec,0x12,A,A,0x00,0x76]
2544 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2545 crj %r1, %r2, 0, bar@PLT
2546
2547 #CHECK: crjh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x76]
2548 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2549 crjh %r1, %r2, bar@PLT
2550
2551 #CHECK: crjnle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x20,0x76]
2552 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2553 crjnle %r1, %r2, bar@PLT
2554
2555 #CHECK: crjl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x76]
2556 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2557 crjl %r1, %r2, bar@PLT
2558
2559 #CHECK: crjnhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x40,0x76]
2560 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2561 crjnhe %r1, %r2, bar@PLT
2562
2563 #CHECK: crjlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x76]
2564 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2565 crjlh %r1, %r2, bar@PLT
2566
2567 #CHECK: crjne %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x60,0x76]
2568 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2569 crjne %r1, %r2, bar@PLT
2570
2571 #CHECK: crje %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x76]
2572 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2573 crje %r1, %r2, bar@PLT
2574
2575 #CHECK: crjnlh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0x80,0x76]
2576 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2577 crjnlh %r1, %r2, bar@PLT
2578
2579 #CHECK: crjhe %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x76]
2580 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2581 crjhe %r1, %r2, bar@PLT
2582
2583 #CHECK: crjnl %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xa0,0x76]
2584 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2585 crjnl %r1, %r2, bar@PLT
2586
2587 #CHECK: crjle %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x76]
2588 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2589 crjle %r1, %r2, bar@PLT
2590
2591 #CHECK: crjnh %r1, %r2, bar@PLT # encoding: [0xec,0x12,A,A,0xc0,0x76]
2592 #CHECK: fixup A - offset: 2, value: bar@PLT+2, kind: FK_390_PC16DBL
2593 crjnh %r1, %r2, bar@PLT
21342594
21352595 #CHECK: crl %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x0d,A,A,A,A]
21362596 #CHECK: fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL