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initial draft of PPCMachObjectWriter.cpp this records relocation entries in the mach-o object file for PIC code generation. tested on powerpc-darwin8, validated against darwin otool -rvV git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188004 91177308-0d34-0410-b5e6-96231b3b80d8 David Fang 6 years ago
7 changed file(s) with 502 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
424424
425425 };
426426
427 /// PPC relocation types from
428 enum RelocationInfoTypePPC {
429 RIT_PPC_BR14 = RIT_Pair +1,
430 RIT_PPC_BR24,
431 RIT_PPC_HI16,
432 RIT_PPC_LO16,
433 RIT_PPC_HA16,
434 RIT_PPC_LO14,
435 RIT_PPC_SECTDIFF,
436 RIT_PPC_PB_LA_PTR,
437 RIT_PPC_HI16_SECTDIFF,
438 RIT_PPC_LO16_SECTDIFF,
439 RIT_PPC_HA16_SECTDIFF,
440 RIT_PPC_JBSR,
441 RIT_PPC_LO14_SECTDIFF,
442 RIT_PPC_LOCAL_SECTDIFF,
443 RIT_PPC_TLV
444 };
445
427446 } // end namespace macho
428447
429448 } // end namespace object
10581058 break;
10591059 }
10601060 // X86 and ARM share some relocation types in common.
1061 } else if (Arch == Triple::x86 || Arch == Triple::arm) {
1061 } else if (Arch == Triple::x86 || Arch == Triple::arm ||
1062 Arch == Triple::ppc) {
10621063 // Generic relocation types...
10631064 switch (Type) {
10641065 case macho::RIT_Pair: // GENERIC_RELOC_PAIR - prints no info
10831084 }
10841085 }
10851086
1086 if (Arch == Triple::x86) {
1087 if (Arch == Triple::x86 || Arch == Triple::ppc) {
10871088 // All X86 relocations that need special printing were already
10881089 // handled in the generic code.
10891090 switch (Type) {
11761177
11771178 // On arches that use the generic relocations, GENERIC_RELOC_PAIR
11781179 // is always hidden.
1179 if (Arch == Triple::x86 || Arch == Triple::arm) {
1180 if (Arch == Triple::x86 || Arch == Triple::arm || Arch == Triple::ppc) {
11801181 if (Type == macho::RIT_Pair) Result = true;
11811182 } else if (Arch == Triple::x86_64) {
11821183 // On x86_64, X86_64_RELOC_UNSIGNED is hidden only when it follows
44 PPCMCCodeEmitter.cpp
55 PPCMCExpr.cpp
66 PPCPredicates.cpp
7 PPCMachObjectWriter.cpp
78 PPCELFObjectWriter.cpp
89 )
910
6868 }
6969
7070 namespace {
71 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
72 public:
73 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
74 uint32_t CPUSubtype)
75 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
76
77 void RecordRelocation(MachObjectWriter *Writer,
78 const MCAssembler &Asm, const MCAsmLayout &Layout,
79 const MCFragment *Fragment, const MCFixup &Fixup,
80 MCValue Target, uint64_t &FixedValue) {
81 llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
82 }
83 };
8471
8572 class PPCAsmBackend : public MCAsmBackend {
8673 const Target &TheTarget;
173160
174161 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
175162 bool is64 = getPointerSize() == 8;
176 return createMachObjectWriter(new PPCMachObjectWriter(
177 /*Is64Bit=*/is64,
178 (is64 ? object::mach::CTM_PowerPC64 :
179 object::mach::CTM_PowerPC),
180 object::mach::CSPPC_ALL),
181 OS, /*IsLittleEndian=*/false);
163 return createPPCMachObjectWriter(
164 OS,
165 /*Is64Bit=*/is64,
166 (is64 ? object::mach::CTM_PowerPC64 : object::mach::CTM_PowerPC),
167 object::mach::CSPPC_ALL);
182168 }
183169
184170 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
4545 MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,
4646 bool Is64Bit,
4747 uint8_t OSABI);
48 /// createPPCELFObjectWriter - Construct a PPC Mach-O object writer.
49 MCObjectWriter *createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
50 uint32_t CPUType,
51 uint32_t CPUSubtype);
4852 } // End llvm namespace
4953
5054 // Generated files will use "namespace PPC". To avoid symbol clash,
0 //===-- PPCMachObjectWriter.cpp - PPC Mach-O Writer -----------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/PPCMCTargetDesc.h"
10 #include "MCTargetDesc/PPCFixupKinds.h"
11 #include "llvm/ADT/Twine.h"
12 #include "llvm/MC/MCAsmLayout.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCContext.h"
15 #include "llvm/MC/MCMachObjectWriter.h"
16 #include "llvm/MC/MCSectionMachO.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/Object/MachOFormat.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/Format.h"
21
22 using namespace llvm;
23 using namespace llvm::object;
24
25 namespace {
26 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
27 bool RecordScatteredRelocation(MachObjectWriter *Writer,
28 const MCAssembler &Asm,
29 const MCAsmLayout &Layout,
30 const MCFragment *Fragment,
31 const MCFixup &Fixup, MCValue Target,
32 unsigned Log2Size, uint64_t &FixedValue);
33
34 void RecordPPCRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
35 const MCAsmLayout &Layout,
36 const MCFragment *Fragment, const MCFixup &Fixup,
37 MCValue Target, uint64_t &FixedValue);
38
39 public:
40 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
41 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
42 /*UseAggressiveSymbolFolding=*/Is64Bit) {}
43
44 void RecordRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
45 const MCAsmLayout &Layout, const MCFragment *Fragment,
46 const MCFixup &Fixup, MCValue Target,
47 uint64_t &FixedValue) {
48 if (Writer->is64Bit()) {
49 report_fatal_error("Relocation emission for MachO/PPC64 unimplemented.");
50 } else
51 RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
52 FixedValue);
53 }
54 };
55 }
56
57 /// computes the log2 of the size of the relocation,
58 /// used for relocation_info::r_length.
59 static unsigned getFixupKindLog2Size(unsigned Kind) {
60 switch (Kind) {
61 default:
62 report_fatal_error("log2size(FixupKind): Unhandled fixup kind!");
63 case FK_PCRel_1:
64 case FK_Data_1:
65 return 0;
66 case FK_PCRel_2:
67 case FK_Data_2:
68 return 1;
69 case FK_PCRel_4:
70 case PPC::fixup_ppc_brcond14:
71 case PPC::fixup_ppc_half16:
72 case PPC::fixup_ppc_br24:
73 case FK_Data_4:
74 return 2;
75 case FK_PCRel_8:
76 case FK_Data_8:
77 return 3;
78 }
79 return 0;
80 }
81
82 /// Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
83 /// Outline based on PPCELFObjectWriter::getRelocTypeInner().
84 static unsigned getRelocType(const MCValue &Target,
85 const MCFixupKind FixupKind, // from
86 // Fixup.getKind()
87 const bool IsPCRel) {
88 const MCSymbolRefExpr::VariantKind Modifier =
89 Target.isAbsolute() ? MCSymbolRefExpr::VK_None
90 : Target.getSymA()->getKind();
91 // determine the type of the relocation
92 unsigned Type = macho::RIT_Vanilla;
93 if (IsPCRel) { // relative to PC
94 switch ((unsigned)FixupKind) {
95 default:
96 report_fatal_error("Unimplemented fixup kind (relative)");
97 case PPC::fixup_ppc_br24:
98 Type = macho::RIT_PPC_BR24; // R_PPC_REL24
99 break;
100 case PPC::fixup_ppc_brcond14:
101 Type = macho::RIT_PPC_BR14;
102 break;
103 case PPC::fixup_ppc_half16:
104 switch (Modifier) {
105 default:
106 llvm_unreachable("Unsupported modifier for half16 fixup");
107 case MCSymbolRefExpr::VK_PPC_HA:
108 Type = macho::RIT_PPC_HA16;
109 break;
110 case MCSymbolRefExpr::VK_PPC_LO:
111 Type = macho::RIT_PPC_LO16;
112 break;
113 case MCSymbolRefExpr::VK_PPC_HI:
114 Type = macho::RIT_PPC_HI16;
115 break;
116 }
117 break;
118 }
119 } else {
120 switch ((unsigned)FixupKind) {
121 default:
122 report_fatal_error("Unimplemented fixup kind (absolute)!");
123 case PPC::fixup_ppc_half16:
124 switch (Modifier) {
125 default:
126 llvm_unreachable("Unsupported modifier for half16 fixup");
127 case MCSymbolRefExpr::VK_PPC_HA:
128 Type = macho::RIT_PPC_HA16_SECTDIFF;
129 break;
130 case MCSymbolRefExpr::VK_PPC_LO:
131 Type = macho::RIT_PPC_LO16_SECTDIFF;
132 break;
133 case MCSymbolRefExpr::VK_PPC_HI:
134 Type = macho::RIT_PPC_HI16_SECTDIFF;
135 break;
136 }
137 break;
138 case FK_Data_4:
139 break;
140 case FK_Data_2:
141 break;
142 }
143 }
144 return Type;
145 }
146
147 static void makeRelocationInfo(macho::RelocationEntry &MRE,
148 const uint32_t FixupOffset, const uint32_t Index,
149 const unsigned IsPCRel, const unsigned Log2Size,
150 const unsigned IsExtern, const unsigned Type) {
151 MRE.Word0 = FixupOffset;
152 // The bitfield offsets that work (as determined by trial-and-error)
153 // are different than what is documented in the mach-o manuals.
154 // Is this an endianness issue w/ PPC?
155 MRE.Word1 = ((Index << 8) | // was << 0
156 (IsPCRel << 7) | // was << 24
157 (Log2Size << 5) | // was << 25
158 (IsExtern << 4) | // was << 27
159 (Type << 0)); // was << 28
160 }
161
162 static void
163 makeScatteredRelocationInfo(macho::RelocationEntry &MRE, const uint32_t Addr,
164 const unsigned Type, const unsigned Log2Size,
165 const unsigned IsPCRel, const uint32_t Value2) {
166 // For notes on bitfield positions and endianness, see:
167 // https://developer.apple.com/library/mac/documentation/developertools/conceptual/MachORuntime/Reference/reference.html#//apple_ref/doc/uid/20001298-scattered_relocation_entry
168 MRE.Word0 = ((Addr << 0) | (Type << 24) | (Log2Size << 28) | (IsPCRel << 30) |
169 macho::RF_Scattered);
170 MRE.Word1 = Value2;
171 }
172
173 /// Compute fixup offset (address).
174 static uint32_t getFixupOffset(const MCAsmLayout &Layout,
175 const MCFragment *Fragment,
176 const MCFixup &Fixup) {
177 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
178 // On Mach-O, ppc_fixup_half16 relocations must refer to the
179 // start of the instruction, not the second halfword, as ELF does
180 if (Fixup.getKind() == PPC::fixup_ppc_half16)
181 FixupOffset &= ~uint32_t(3);
182 return FixupOffset;
183 }
184
185 /// \return false if falling back to using non-scattered relocation,
186 /// otherwise true for normal scattered relocation.
187 /// based on X86MachObjectWriter::RecordScatteredRelocation
188 /// and ARMMachObjectWriter::RecordScatteredRelocation
189 bool PPCMachObjectWriter::RecordScatteredRelocation(
190 MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
191 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
192 unsigned Log2Size, uint64_t &FixedValue) {
193 // caller already computes these, can we just pass and reuse?
194 const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
195 const MCFixupKind FK = Fixup.getKind();
196 const unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
197 const unsigned Type = getRelocType(Target, FK, IsPCRel);
198
199 // Is this a local or SECTDIFF relocation entry?
200 // SECTDIFF relocation entries have symbol subtractions,
201 // and require two entries, the first for the add-symbol value,
202 // the second for the subtract-symbol value.
203
204 // See .
205 const MCSymbol *A = &Target.getSymA()->getSymbol();
206 MCSymbolData *A_SD = &Asm.getSymbolData(*A);
207
208 if (!A_SD->getFragment())
209 report_fatal_error("symbol '" + A->getName() +
210 "' can not be undefined in a subtraction expression");
211
212 uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
213 uint64_t SecAddr =
214 Writer->getSectionAddress(A_SD->getFragment()->getParent());
215 FixedValue += SecAddr;
216 uint32_t Value2 = 0;
217
218 if (const MCSymbolRefExpr *B = Target.getSymB()) {
219 MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
220
221 if (!B_SD->getFragment())
222 report_fatal_error("symbol '" + B->getSymbol().getName() +
223 "' can not be undefined in a subtraction expression");
224
225 // FIXME: is Type correct? see include/llvm/Object/MachOFormat.h
226 Value2 = Writer->getSymbolAddress(B_SD, Layout);
227 FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
228 }
229 // FIXME: does FixedValue get used??
230
231 // Relocations are written out in reverse order, so the PAIR comes first.
232 if (Type == macho::RIT_PPC_SECTDIFF || Type == macho::RIT_PPC_HI16_SECTDIFF ||
233 Type == macho::RIT_PPC_LO16_SECTDIFF ||
234 Type == macho::RIT_PPC_HA16_SECTDIFF ||
235 Type == macho::RIT_PPC_LO14_SECTDIFF ||
236 Type == macho::RIT_PPC_LOCAL_SECTDIFF) {
237 // X86 had this piece, but ARM does not
238 // If the offset is too large to fit in a scattered relocation,
239 // we're hosed. It's an unfortunate limitation of the MachO format.
240 if (FixupOffset > 0xffffff) {
241 char Buffer[32];
242 format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
243 Asm.getContext().FatalError(Fixup.getLoc(),
244 Twine("Section too large, can't encode "
245 "r_address (") +
246 Buffer + ") into 24 bits of scattered "
247 "relocation entry.");
248 llvm_unreachable("fatal error returned?!");
249 }
250
251 // Is this supposed to follow MCTarget/PPCAsmBackend.cpp:adjustFixupValue()?
252 // see PPCMCExpr::EvaluateAsRelocatableImpl()
253 uint32_t other_half = 0;
254 switch (Type) {
255 case macho::RIT_PPC_LO16_SECTDIFF:
256 other_half = (FixedValue >> 16) & 0xffff;
257 // applyFixupOffset longer extracts the high part because it now assumes
258 // this was already done.
259 // It looks like this is not true for the FixedValue needed with Mach-O
260 // relocs.
261 // So we need to adjust FixedValue again here.
262 FixedValue &= 0xffff;
263 break;
264 case macho::RIT_PPC_HA16_SECTDIFF:
265 other_half = FixedValue & 0xffff;
266 FixedValue =
267 ((FixedValue >> 16) + ((FixedValue & 0x8000) ? 1 : 0)) & 0xffff;
268 break;
269 case macho::RIT_PPC_HI16_SECTDIFF:
270 other_half = FixedValue & 0xffff;
271 FixedValue = (FixedValue >> 16) & 0xffff;
272 break;
273 default:
274 llvm_unreachable("Invalid PPC scattered relocation type.");
275 break;
276 }
277
278 macho::RelocationEntry MRE;
279 makeScatteredRelocationInfo(MRE, other_half, macho::RIT_Pair, Log2Size,
280 IsPCRel, Value2);
281 Writer->addRelocation(Fragment->getParent(), MRE);
282 } else {
283 // If the offset is more than 24-bits, it won't fit in a scattered
284 // relocation offset field, so we fall back to using a non-scattered
285 // relocation. This is a bit risky, as if the offset reaches out of
286 // the block and the linker is doing scattered loading on this
287 // symbol, things can go badly.
288 //
289 // Required for 'as' compatibility.
290 if (FixupOffset > 0xffffff)
291 return false;
292 }
293 macho::RelocationEntry MRE;
294 makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
295 Writer->addRelocation(Fragment->getParent(), MRE);
296 return true;
297 }
298
299 // see PPCELFObjectWriter for a general outline of cases
300 void PPCMachObjectWriter::RecordPPCRelocation(
301 MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
302 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
303 uint64_t &FixedValue) {
304 const MCFixupKind FK = Fixup.getKind(); // unsigned
305 const unsigned Log2Size = getFixupKindLog2Size(FK);
306 const bool IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
307 const unsigned RelocType = getRelocType(Target, FK, IsPCRel);
308
309 // If this is a difference or a defined symbol plus an offset, then we need a
310 // scattered relocation entry. Differences always require scattered
311 // relocations.
312 if (Target.getSymB() &&
313 // Q: are branch targets ever scattered?
314 RelocType != macho::RIT_PPC_BR24 && RelocType != macho::RIT_PPC_BR14) {
315 RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
316 Log2Size, FixedValue);
317 return;
318 }
319
320 // this doesn't seem right for RIT_PPC_BR24
321 // Get the symbol data, if any.
322 MCSymbolData *SD = 0;
323 if (Target.getSymA())
324 SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
325
326 // See .
327 const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
328 unsigned Index = 0;
329 unsigned IsExtern = 0;
330 unsigned Type = RelocType;
331
332 if (Target.isAbsolute()) { // constant
333 // SymbolNum of 0 indicates the absolute section.
334 //
335 // FIXME: Currently, these are never generated (see code below). I cannot
336 // find a case where they are actually emitted.
337 report_fatal_error("FIXME: relocations to absolute targets "
338 "not yet implemented");
339 // the above line stolen from ARM, not sure
340 } else {
341 // Resolve constant variables.
342 if (SD->getSymbol().isVariable()) {
343 int64_t Res;
344 if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
345 Res, Layout, Writer->getSectionAddressMap())) {
346 FixedValue = Res;
347 return;
348 }
349 }
350
351 // Check whether we need an external or internal relocation.
352 if (Writer->doesSymbolRequireExternRelocation(SD)) {
353 IsExtern = 1;
354 Index = SD->getIndex();
355 // For external relocations, make sure to offset the fixup value to
356 // compensate for the addend of the symbol address, if it was
357 // undefined. This occurs with weak definitions, for example.
358 if (!SD->Symbol->isUndefined())
359 FixedValue -= Layout.getSymbolOffset(SD);
360 } else {
361 // The index is the section ordinal (1-based).
362 const MCSectionData &SymSD =
363 Asm.getSectionData(SD->getSymbol().getSection());
364 Index = SymSD.getOrdinal() + 1;
365 FixedValue += Writer->getSectionAddress(&SymSD);
366 }
367 if (IsPCRel)
368 FixedValue -= Writer->getSectionAddress(Fragment->getParent());
369 }
370
371 // struct relocation_info (8 bytes)
372 macho::RelocationEntry MRE;
373 makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, IsExtern,
374 Type);
375 Writer->addRelocation(Fragment->getParent(), MRE);
376 }
377
378 MCObjectWriter *llvm::createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
379 uint32_t CPUType,
380 uint32_t CPUSubtype) {
381 return createMachObjectWriter(
382 new PPCMachObjectWriter(Is64Bit, CPUType, CPUSubtype), OS,
383 /*IsLittleEndian=*/false);
384 }
0 ; This tests for the basic implementation of PPCMachObjectWriter.cpp,
1 ; which is responsible for writing mach-o relocation entries for (PIC)
2 ; PowerPC objects.
3 ; NOTE: Darwin PPC asm syntax is not yet supported by PPCAsmParser,
4 ; so this test case uses ELF PPC asm syntax to produce a mach-o object.
5 ; Once PPCAsmParser supports darwin asm syntax, this test case should
6 ; be updated accordingly.
7
8 ; RUN: llvm-mc -filetype=obj -relocation-model=pic -mcpu=g4 -triple=powerpc-apple-darwin8 %s -o - | llvm-readobj -relocations | FileCheck -check-prefix=DARWIN-G4-DUMP %s
9
10 ; .machine ppc7400
11 .section __TEXT,__textcoal_nt,coalesced,pure_instructions
12 .section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
13 .section __TEXT,__text,regular,pure_instructions
14 .globl _main
15 .align 4
16 _main: ; @main
17 ; BB#0: ; %entry
18 mflr 0
19 stw 31, -4(1)
20 stw 0, 8(1)
21 stwu 1, -80(1)
22 bl L0$pb
23 L0$pb:
24 mr 31, 1
25 li 5, 0
26 mflr 2
27 stw 3, 68(31)
28 stw 5, 72(31)
29 stw 4, 64(31)
30 addis 2, 2, (L_.str-L0$pb)@ha
31 la 3, (L_.str-L0$pb)@l(2)
32 bl L_puts$stub
33 li 3, 0
34 addi 1, 1, 80
35 lwz 0, 8(1)
36 lwz 31, -4(1)
37 mtlr 0
38 blr
39
40 .section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
41 .align 4
42 L_puts$stub:
43 .indirect_symbol _puts
44 mflr 0
45 bcl 20, 31, L_puts$stub$tmp
46 L_puts$stub$tmp:
47 mflr 11
48 addis 11, 11, (L_puts$lazy_ptr-L_puts$stub$tmp)@ha
49 mtlr 0
50 lwzu 12, (L_puts$lazy_ptr-L_puts$stub$tmp)@l(11)
51 mtctr 12
52 bctr
53 .section __DATA,__la_symbol_ptr,lazy_symbol_pointers
54 L_puts$lazy_ptr:
55 .indirect_symbol _puts
56 .long dyld_stub_binding_helper
57
58 .subsections_via_symbols
59 .section __TEXT,__cstring,cstring_literals
60 L_.str: ; @.str
61 .asciz "Hello, world!"
62
63 ; DARWIN-G4-DUMP:Format: Mach-O 32-bit ppc
64 ; DARWIN-G4-DUMP:Arch: powerpc
65 ; DARWIN-G4-DUMP:AddressSize: 32bit
66 ; DARWIN-G4-DUMP:Relocations [
67 ; DARWIN-G4-DUMP: Section __text {
68 ; DARWIN-G4-DUMP: 0x34 1 2 0 PPC_RELOC_BR24 0 -
69 ; DARWIN-G4-DUMP: 0x30 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 _main
70 ; DARWIN-G4-DUMP: 0x0 0 2 n/a PPC_RELOC_PAIR 1 _main
71 ; DARWIN-G4-DUMP: 0x2C 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 _main
72 ; DARWIN-G4-DUMP: 0x60 0 2 n/a PPC_RELOC_PAIR 1 _main
73 ; DARWIN-G4-DUMP: }
74 ; DARWIN-G4-DUMP: Section __picsymbolstub1 {
75 ; DARWIN-G4-DUMP: 0x14 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 _main
76 ; DARWIN-G4-DUMP: 0x0 0 2 n/a PPC_RELOC_PAIR 1 _main
77 ; DARWIN-G4-DUMP: 0xC 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 _main
78 ; DARWIN-G4-DUMP: 0x18 0 2 n/a PPC_RELOC_PAIR 1 _main
79 ; DARWIN-G4-DUMP: }
80 ; DARWIN-G4-DUMP: Section __la_symbol_ptr {
81 ; DARWIN-G4-DUMP: 0x0 0 2 1 PPC_RELOC_VANILLA 0 dyld_stub_binding_helper
82 ; DARWIN-G4-DUMP: }
83 ; DARWIN-G4-DUMP:]