llvm.org GIT mirror llvm / d4d4fca
Rename SSEDomainFix -> lib/CodeGen/ExecutionDepsFix. I'll clean up the source in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140663 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
4 changed file(s) with 521 addition(s) and 521 deletion(s). Raw diff Collapse all Expand all
1212 EdgeBundles.cpp
1313 ELFCodeEmitter.cpp
1414 ELFWriter.cpp
15 ExecutionDepsFix.cpp
1516 ExpandISelPseudos.cpp
1617 ExpandPostRAPseudos.cpp
1718 GCMetadata.cpp
0 //===- SSEDomainFix.cpp - Use proper int/float domain for SSE ---*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the SSEDomainFix pass.
10 //
11 // Some SSE instructions like mov, and, or, xor are available in different
12 // variants for different operand types. These variant instructions are
13 // equivalent, but on Nehalem and newer cpus there is extra latency
14 // transferring data between integer and floating point domains.
15 //
16 // This pass changes the variant instructions to minimize domain crossings.
17 //
18 //===----------------------------------------------------------------------===//
19
20 #define DEBUG_TYPE "execution-fix"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/ADT/DepthFirstIterator.h"
27 #include "llvm/Support/Allocator.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/raw_ostream.h"
30 using namespace llvm;
31
32 /// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
33 /// of execution domains.
34 ///
35 /// An open DomainValue represents a set of instructions that can still switch
36 /// execution domain. Multiple registers may refer to the same open
37 /// DomainValue - they will eventually be collapsed to the same execution
38 /// domain.
39 ///
40 /// A collapsed DomainValue represents a single register that has been forced
41 /// into one of more execution domains. There is a separate collapsed
42 /// DomainValue for each register, but it may contain multiple execution
43 /// domains. A register value is initially created in a single execution
44 /// domain, but if we were forced to pay the penalty of a domain crossing, we
45 /// keep track of the fact the the register is now available in multiple
46 /// domains.
47 namespace {
48 struct DomainValue {
49 // Basic reference counting.
50 unsigned Refs;
51
52 // Bitmask of available domains. For an open DomainValue, it is the still
53 // possible domains for collapsing. For a collapsed DomainValue it is the
54 // domains where the register is available for free.
55 unsigned AvailableDomains;
56
57 // Position of the last defining instruction.
58 unsigned Dist;
59
60 // Twiddleable instructions using or defining these registers.
61 SmallVector Instrs;
62
63 // A collapsed DomainValue has no instructions to twiddle - it simply keeps
64 // track of the domains where the registers are already available.
65 bool isCollapsed() const { return Instrs.empty(); }
66
67 // Is domain available?
68 bool hasDomain(unsigned domain) const {
69 return AvailableDomains & (1u << domain);
70 }
71
72 // Mark domain as available.
73 void addDomain(unsigned domain) {
74 AvailableDomains |= 1u << domain;
75 }
76
77 // Restrict to a single domain available.
78 void setSingleDomain(unsigned domain) {
79 AvailableDomains = 1u << domain;
80 }
81
82 // Return bitmask of domains that are available and in mask.
83 unsigned getCommonDomains(unsigned mask) const {
84 return AvailableDomains & mask;
85 }
86
87 // First domain available.
88 unsigned getFirstDomain() const {
89 return CountTrailingZeros_32(AvailableDomains);
90 }
91
92 DomainValue() { clear(); }
93
94 void clear() {
95 Refs = AvailableDomains = Dist = 0;
96 Instrs.clear();
97 }
98 };
99 }
100
101 namespace {
102 class SSEDomainFixPass : public MachineFunctionPass {
103 static char ID;
104 SpecificBumpPtrAllocator Allocator;
105 SmallVector Avail;
106
107 const TargetRegisterClass *const RC;
108 MachineFunction *MF;
109 const TargetInstrInfo *TII;
110 const TargetRegisterInfo *TRI;
111 MachineBasicBlock *MBB;
112 std::vector AliasMap;
113 const unsigned NumRegs;
114 DomainValue **LiveRegs;
115 typedef DenseMap LiveOutMap;
116 LiveOutMap LiveOuts;
117 unsigned Distance;
118
119 public:
120 SSEDomainFixPass(const TargetRegisterClass *rc)
121 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
122
123 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
124 AU.setPreservesAll();
125 MachineFunctionPass::getAnalysisUsage(AU);
126 }
127
128 virtual bool runOnMachineFunction(MachineFunction &MF);
129
130 virtual const char *getPassName() const {
131 return "SSE execution domain fixup";
132 }
133
134 private:
135 // Register mapping.
136 int RegIndex(unsigned Reg);
137
138 // DomainValue allocation.
139 DomainValue *Alloc(int domain = -1);
140 void Recycle(DomainValue*);
141
142 // LiveRegs manipulations.
143 void SetLiveReg(int rx, DomainValue *DV);
144 void Kill(int rx);
145 void Force(int rx, unsigned domain);
146 void Collapse(DomainValue *dv, unsigned domain);
147 bool Merge(DomainValue *A, DomainValue *B);
148
149 void enterBasicBlock();
150 void visitGenericInstr(MachineInstr*);
151 void visitSoftInstr(MachineInstr*, unsigned mask);
152 void visitHardInstr(MachineInstr*, unsigned domain);
153 };
154 }
155
156 char SSEDomainFixPass::ID = 0;
157
158 /// Translate TRI register number to an index into our smaller tables of
159 /// interesting registers. Return -1 for boring registers.
160 int SSEDomainFixPass::RegIndex(unsigned Reg) {
161 assert(Reg < AliasMap.size() && "Invalid register");
162 return AliasMap[Reg];
163 }
164
165 DomainValue *SSEDomainFixPass::Alloc(int domain) {
166 DomainValue *dv = Avail.empty() ?
167 new(Allocator.Allocate()) DomainValue :
168 Avail.pop_back_val();
169 dv->Dist = Distance;
170 if (domain >= 0)
171 dv->addDomain(domain);
172 return dv;
173 }
174
175 void SSEDomainFixPass::Recycle(DomainValue *dv) {
176 assert(dv && "Cannot recycle NULL");
177 dv->clear();
178 Avail.push_back(dv);
179 }
180
181 /// Set LiveRegs[rx] = dv, updating reference counts.
182 void SSEDomainFixPass::SetLiveReg(int rx, DomainValue *dv) {
183 assert(unsigned(rx) < NumRegs && "Invalid index");
184 if (!LiveRegs) {
185 LiveRegs = new DomainValue*[NumRegs];
186 std::fill(LiveRegs, LiveRegs+NumRegs, (DomainValue*)0);
187 }
188
189 if (LiveRegs[rx] == dv)
190 return;
191 if (LiveRegs[rx]) {
192 assert(LiveRegs[rx]->Refs && "Bad refcount");
193 if (--LiveRegs[rx]->Refs == 0) Recycle(LiveRegs[rx]);
194 }
195 LiveRegs[rx] = dv;
196 if (dv) ++dv->Refs;
197 }
198
199 // Kill register rx, recycle or collapse any DomainValue.
200 void SSEDomainFixPass::Kill(int rx) {
201 assert(unsigned(rx) < NumRegs && "Invalid index");
202 if (!LiveRegs || !LiveRegs[rx]) return;
203
204 // Before killing the last reference to an open DomainValue, collapse it to
205 // the first available domain.
206 if (LiveRegs[rx]->Refs == 1 && !LiveRegs[rx]->isCollapsed())
207 Collapse(LiveRegs[rx], LiveRegs[rx]->getFirstDomain());
208 else
209 SetLiveReg(rx, 0);
210 }
211
212 /// Force register rx into domain.
213 void SSEDomainFixPass::Force(int rx, unsigned domain) {
214 assert(unsigned(rx) < NumRegs && "Invalid index");
215 DomainValue *dv;
216 if (LiveRegs && (dv = LiveRegs[rx])) {
217 if (dv->isCollapsed())
218 dv->addDomain(domain);
219 else if (dv->hasDomain(domain))
220 Collapse(dv, domain);
221 else {
222 // This is an incompatible open DomainValue. Collapse it to whatever and force
223 // the new value into domain. This costs a domain crossing.
224 Collapse(dv, dv->getFirstDomain());
225 assert(LiveRegs[rx] && "Not live after collapse?");
226 LiveRegs[rx]->addDomain(domain);
227 }
228 } else {
229 // Set up basic collapsed DomainValue.
230 SetLiveReg(rx, Alloc(domain));
231 }
232 }
233
234 /// Collapse open DomainValue into given domain. If there are multiple
235 /// registers using dv, they each get a unique collapsed DomainValue.
236 void SSEDomainFixPass::Collapse(DomainValue *dv, unsigned domain) {
237 assert(dv->hasDomain(domain) && "Cannot collapse");
238
239 // Collapse all the instructions.
240 while (!dv->Instrs.empty())
241 TII->setExecutionDomain(dv->Instrs.pop_back_val(), domain);
242 dv->setSingleDomain(domain);
243
244 // If there are multiple users, give them new, unique DomainValues.
245 if (LiveRegs && dv->Refs > 1)
246 for (unsigned rx = 0; rx != NumRegs; ++rx)
247 if (LiveRegs[rx] == dv)
248 SetLiveReg(rx, Alloc(domain));
249 }
250
251 /// Merge - All instructions and registers in B are moved to A, and B is
252 /// released.
253 bool SSEDomainFixPass::Merge(DomainValue *A, DomainValue *B) {
254 assert(!A->isCollapsed() && "Cannot merge into collapsed");
255 assert(!B->isCollapsed() && "Cannot merge from collapsed");
256 if (A == B)
257 return true;
258 // Restrict to the domains that A and B have in common.
259 unsigned common = A->getCommonDomains(B->AvailableDomains);
260 if (!common)
261 return false;
262 A->AvailableDomains = common;
263 A->Dist = std::max(A->Dist, B->Dist);
264 A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
265 for (unsigned rx = 0; rx != NumRegs; ++rx)
266 if (LiveRegs[rx] == B)
267 SetLiveReg(rx, A);
268 return true;
269 }
270
271 void SSEDomainFixPass::enterBasicBlock() {
272 // Try to coalesce live-out registers from predecessors.
273 for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
274 e = MBB->livein_end(); i != e; ++i) {
275 int rx = RegIndex(*i);
276 if (rx < 0) continue;
277 for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(),
278 pe = MBB->pred_end(); pi != pe; ++pi) {
279 LiveOutMap::const_iterator fi = LiveOuts.find(*pi);
280 if (fi == LiveOuts.end()) continue;
281 DomainValue *pdv = fi->second[rx];
282 if (!pdv) continue;
283 if (!LiveRegs || !LiveRegs[rx]) {
284 SetLiveReg(rx, pdv);
285 continue;
286 }
287
288 // We have a live DomainValue from more than one predecessor.
289 if (LiveRegs[rx]->isCollapsed()) {
290 // We are already collapsed, but predecessor is not. Force him.
291 unsigned domain = LiveRegs[rx]->getFirstDomain();
292 if (!pdv->isCollapsed() && pdv->hasDomain(domain))
293 Collapse(pdv, domain);
294 continue;
295 }
296
297 // Currently open, merge in predecessor.
298 if (!pdv->isCollapsed())
299 Merge(LiveRegs[rx], pdv);
300 else
301 Force(rx, pdv->getFirstDomain());
302 }
303 }
304 }
305
306 // A hard instruction only works in one domain. All input registers will be
307 // forced into that domain.
308 void SSEDomainFixPass::visitHardInstr(MachineInstr *mi, unsigned domain) {
309 // Collapse all uses.
310 for (unsigned i = mi->getDesc().getNumDefs(),
311 e = mi->getDesc().getNumOperands(); i != e; ++i) {
312 MachineOperand &mo = mi->getOperand(i);
313 if (!mo.isReg()) continue;
314 int rx = RegIndex(mo.getReg());
315 if (rx < 0) continue;
316 Force(rx, domain);
317 }
318
319 // Kill all defs and force them.
320 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
321 MachineOperand &mo = mi->getOperand(i);
322 if (!mo.isReg()) continue;
323 int rx = RegIndex(mo.getReg());
324 if (rx < 0) continue;
325 Kill(rx);
326 Force(rx, domain);
327 }
328 }
329
330 // A soft instruction can be changed to work in other domains given by mask.
331 void SSEDomainFixPass::visitSoftInstr(MachineInstr *mi, unsigned mask) {
332 // Bitmask of available domains for this instruction after taking collapsed
333 // operands into account.
334 unsigned available = mask;
335
336 // Scan the explicit use operands for incoming domains.
337 SmallVector used;
338 if (LiveRegs)
339 for (unsigned i = mi->getDesc().getNumDefs(),
340 e = mi->getDesc().getNumOperands(); i != e; ++i) {
341 MachineOperand &mo = mi->getOperand(i);
342 if (!mo.isReg()) continue;
343 int rx = RegIndex(mo.getReg());
344 if (rx < 0) continue;
345 if (DomainValue *dv = LiveRegs[rx]) {
346 // Bitmask of domains that dv and available have in common.
347 unsigned common = dv->getCommonDomains(available);
348 // Is it possible to use this collapsed register for free?
349 if (dv->isCollapsed()) {
350 // Restrict available domains to the ones in common with the operand.
351 // If there are no common domains, we must pay the cross-domain
352 // penalty for this operand.
353 if (common) available = common;
354 } else if (common)
355 // Open DomainValue is compatible, save it for merging.
356 used.push_back(rx);
357 else
358 // Open DomainValue is not compatible with instruction. It is useless
359 // now.
360 Kill(rx);
361 }
362 }
363
364 // If the collapsed operands force a single domain, propagate the collapse.
365 if (isPowerOf2_32(available)) {
366 unsigned domain = CountTrailingZeros_32(available);
367 TII->setExecutionDomain(mi, domain);
368 visitHardInstr(mi, domain);
369 return;
370 }
371
372 // Kill off any remaining uses that don't match available, and build a list of
373 // incoming DomainValues that we want to merge.
374 SmallVector doms;
375 for (SmallVector::iterator i=used.begin(), e=used.end(); i!=e; ++i) {
376 int rx = *i;
377 DomainValue *dv = LiveRegs[rx];
378 // This useless DomainValue could have been missed above.
379 if (!dv->getCommonDomains(available)) {
380 Kill(*i);
381 continue;
382 }
383 // sorted, uniqued insert.
384 bool inserted = false;
385 for (SmallVector::iterator i = doms.begin(), e = doms.end();
386 i != e && !inserted; ++i) {
387 if (dv == *i)
388 inserted = true;
389 else if (dv->Dist < (*i)->Dist) {
390 inserted = true;
391 doms.insert(i, dv);
392 }
393 }
394 if (!inserted)
395 doms.push_back(dv);
396 }
397
398 // doms are now sorted in order of appearance. Try to merge them all, giving
399 // priority to the latest ones.
400 DomainValue *dv = 0;
401 while (!doms.empty()) {
402 if (!dv) {
403 dv = doms.pop_back_val();
404 continue;
405 }
406
407 DomainValue *latest = doms.pop_back_val();
408 if (Merge(dv, latest)) continue;
409
410 // If latest didn't merge, it is useless now. Kill all registers using it.
411 for (SmallVector::iterator i=used.begin(), e=used.end(); i != e; ++i)
412 if (LiveRegs[*i] == latest)
413 Kill(*i);
414 }
415
416 // dv is the DomainValue we are going to use for this instruction.
417 if (!dv)
418 dv = Alloc();
419 dv->Dist = Distance;
420 dv->AvailableDomains = available;
421 dv->Instrs.push_back(mi);
422
423 // Finally set all defs and non-collapsed uses to dv.
424 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) {
425 MachineOperand &mo = mi->getOperand(i);
426 if (!mo.isReg()) continue;
427 int rx = RegIndex(mo.getReg());
428 if (rx < 0) continue;
429 if (!LiveRegs || !LiveRegs[rx] || (mo.isDef() && LiveRegs[rx]!=dv)) {
430 Kill(rx);
431 SetLiveReg(rx, dv);
432 }
433 }
434 }
435
436 void SSEDomainFixPass::visitGenericInstr(MachineInstr *mi) {
437 // Process explicit defs, kill any XMM registers redefined.
438 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
439 MachineOperand &mo = mi->getOperand(i);
440 if (!mo.isReg()) continue;
441 int rx = RegIndex(mo.getReg());
442 if (rx < 0) continue;
443 Kill(rx);
444 }
445 }
446
447 bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
448 MF = &mf;
449 TII = MF->getTarget().getInstrInfo();
450 TRI = MF->getTarget().getRegisterInfo();
451 MBB = 0;
452 LiveRegs = 0;
453 Distance = 0;
454 assert(NumRegs == RC->getNumRegs() && "Bad regclass");
455
456 // If no XMM registers are used in the function, we can skip it completely.
457 bool anyregs = false;
458 for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
459 I != E; ++I)
460 if (MF->getRegInfo().isPhysRegUsed(*I)) {
461 anyregs = true;
462 break;
463 }
464 if (!anyregs) return false;
465
466 // Initialize the AliasMap on the first use.
467 if (AliasMap.empty()) {
468 // Given a PhysReg, AliasMap[PhysReg] is either the relevant index into RC,
469 // or -1.
470 AliasMap.resize(TRI->getNumRegs(), -1);
471 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
472 for (const unsigned *AI = TRI->getOverlaps(RC->getRegister(i)); *AI; ++AI)
473 AliasMap[*AI] = i;
474 }
475
476 MachineBasicBlock *Entry = MF->begin();
477 SmallPtrSet Visited;
478 for (df_ext_iterator >
479 DFI = df_ext_begin(Entry, Visited), DFE = df_ext_end(Entry, Visited);
480 DFI != DFE; ++DFI) {
481 MBB = *DFI;
482 enterBasicBlock();
483 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
484 ++I) {
485 MachineInstr *mi = I;
486 if (mi->isDebugValue()) continue;
487 ++Distance;
488 std::pair domp = TII->getExecutionDomain(mi);
489 if (domp.first)
490 if (domp.second)
491 visitSoftInstr(mi, domp.second);
492 else
493 visitHardInstr(mi, domp.first);
494 else if (LiveRegs)
495 visitGenericInstr(mi);
496 }
497
498 // Save live registers at end of MBB - used by enterBasicBlock().
499 if (LiveRegs)
500 LiveOuts.insert(std::make_pair(MBB, LiveRegs));
501 LiveRegs = 0;
502 }
503
504 // Clear the LiveOuts vectors. Should we also collapse any remaining
505 // DomainValues?
506 for (LiveOutMap::const_iterator i = LiveOuts.begin(), e = LiveOuts.end();
507 i != e; ++i)
508 delete[] i->second;
509 LiveOuts.clear();
510 Avail.clear();
511 Allocator.DestroyAll();
512
513 return false;
514 }
515
516 FunctionPass *
517 llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
518 return new SSEDomainFixPass(RC);
519 }
1313 add_public_tablegen_target(X86CommonTableGen)
1414
1515 set(sources
16 SSEDomainFix.cpp
1716 X86AsmPrinter.cpp
1817 X86COFFMachineModuleInfo.cpp
1918 X86CodeEmitter.cpp
+0
-520
lib/Target/X86/SSEDomainFix.cpp less more
None //===- SSEDomainFix.cpp - Use proper int/float domain for SSE ---*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the SSEDomainFix pass.
10 //
11 // Some SSE instructions like mov, and, or, xor are available in different
12 // variants for different operand types. These variant instructions are
13 // equivalent, but on Nehalem and newer cpus there is extra latency
14 // transferring data between integer and floating point domains.
15 //
16 // This pass changes the variant instructions to minimize domain crossings.
17 //
18 //===----------------------------------------------------------------------===//
19
20 #define DEBUG_TYPE "execution-fix"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/ADT/DepthFirstIterator.h"
27 #include "llvm/Support/Allocator.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/raw_ostream.h"
30 using namespace llvm;
31
32 /// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
33 /// of execution domains.
34 ///
35 /// An open DomainValue represents a set of instructions that can still switch
36 /// execution domain. Multiple registers may refer to the same open
37 /// DomainValue - they will eventually be collapsed to the same execution
38 /// domain.
39 ///
40 /// A collapsed DomainValue represents a single register that has been forced
41 /// into one of more execution domains. There is a separate collapsed
42 /// DomainValue for each register, but it may contain multiple execution
43 /// domains. A register value is initially created in a single execution
44 /// domain, but if we were forced to pay the penalty of a domain crossing, we
45 /// keep track of the fact the the register is now available in multiple
46 /// domains.
47 namespace {
48 struct DomainValue {
49 // Basic reference counting.
50 unsigned Refs;
51
52 // Bitmask of available domains. For an open DomainValue, it is the still
53 // possible domains for collapsing. For a collapsed DomainValue it is the
54 // domains where the register is available for free.
55 unsigned AvailableDomains;
56
57 // Position of the last defining instruction.
58 unsigned Dist;
59
60 // Twiddleable instructions using or defining these registers.
61 SmallVector Instrs;
62
63 // A collapsed DomainValue has no instructions to twiddle - it simply keeps
64 // track of the domains where the registers are already available.
65 bool isCollapsed() const { return Instrs.empty(); }
66
67 // Is domain available?
68 bool hasDomain(unsigned domain) const {
69 return AvailableDomains & (1u << domain);
70 }
71
72 // Mark domain as available.
73 void addDomain(unsigned domain) {
74 AvailableDomains |= 1u << domain;
75 }
76
77 // Restrict to a single domain available.
78 void setSingleDomain(unsigned domain) {
79 AvailableDomains = 1u << domain;
80 }
81
82 // Return bitmask of domains that are available and in mask.
83 unsigned getCommonDomains(unsigned mask) const {
84 return AvailableDomains & mask;
85 }
86
87 // First domain available.
88 unsigned getFirstDomain() const {
89 return CountTrailingZeros_32(AvailableDomains);
90 }
91
92 DomainValue() { clear(); }
93
94 void clear() {
95 Refs = AvailableDomains = Dist = 0;
96 Instrs.clear();
97 }
98 };
99 }
100
101 namespace {
102 class SSEDomainFixPass : public MachineFunctionPass {
103 static char ID;
104 SpecificBumpPtrAllocator Allocator;
105 SmallVector Avail;
106
107 const TargetRegisterClass *const RC;
108 MachineFunction *MF;
109 const TargetInstrInfo *TII;
110 const TargetRegisterInfo *TRI;
111 MachineBasicBlock *MBB;
112 std::vector AliasMap;
113 const unsigned NumRegs;
114 DomainValue **LiveRegs;
115 typedef DenseMap LiveOutMap;
116 LiveOutMap LiveOuts;
117 unsigned Distance;
118
119 public:
120 SSEDomainFixPass(const TargetRegisterClass *rc)
121 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
122
123 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
124 AU.setPreservesAll();
125 MachineFunctionPass::getAnalysisUsage(AU);
126 }
127
128 virtual bool runOnMachineFunction(MachineFunction &MF);
129
130 virtual const char *getPassName() const {
131 return "SSE execution domain fixup";
132 }
133
134 private:
135 // Register mapping.
136 int RegIndex(unsigned Reg);
137
138 // DomainValue allocation.
139 DomainValue *Alloc(int domain = -1);
140 void Recycle(DomainValue*);
141
142 // LiveRegs manipulations.
143 void SetLiveReg(int rx, DomainValue *DV);
144 void Kill(int rx);
145 void Force(int rx, unsigned domain);
146 void Collapse(DomainValue *dv, unsigned domain);
147 bool Merge(DomainValue *A, DomainValue *B);
148
149 void enterBasicBlock();
150 void visitGenericInstr(MachineInstr*);
151 void visitSoftInstr(MachineInstr*, unsigned mask);
152 void visitHardInstr(MachineInstr*, unsigned domain);
153 };
154 }
155
156 char SSEDomainFixPass::ID = 0;
157
158 /// Translate TRI register number to an index into our smaller tables of
159 /// interesting registers. Return -1 for boring registers.
160 int SSEDomainFixPass::RegIndex(unsigned Reg) {
161 assert(Reg < AliasMap.size() && "Invalid register");
162 return AliasMap[Reg];
163 }
164
165 DomainValue *SSEDomainFixPass::Alloc(int domain) {
166 DomainValue *dv = Avail.empty() ?
167 new(Allocator.Allocate()) DomainValue :
168 Avail.pop_back_val();
169 dv->Dist = Distance;
170 if (domain >= 0)
171 dv->addDomain(domain);
172 return dv;
173 }
174
175 void SSEDomainFixPass::Recycle(DomainValue *dv) {
176 assert(dv && "Cannot recycle NULL");
177 dv->clear();
178 Avail.push_back(dv);
179 }
180
181 /// Set LiveRegs[rx] = dv, updating reference counts.
182 void SSEDomainFixPass::SetLiveReg(int rx, DomainValue *dv) {
183 assert(unsigned(rx) < NumRegs && "Invalid index");
184 if (!LiveRegs) {
185 LiveRegs = new DomainValue*[NumRegs];
186 std::fill(LiveRegs, LiveRegs+NumRegs, (DomainValue*)0);
187 }
188
189 if (LiveRegs[rx] == dv)
190 return;
191 if (LiveRegs[rx]) {
192 assert(LiveRegs[rx]->Refs && "Bad refcount");
193 if (--LiveRegs[rx]->Refs == 0) Recycle(LiveRegs[rx]);
194 }
195 LiveRegs[rx] = dv;
196 if (dv) ++dv->Refs;
197 }
198
199 // Kill register rx, recycle or collapse any DomainValue.
200 void SSEDomainFixPass::Kill(int rx) {
201 assert(unsigned(rx) < NumRegs && "Invalid index");
202 if (!LiveRegs || !LiveRegs[rx]) return;
203
204 // Before killing the last reference to an open DomainValue, collapse it to
205 // the first available domain.
206 if (LiveRegs[rx]->Refs == 1 && !LiveRegs[rx]->isCollapsed())
207 Collapse(LiveRegs[rx], LiveRegs[rx]->getFirstDomain());
208 else
209 SetLiveReg(rx, 0);
210 }
211
212 /// Force register rx into domain.
213 void SSEDomainFixPass::Force(int rx, unsigned domain) {
214 assert(unsigned(rx) < NumRegs && "Invalid index");
215 DomainValue *dv;
216 if (LiveRegs && (dv = LiveRegs[rx])) {
217 if (dv->isCollapsed())
218 dv->addDomain(domain);
219 else if (dv->hasDomain(domain))
220 Collapse(dv, domain);
221 else {
222 // This is an incompatible open DomainValue. Collapse it to whatever and force
223 // the new value into domain. This costs a domain crossing.
224 Collapse(dv, dv->getFirstDomain());
225 assert(LiveRegs[rx] && "Not live after collapse?");
226 LiveRegs[rx]->addDomain(domain);
227 }
228 } else {
229 // Set up basic collapsed DomainValue.
230 SetLiveReg(rx, Alloc(domain));
231 }
232 }
233
234 /// Collapse open DomainValue into given domain. If there are multiple
235 /// registers using dv, they each get a unique collapsed DomainValue.
236 void SSEDomainFixPass::Collapse(DomainValue *dv, unsigned domain) {
237 assert(dv->hasDomain(domain) && "Cannot collapse");
238
239 // Collapse all the instructions.
240 while (!dv->Instrs.empty())
241 TII->setExecutionDomain(dv->Instrs.pop_back_val(), domain);
242 dv->setSingleDomain(domain);
243
244 // If there are multiple users, give them new, unique DomainValues.
245 if (LiveRegs && dv->Refs > 1)
246 for (unsigned rx = 0; rx != NumRegs; ++rx)
247 if (LiveRegs[rx] == dv)
248 SetLiveReg(rx, Alloc(domain));
249 }
250
251 /// Merge - All instructions and registers in B are moved to A, and B is
252 /// released.
253 bool SSEDomainFixPass::Merge(DomainValue *A, DomainValue *B) {
254 assert(!A->isCollapsed() && "Cannot merge into collapsed");
255 assert(!B->isCollapsed() && "Cannot merge from collapsed");
256 if (A == B)
257 return true;
258 // Restrict to the domains that A and B have in common.
259 unsigned common = A->getCommonDomains(B->AvailableDomains);
260 if (!common)
261 return false;
262 A->AvailableDomains = common;
263 A->Dist = std::max(A->Dist, B->Dist);
264 A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
265 for (unsigned rx = 0; rx != NumRegs; ++rx)
266 if (LiveRegs[rx] == B)
267 SetLiveReg(rx, A);
268 return true;
269 }
270
271 void SSEDomainFixPass::enterBasicBlock() {
272 // Try to coalesce live-out registers from predecessors.
273 for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
274 e = MBB->livein_end(); i != e; ++i) {
275 int rx = RegIndex(*i);
276 if (rx < 0) continue;
277 for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(),
278 pe = MBB->pred_end(); pi != pe; ++pi) {
279 LiveOutMap::const_iterator fi = LiveOuts.find(*pi);
280 if (fi == LiveOuts.end()) continue;
281 DomainValue *pdv = fi->second[rx];
282 if (!pdv) continue;
283 if (!LiveRegs || !LiveRegs[rx]) {
284 SetLiveReg(rx, pdv);
285 continue;
286 }
287
288 // We have a live DomainValue from more than one predecessor.
289 if (LiveRegs[rx]->isCollapsed()) {
290 // We are already collapsed, but predecessor is not. Force him.
291 unsigned domain = LiveRegs[rx]->getFirstDomain();
292 if (!pdv->isCollapsed() && pdv->hasDomain(domain))
293 Collapse(pdv, domain);
294 continue;
295 }
296
297 // Currently open, merge in predecessor.
298 if (!pdv->isCollapsed())
299 Merge(LiveRegs[rx], pdv);
300 else
301 Force(rx, pdv->getFirstDomain());
302 }
303 }
304 }
305
306 // A hard instruction only works in one domain. All input registers will be
307 // forced into that domain.
308 void SSEDomainFixPass::visitHardInstr(MachineInstr *mi, unsigned domain) {
309 // Collapse all uses.
310 for (unsigned i = mi->getDesc().getNumDefs(),
311 e = mi->getDesc().getNumOperands(); i != e; ++i) {
312 MachineOperand &mo = mi->getOperand(i);
313 if (!mo.isReg()) continue;
314 int rx = RegIndex(mo.getReg());
315 if (rx < 0) continue;
316 Force(rx, domain);
317 }
318
319 // Kill all defs and force them.
320 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
321 MachineOperand &mo = mi->getOperand(i);
322 if (!mo.isReg()) continue;
323 int rx = RegIndex(mo.getReg());
324 if (rx < 0) continue;
325 Kill(rx);
326 Force(rx, domain);
327 }
328 }
329
330 // A soft instruction can be changed to work in other domains given by mask.
331 void SSEDomainFixPass::visitSoftInstr(MachineInstr *mi, unsigned mask) {
332 // Bitmask of available domains for this instruction after taking collapsed
333 // operands into account.
334 unsigned available = mask;
335
336 // Scan the explicit use operands for incoming domains.
337 SmallVector used;
338 if (LiveRegs)
339 for (unsigned i = mi->getDesc().getNumDefs(),
340 e = mi->getDesc().getNumOperands(); i != e; ++i) {
341 MachineOperand &mo = mi->getOperand(i);
342 if (!mo.isReg()) continue;
343 int rx = RegIndex(mo.getReg());
344 if (rx < 0) continue;
345 if (DomainValue *dv = LiveRegs[rx]) {
346 // Bitmask of domains that dv and available have in common.
347 unsigned common = dv->getCommonDomains(available);
348 // Is it possible to use this collapsed register for free?
349 if (dv->isCollapsed()) {
350 // Restrict available domains to the ones in common with the operand.
351 // If there are no common domains, we must pay the cross-domain
352 // penalty for this operand.
353 if (common) available = common;
354 } else if (common)
355 // Open DomainValue is compatible, save it for merging.
356 used.push_back(rx);
357 else
358 // Open DomainValue is not compatible with instruction. It is useless
359 // now.
360 Kill(rx);
361 }
362 }
363
364 // If the collapsed operands force a single domain, propagate the collapse.
365 if (isPowerOf2_32(available)) {
366 unsigned domain = CountTrailingZeros_32(available);
367 TII->setExecutionDomain(mi, domain);
368 visitHardInstr(mi, domain);
369 return;
370 }
371
372 // Kill off any remaining uses that don't match available, and build a list of
373 // incoming DomainValues that we want to merge.
374 SmallVector doms;
375 for (SmallVector::iterator i=used.begin(), e=used.end(); i!=e; ++i) {
376 int rx = *i;
377 DomainValue *dv = LiveRegs[rx];
378 // This useless DomainValue could have been missed above.
379 if (!dv->getCommonDomains(available)) {
380 Kill(*i);
381 continue;
382 }
383 // sorted, uniqued insert.
384 bool inserted = false;
385 for (SmallVector::iterator i = doms.begin(), e = doms.end();
386 i != e && !inserted; ++i) {
387 if (dv == *i)
388 inserted = true;
389 else if (dv->Dist < (*i)->Dist) {
390 inserted = true;
391 doms.insert(i, dv);
392 }
393 }
394 if (!inserted)
395 doms.push_back(dv);
396 }
397
398 // doms are now sorted in order of appearance. Try to merge them all, giving
399 // priority to the latest ones.
400 DomainValue *dv = 0;
401 while (!doms.empty()) {
402 if (!dv) {
403 dv = doms.pop_back_val();
404 continue;
405 }
406
407 DomainValue *latest = doms.pop_back_val();
408 if (Merge(dv, latest)) continue;
409
410 // If latest didn't merge, it is useless now. Kill all registers using it.
411 for (SmallVector::iterator i=used.begin(), e=used.end(); i != e; ++i)
412 if (LiveRegs[*i] == latest)
413 Kill(*i);
414 }
415
416 // dv is the DomainValue we are going to use for this instruction.
417 if (!dv)
418 dv = Alloc();
419 dv->Dist = Distance;
420 dv->AvailableDomains = available;
421 dv->Instrs.push_back(mi);
422
423 // Finally set all defs and non-collapsed uses to dv.
424 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) {
425 MachineOperand &mo = mi->getOperand(i);
426 if (!mo.isReg()) continue;
427 int rx = RegIndex(mo.getReg());
428 if (rx < 0) continue;
429 if (!LiveRegs || !LiveRegs[rx] || (mo.isDef() && LiveRegs[rx]!=dv)) {
430 Kill(rx);
431 SetLiveReg(rx, dv);
432 }
433 }
434 }
435
436 void SSEDomainFixPass::visitGenericInstr(MachineInstr *mi) {
437 // Process explicit defs, kill any XMM registers redefined.
438 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
439 MachineOperand &mo = mi->getOperand(i);
440 if (!mo.isReg()) continue;
441 int rx = RegIndex(mo.getReg());
442 if (rx < 0) continue;
443 Kill(rx);
444 }
445 }
446
447 bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
448 MF = &mf;
449 TII = MF->getTarget().getInstrInfo();
450 TRI = MF->getTarget().getRegisterInfo();
451 MBB = 0;
452 LiveRegs = 0;
453 Distance = 0;
454 assert(NumRegs == RC->getNumRegs() && "Bad regclass");
455
456 // If no XMM registers are used in the function, we can skip it completely.
457 bool anyregs = false;
458 for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
459 I != E; ++I)
460 if (MF->getRegInfo().isPhysRegUsed(*I)) {
461 anyregs = true;
462 break;
463 }
464 if (!anyregs) return false;
465
466 // Initialize the AliasMap on the first use.
467 if (AliasMap.empty()) {
468 // Given a PhysReg, AliasMap[PhysReg] is either the relevant index into RC,
469 // or -1.
470 AliasMap.resize(TRI->getNumRegs(), -1);
471 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
472 for (const unsigned *AI = TRI->getOverlaps(RC->getRegister(i)); *AI; ++AI)
473 AliasMap[*AI] = i;
474 }
475
476 MachineBasicBlock *Entry = MF->begin();
477 SmallPtrSet Visited;
478 for (df_ext_iterator >
479 DFI = df_ext_begin(Entry, Visited), DFE = df_ext_end(Entry, Visited);
480 DFI != DFE; ++DFI) {
481 MBB = *DFI;
482 enterBasicBlock();
483 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
484 ++I) {
485 MachineInstr *mi = I;
486 if (mi->isDebugValue()) continue;
487 ++Distance;
488 std::pair domp = TII->getExecutionDomain(mi);
489 if (domp.first)
490 if (domp.second)
491 visitSoftInstr(mi, domp.second);
492 else
493 visitHardInstr(mi, domp.first);
494 else if (LiveRegs)
495 visitGenericInstr(mi);
496 }
497
498 // Save live registers at end of MBB - used by enterBasicBlock().
499 if (LiveRegs)
500 LiveOuts.insert(std::make_pair(MBB, LiveRegs));
501 LiveRegs = 0;
502 }
503
504 // Clear the LiveOuts vectors. Should we also collapse any remaining
505 // DomainValues?
506 for (LiveOutMap::const_iterator i = LiveOuts.begin(), e = LiveOuts.end();
507 i != e; ++i)
508 delete[] i->second;
509 LiveOuts.clear();
510 Avail.clear();
511 Allocator.DestroyAll();
512
513 return false;
514 }
515
516 FunctionPass *
517 llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
518 return new SSEDomainFixPass(RC);
519 }