llvm.org GIT mirror llvm / d4cdf19
Reformat. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248261 91177308-0d34-0410-b5e6-96231b3b80d8 NAKAMURA Takumi 5 years ago
22 changed file(s) with 245 addition(s) and 281 deletion(s). Raw diff Collapse all Expand all
158158
159159 /// getIntegerValue - Return the value for an integer or pointer constant,
160160 /// or a vector thereof, with the given scalar value.
161 static Constant *getIntegerValue(Type* Ty, const APInt &V);
162
161 static Constant *getIntegerValue(Type *Ty, const APInt &V);
162
163163 /// removeDeadConstantUsers - If there are any dead constant users dangling
164164 /// off of this constant, remove them. This method is useful for clients
165165 /// that want to check to see if a global is unused, but don't want to deal
146146 /// and VectorType.
147147 class CompositeType : public Type {
148148 protected:
149 explicit CompositeType(LLVMContext &C, TypeID tid) : Type(C, tid) { }
150 public:
151
149 explicit CompositeType(LLVMContext &C, TypeID tid) : Type(C, tid) {}
150
151 public:
152152 /// getTypeAtIndex - Given an index value into the type, return the type of
153153 /// the element.
154154 ///
211211 /// StructType::create - This creates an identified struct.
212212 static StructType *create(LLVMContext &Context, StringRef Name);
213213 static StructType *create(LLVMContext &Context);
214
215 static StructType *create(ArrayRef Elements,
216 StringRef Name,
214
215 static StructType *create(ArrayRef Elements, StringRef Name,
217216 bool isPacked = false);
218 static StructType *create(ArrayRef Elements);
219 static StructType *create(LLVMContext &Context,
220 ArrayRef Elements,
221 StringRef Name,
222 bool isPacked = false);
223 static StructType *create(LLVMContext &Context, ArrayRef*> Elements);
217 static StructType *create(ArrayRef*> Elements);
218 static StructType *create(LLVMContext &Context, ArrayRef Elements,
219 StringRef Name, bool isPacked = false);
220 static StructType *create(LLVMContext &Context, ArrayRef Elements);
224221 static StructType *create(StringRef Name, Type *elt1, ...) LLVM_END_WITH_NULL;
225222
226223 /// StructType::get - This static method is the primary way to create a
249246 bool isOpaque() const { return (getSubclassData() & SCDB_HasBody) == 0; }
250247
251248 /// isSized - Return true if this is a sized type.
252 bool isSized(SmallPtrSetImpl *Visited = nullptr) const;
253
249 bool isSized(SmallPtrSetImpl *Visited = nullptr) const;
250
254251 /// hasName - Return true if this is a named struct that has a non-empty name.
255252 bool hasName() const { return SymbolTableEntry != nullptr; }
256253
299299 return AttributeSets.hasAttribute(AttributeSet::FunctionIndex,
300300 Attribute::ArgMemOnly);
301301 }
302 void setOnlyAccessesArgMemory() {
303 addFnAttr(Attribute::ArgMemOnly);
304 }
305
302 void setOnlyAccessesArgMemory() { addFnAttr(Attribute::ArgMemOnly); }
303
306304 /// @brief Determine if the function cannot return.
307305 bool doesNotReturn() const {
308306 return AttributeSets.hasAttribute(AttributeSet::FunctionIndex,
396394 }
397395
398396 /// Optimize this function for minimum size (-Oz).
399 bool optForMinSize() const {
400 return hasFnAttribute(Attribute::MinSize);
401 };
402
397 bool optForMinSize() const { return hasFnAttribute(Attribute::MinSize); };
398
403399 /// Optimize this function for size (-Os) or minimum size (-Oz).
404400 bool optForSize() const {
405401 return hasFnAttribute(Attribute::OptimizeForSize) || optForMinSize();
313313 }
314314
315315 /// \brief Fetch the type representing a 128-bit integer.
316 IntegerType *getInt128Ty() {
317 return Type::getInt128Ty(Context);
318 }
319
316 IntegerType *getInt128Ty() { return Type::getInt128Ty(Context); }
317
320318 /// \brief Fetch the type representing an N-bit integer.
321319 IntegerType *getIntNTy(unsigned N) {
322320 return Type::getIntNTy(Context, N);
440440 BO->setIsExact(true);
441441 return BO;
442442 }
443
444 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \
445 static BinaryOperator *Create ## NUWNSWEXACT ## OPC \
446 (Value *V1, Value *V2, const Twine &Name = "") { \
447 return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name); \
448 } \
449 static BinaryOperator *Create ## NUWNSWEXACT ## OPC \
450 (Value *V1, Value *V2, const Twine &Name, BasicBlock *BB) { \
451 return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name, BB); \
452 } \
453 static BinaryOperator *Create ## NUWNSWEXACT ## OPC \
454 (Value *V1, Value *V2, const Twine &Name, Instruction *I) { \
455 return Create ## NUWNSWEXACT(Instruction::OPC, V1, V2, Name, I); \
456 }
457
458 DEFINE_HELPERS(Add, NSW) // CreateNSWAdd
459 DEFINE_HELPERS(Add, NUW) // CreateNUWAdd
460 DEFINE_HELPERS(Sub, NSW) // CreateNSWSub
461 DEFINE_HELPERS(Sub, NUW) // CreateNUWSub
462 DEFINE_HELPERS(Mul, NSW) // CreateNSWMul
463 DEFINE_HELPERS(Mul, NUW) // CreateNUWMul
464 DEFINE_HELPERS(Shl, NSW) // CreateNSWShl
465 DEFINE_HELPERS(Shl, NUW) // CreateNUWShl
443
444 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \
445 static BinaryOperator *Create##NUWNSWEXACT##OPC(Value *V1, Value *V2, \
446 const Twine &Name = "") { \
447 return Create##NUWNSWEXACT(Instruction::OPC, V1, V2, Name); \
448 } \
449 static BinaryOperator *Create##NUWNSWEXACT##OPC( \
450 Value *V1, Value *V2, const Twine &Name, BasicBlock *BB) { \
451 return Create##NUWNSWEXACT(Instruction::OPC, V1, V2, Name, BB); \
452 } \
453 static BinaryOperator *Create##NUWNSWEXACT##OPC( \
454 Value *V1, Value *V2, const Twine &Name, Instruction *I) { \
455 return Create##NUWNSWEXACT(Instruction::OPC, V1, V2, Name, I); \
456 }
457
458 DEFINE_HELPERS(Add, NSW) // CreateNSWAdd
459 DEFINE_HELPERS(Add, NUW) // CreateNUWAdd
460 DEFINE_HELPERS(Sub, NSW) // CreateNSWSub
461 DEFINE_HELPERS(Sub, NUW) // CreateNUWSub
462 DEFINE_HELPERS(Mul, NSW) // CreateNSWMul
463 DEFINE_HELPERS(Mul, NUW) // CreateNUWMul
464 DEFINE_HELPERS(Shl, NSW) // CreateNSWShl
465 DEFINE_HELPERS(Shl, NUW) // CreateNUWShl
466466
467467 DEFINE_HELPERS(SDiv, Exact) // CreateExactSDiv
468468 DEFINE_HELPERS(UDiv, Exact) // CreateExactUDiv
16881688 static inline bool classof(const Value *V) {
16891689 return isa(V) && classof(cast(V));
16901690 }
1691
16911692 private:
1692
1693 template
1694 bool hasFnAttrImpl(AttrKind A) const {
1693 template bool hasFnAttrImpl(AttrKind A) const {
16951694 if (AttributeList.hasAttribute(AttributeSet::FunctionIndex, A))
16961695 return true;
16971696 if (const Function *F = getCalledFunction())
19231922 InsertElementInst(Value *Vec, Value *NewElt, Value *Idx,
19241923 const Twine &NameStr = "",
19251924 Instruction *InsertBefore = nullptr);
1926 InsertElementInst(Value *Vec, Value *NewElt, Value *Idx,
1927 const Twine &NameStr, BasicBlock *InsertAtEnd);
1925 InsertElementInst(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr,
1926 BasicBlock *InsertAtEnd);
1927
19281928 protected:
19291929 // Note: Instruction needs to be a friend here to call cloneImpl.
19301930 friend class Instruction;
20802080 const Twine &NameStr, BasicBlock *InsertAtEnd);
20812081
20822082 // allocate space for exactly one operand
2083 void *operator new(size_t s) {
2084 return User::operator new(s, 1);
2085 }
2083 void *operator new(size_t s) { return User::operator new(s, 1); }
2084
20862085 protected:
20872086 // Note: Instruction needs to be a friend here to call cloneImpl.
20882087 friend class Instruction;
21942193
21952194 /// Constructors - These two constructors are convenience methods because one
21962195 /// and two index insertvalue instructions are so common.
2197 InsertValueInst(Value *Agg, Value *Val,
2198 unsigned Idx, const Twine &NameStr = "",
2196 InsertValueInst(Value *Agg, Value *Val, unsigned Idx,
2197 const Twine &NameStr = "",
21992198 Instruction *InsertBefore = nullptr);
2200 InsertValueInst(Value *Agg, Value *Val, unsigned Idx,
2201 const Twine &NameStr, BasicBlock *InsertAtEnd);
2199 InsertValueInst(Value *Agg, Value *Val, unsigned Idx, const Twine &NameStr,
2200 BasicBlock *InsertAtEnd);
2201
22022202 protected:
22032203 // Note: Instruction needs to be a friend here to call cloneImpl.
22042204 friend class Instruction;
29292929 typedef CaseIteratorT ParentTy;
29302930
29312931 public:
2932
2933 CaseIt(const ParentTy& Src) : ParentTy(Src) {}
2932 CaseIt(const ParentTy &Src) : ParentTy(Src) {}
29342933 CaseIt(SwitchInst *SI, unsigned CaseNum) : ParentTy(SI, CaseNum) {}
29352934
29362935 /// Sets the new value for current case.
6060 static void destroySentinel(GlobalVariable*) {}
6161
6262 GlobalVariable *provideInitialHead() const { return createSentinel(); }
63 GlobalVariable *ensureHead(GlobalVariable*) const { return createSentinel(); }
64 static void noteHead(GlobalVariable*, GlobalVariable*) {}
63 GlobalVariable *ensureHead(GlobalVariable *) const {
64 return createSentinel();
65 }
66 static void noteHead(GlobalVariable *, GlobalVariable *) {}
67
6568 private:
6669 mutable ilist_node Sentinel;
6770 };
7578 static void destroySentinel(GlobalAlias*) {}
7679
7780 GlobalAlias *provideInitialHead() const { return createSentinel(); }
78 GlobalAlias *ensureHead(GlobalAlias*) const { return createSentinel(); }
79 static void noteHead(GlobalAlias*, GlobalAlias*) {}
81 GlobalAlias *ensureHead(GlobalAlias *) const { return createSentinel(); }
82 static void noteHead(GlobalAlias *, GlobalAlias *) {}
83
8084 private:
8185 mutable ilist_node Sentinel;
8286 };
2828
2929 namespace llvm {
3030 class ValueSymbolTable;
31
32 template class ilist_iterator;
33 template class iplist;
34 template struct ilist_traits;
31
32 template class ilist_iterator;
33 template class iplist;
34 template struct ilist_traits;
3535
3636 // ValueSubClass - The type of objects that I hold, e.g. Instruction.
3737 // ItemParentClass - The type of object that owns the list, e.g. BasicBlock.
437437 // Provide specializations of GraphTraits to be able to treat a type as a
438438 // graph of sub types.
439439
440
441 template <> struct GraphTraits*> {
440 template <> struct GraphTraits *> {
442441 typedef Type NodeType;
443442 typedef Type::subtype_iterator ChildIteratorType;
444443
5454 initializeDemandedBitsPass(*PassRegistry::getPassRegistry());
5555 }
5656
57
58 void DemandedBits::getAnalysisUsage(AnalysisUsage& AU) const {
57 void DemandedBits::getAnalysisUsage(AnalysisUsage &AU) const {
5958 AU.setPreservesCFG();
6059 AU.addRequired();
6160 AU.addRequired();
21142114 return false;
21152115 }
21162116
2117
2118 SDValue TargetLowering::
2119 PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
2117 SDValue TargetLowering::PerformDAGCombine(SDNode *N,
2118 DAGCombinerInfo &DCI) const {
21202119 // Default implementation: no optimization.
21212120 return SDValue();
21222121 }
12071207 return dice_iterator(DiceRef(DRI, this));
12081208 }
12091209
1210 ExportEntry::ExportEntry(ArrayRef T)
1211 : Trie(T), Malformed(false), Done(false) { }
1210 ExportEntry::ExportEntry(ArrayRef T)
1211 : Trie(T), Malformed(false), Done(false) {}
12121212
12131213 void ExportEntry::moveToFirst() {
12141214 pushNode(0);
12761276 return Stack.back().Start - Trie.begin();
12771277 }
12781278
1279 ExportEntry::NodeState::NodeState(const uint8_t *Ptr)
1280 : Start(Ptr), Current(Ptr), Flags(0), Address(0), Other(0),
1281 ImportName(nullptr), ChildCount(0), NextChildIndex(0),
1282 ParentStringLength(0), IsExportNode(false) {
1283 }
1279 ExportEntry::NodeState::NodeState(const uint8_t *Ptr)
1280 : Start(Ptr), Current(Ptr), Flags(0), Address(0), Other(0),
1281 ImportName(nullptr), ChildCount(0), NextChildIndex(0),
1282 ParentStringLength(0), IsExportNode(false) {}
12841283
12851284 void ExportEntry::pushNode(uint64_t offset) {
12861285 const uint8_t *Ptr = Trie.begin() + offset;
15581557 return rebaseTable(getDyldInfoRebaseOpcodes(), is64Bit());
15591558 }
15601559
1561
1562 MachOBindEntry::MachOBindEntry(ArrayRef Bytes, bool is64Bit,
1563 Kind BK)
1560 MachOBindEntry::MachOBindEntry(ArrayRef Bytes, bool is64Bit, Kind BK)
15641561 : Opcodes(Bytes), Ptr(Bytes.begin()), SegmentOffset(0), SegmentIndex(0),
15651562 Ordinal(0), Flags(0), Addend(0), RemainingLoopCount(0), AdvanceAmount(0),
15661563 BindType(0), PointerSize(is64Bit ? 8 : 4),
22052202 if (!DyldInfoLoadCmd)
22062203 return None;
22072204
2208 MachO::dyld_info_command DyldInfo
2209 = getStruct(this, DyldInfoLoadCmd);
2210 const uint8_t *Ptr = reinterpret_cast(
2211 getPtr(this, DyldInfo.rebase_off));
2205 MachO::dyld_info_command DyldInfo =
2206 getStruct(this, DyldInfoLoadCmd);
2207 const uint8_t *Ptr =
2208 reinterpret_cast(getPtr(this, DyldInfo.rebase_off));
22122209 return makeArrayRef(Ptr, DyldInfo.rebase_size);
22132210 }
22142211
22162213 if (!DyldInfoLoadCmd)
22172214 return None;
22182215
2219 MachO::dyld_info_command DyldInfo
2220 = getStruct(this, DyldInfoLoadCmd);
2221 const uint8_t *Ptr = reinterpret_cast(
2222 getPtr(this, DyldInfo.bind_off));
2216 MachO::dyld_info_command DyldInfo =
2217 getStruct(this, DyldInfoLoadCmd);
2218 const uint8_t *Ptr =
2219 reinterpret_cast(getPtr(this, DyldInfo.bind_off));
22232220 return makeArrayRef(Ptr, DyldInfo.bind_size);
22242221 }
22252222
22272224 if (!DyldInfoLoadCmd)
22282225 return None;
22292226
2230 MachO::dyld_info_command DyldInfo
2231 = getStruct(this, DyldInfoLoadCmd);
2232 const uint8_t *Ptr = reinterpret_cast(
2233 getPtr(this, DyldInfo.weak_bind_off));
2227 MachO::dyld_info_command DyldInfo =
2228 getStruct(this, DyldInfoLoadCmd);
2229 const uint8_t *Ptr =
2230 reinterpret_cast(getPtr(this, DyldInfo.weak_bind_off));
22342231 return makeArrayRef(Ptr, DyldInfo.weak_bind_size);
22352232 }
22362233
22382235 if (!DyldInfoLoadCmd)
22392236 return None;
22402237
2241 MachO::dyld_info_command DyldInfo
2242 = getStruct(this, DyldInfoLoadCmd);
2243 const uint8_t *Ptr = reinterpret_cast(
2244 getPtr(this, DyldInfo.lazy_bind_off));
2238 MachO::dyld_info_command DyldInfo =
2239 getStruct(this, DyldInfoLoadCmd);
2240 const uint8_t *Ptr =
2241 reinterpret_cast(getPtr(this, DyldInfo.lazy_bind_off));
22452242 return makeArrayRef(Ptr, DyldInfo.lazy_bind_size);
22462243 }
22472244
22492246 if (!DyldInfoLoadCmd)
22502247 return None;
22512248
2252 MachO::dyld_info_command DyldInfo
2253 = getStruct(this, DyldInfoLoadCmd);
2254 const uint8_t *Ptr = reinterpret_cast(
2255 getPtr(this, DyldInfo.export_off));
2249 MachO::dyld_info_command DyldInfo =
2250 getStruct(this, DyldInfoLoadCmd);
2251 const uint8_t *Ptr =
2252 reinterpret_cast(getPtr(this, DyldInfo.export_off));
22562253 return makeArrayRef(Ptr, DyldInfo.export_size);
22572254 }
22582255
229229 });
230230 }
231231
232
233 void ARMTargetMachine::anchor() { }
232 void ARMTargetMachine::anchor() {}
234233
235234 ARMTargetMachine::ARMTargetMachine(const Target &T, const Triple &TT,
236235 StringRef CPU, StringRef FS,
244243 "support ARM mode execution!");
245244 }
246245
247 void ARMLETargetMachine::anchor() { }
246 void ARMLETargetMachine::anchor() {}
248247
249248 ARMLETargetMachine::ARMLETargetMachine(const Target &T, const Triple &TT,
250249 StringRef CPU, StringRef FS,
253252 CodeGenOpt::Level OL)
254253 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
255254
256 void ARMBETargetMachine::anchor() { }
255 void ARMBETargetMachine::anchor() {}
257256
258257 ARMBETargetMachine::ARMBETargetMachine(const Target &T, const Triple &TT,
259258 StringRef CPU, StringRef FS,
262261 CodeGenOpt::Level OL)
263262 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
264263
265 void ThumbTargetMachine::anchor() { }
264 void ThumbTargetMachine::anchor() {}
266265
267266 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Triple &TT,
268267 StringRef CPU, StringRef FS,
273272 initAsmInfo();
274273 }
275274
276 void ThumbLETargetMachine::anchor() { }
275 void ThumbLETargetMachine::anchor() {}
277276
278277 ThumbLETargetMachine::ThumbLETargetMachine(const Target &T, const Triple &TT,
279278 StringRef CPU, StringRef FS,
282281 CodeGenOpt::Level OL)
283282 : ThumbTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
284283
285 void ThumbBETargetMachine::anchor() { }
284 void ThumbBETargetMachine::anchor() {}
286285
287286 ThumbBETargetMachine::ThumbBETargetMachine(const Target &T, const Triple &TT,
288287 StringRef CPU, StringRef FS,
6464 #define DEBUG_TYPE "asmprinter"
6565
6666 namespace {
67 class PPCAsmPrinter : public AsmPrinter {
68 protected:
69 MapVector TOC;
70 const PPCSubtarget *Subtarget;
71 StackMaps SM;
72 public:
73 explicit PPCAsmPrinter(TargetMachine &TM,
74 std::unique_ptr Streamer)
75 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
76
77 const char *getPassName() const override {
78 return "PowerPC Assembly Printer";
79 }
67 class PPCAsmPrinter : public AsmPrinter {
68 protected:
69 MapVector TOC;
70 const PPCSubtarget *Subtarget;
71 StackMaps SM;
72
73 public:
74 explicit PPCAsmPrinter(TargetMachine &TM,
75 std::unique_ptr Streamer)
76 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
77
78 const char *getPassName() const override {
79 return "PowerPC Assembly Printer";
80 }
8081
8182 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
8283
199200 !GV->isStrongDefinitionForLinker()) {
200201 if (!GV->hasHiddenVisibility()) {
201202 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
202 MachineModuleInfoImpl::StubValueTy &StubSym =
203 MMI->getObjFileInfo()
204 .getGVStubEntry(SymToPrint);
203 MachineModuleInfoImpl::StubValueTy &StubSym =
204 MMI->getObjFileInfo().getGVStubEntry(
205 SymToPrint);
205206 if (!StubSym.getPointer())
206207 StubSym = MachineModuleInfoImpl::
207208 StubValueTy(getSymbol(GV), !GV->hasInternalLinkage());
208209 } else if (GV->isDeclaration() || GV->hasCommonLinkage() ||
209210 GV->hasAvailableExternallyLinkage()) {
210211 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
211
212 MachineModuleInfoImpl::StubValueTy &StubSym =
213 MMI->getObjFileInfo().
214 getHiddenGVStubEntry(SymToPrint);
212
213 MachineModuleInfoImpl::StubValueTy &StubSym =
214 MMI->getObjFileInfo().getHiddenGVStubEntry(
215 SymToPrint);
215216 if (!StubSym.getPointer())
216217 StubSym = MachineModuleInfoImpl::
217218 StubValueTy(getSymbol(GV), !GV->hasInternalLinkage());
538539 MCSymbol *PICBase = MF->getPICBaseSymbol();
539540
540541 // Emit the 'bl'.
541 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
542 // FIXME: We would like an efficient form for this, so we don't have to do
543 // a lot of extra uniquing.
544 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
545
542 EmitToStreamer(*OutStreamer,
543 MCInstBuilder(PPC::BL)
544 // FIXME: We would like an efficient form for this, so we
545 // don't have to do a lot of extra uniquing.
546 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
547
546548 // Emit the label.
547549 OutStreamer->EmitLabel(PICBase);
548550 return;
839841 return;
840842 }
841843 case PPC::PPC32GOT: {
842 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
843 const MCExpr *SymGotTlsL =
844 MCSymbolRefExpr::create(GOTSymbol, MCSymbolRefExpr::VK_PPC_LO,
845 OutContext);
846 const MCExpr *SymGotTlsHA =
847 MCSymbolRefExpr::create(GOTSymbol, MCSymbolRefExpr::VK_PPC_HA,
848 OutContext);
844 MCSymbol *GOTSymbol =
845 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
846 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
847 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
848 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
849 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
849850 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
850851 .addReg(MI->getOperand(0).getReg())
851852 .addExpr(SymGotTlsL));
12921293
12931294 // Prime text sections so they are adjacent. This reduces the likelihood a
12941295 // large data or debug section causes a branch to exceed 16M limit.
1295 const TargetLoweringObjectFileMachO &TLOFMacho =
1296 static_cast(getObjFileLowering());
1296 const TargetLoweringObjectFileMachO &TLOFMacho =
1297 static_cast(getObjFileLowering());
12971298 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
12981299 if (TM.getRelocationModel() == Reloc::PIC_) {
12991300 OutStreamer->SwitchSection(
13371338 S.EmitInstruction(Inst, *STI);
13381339 };
13391340
1340 const TargetLoweringObjectFileMachO &TLOFMacho =
1341 static_cast(getObjFileLowering());
1341 const TargetLoweringObjectFileMachO &TLOFMacho =
1342 static_cast(getObjFileLowering());
13421343
13431344 // .lazy_symbol_pointer
13441345 MCSection *LSPSection = TLOFMacho.getLazySymbolPointerSection();
14711472 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
14721473
14731474 // Darwin/PPC always uses mach-o.
1474 const TargetLoweringObjectFileMachO &TLOFMacho =
1475 static_cast(getObjFileLowering());
1475 const TargetLoweringObjectFileMachO &TLOFMacho =
1476 static_cast(getObjFileLowering());
14761477 MachineModuleInfoMachO &MMIMacho =
1477 MMI->getObjFileInfo();
1478
1478 MMI->getObjFileInfo();
1479
14791480 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetFnStubList();
14801481 if (!Stubs.empty())
14811482 EmitFunctionStubs(Stubs);
545545 if (!ExitCount->getType()->isPointerTy() &&
546546 ExitCount->getType() != CountType)
547547 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType);
548 ExitCount = SE->getAddExpr(ExitCount,
549 SE->getConstant(CountType, 1));
550 Value *ECValue = SCEVE.expandCodeFor(ExitCount, CountType,
551 Preheader->getTerminator());
548 ExitCount = SE->getAddExpr(ExitCount, SE->getConstant(CountType, 1));
549 Value *ECValue =
550 SCEVE.expandCodeFor(ExitCount, CountType, Preheader->getTerminator());
552551
553552 IRBuilder<> CountBuilder(Preheader->getTerminator());
554553 Module *M = Preheader->getParent()->getParent();
106106 AddPromotedToType (ISD::SINT_TO_FP, MVT::i1,
107107 isPPC64 ? MVT::i64 : MVT::i32);
108108 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote);
109 AddPromotedToType (ISD::UINT_TO_FP, MVT::i1,
110 isPPC64 ? MVT::i64 : MVT::i32);
109 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1,
110 isPPC64 ? MVT::i64 : MVT::i32);
111111 } else {
112112 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Custom);
113113 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom);
402402 // will selectively turn on ones that can be effectively codegen'd.
403403 for (MVT VT : MVT::vector_valuetypes()) {
404404 // add/sub are legal for all supported vector VT's.
405 setOperationAction(ISD::ADD , VT, Legal);
406 setOperationAction(ISD::SUB , VT, Legal);
407
405 setOperationAction(ISD::ADD, VT, Legal);
406 setOperationAction(ISD::SUB, VT, Legal);
407
408408 // Vector instructions introduced in P8
409409 if (Subtarget.hasP8Altivec() && (VT.SimpleTy != MVT::v1i128)) {
410410 setOperationAction(ISD::CTPOP, VT, Legal);
518518 setOperationAction(ISD::FSQRT, MVT::v4f32, Legal);
519519 }
520520
521
522 if (Subtarget.hasP8Altivec())
521 if (Subtarget.hasP8Altivec())
523522 setOperationAction(ISD::MUL, MVT::v4i32, Legal);
524523 else
525524 setOperationAction(ISD::MUL, MVT::v4i32, Custom);
58435842 false, false, 0);
58445843 }
58455844
5846
5847
5848 SDValue
5849 PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const {
5845 SDValue PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG &DAG) const {
58505846 MachineFunction &MF = DAG.getMachineFunction();
58515847 bool isPPC64 = Subtarget.isPPC64();
58525848 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(MF.getDataLayout());
63136309 Value = DAG.getNode(PPCISD::QBFLT, dl, MVT::v4f64, Value);
63146310
63156311 SDValue FPHalfs = DAG.getConstantFP(0.5, dl, MVT::f64);
6316 FPHalfs = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4f64,
6317 FPHalfs, FPHalfs, FPHalfs, FPHalfs);
6318
6312 FPHalfs = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4f64, FPHalfs, FPHalfs,
6313 FPHalfs, FPHalfs);
6314
63196315 Value = DAG.getNode(ISD::FMA, dl, MVT::v4f64, Value, FPHalfs, FPHalfs);
63206316
63216317 if (Op.getValueType() != MVT::v4f64)
73497345 case Intrinsic::ppc_altivec_vcmpequw_p: CompareOpc = 134; isDot = 1; break;
73507346 case Intrinsic::ppc_altivec_vcmpequd_p:
73517347 if (Subtarget.hasP8Altivec()) {
7352 CompareOpc = 199;
7353 isDot = 1;
7354 }
7355 else
7348 CompareOpc = 199;
7349 isDot = 1;
7350 } else
73567351 return false;
73577352
73587353 break;
73637358 case Intrinsic::ppc_altivec_vcmpgtsw_p: CompareOpc = 902; isDot = 1; break;
73647359 case Intrinsic::ppc_altivec_vcmpgtsd_p:
73657360 if (Subtarget.hasP8Altivec()) {
7366 CompareOpc = 967;
7367 isDot = 1;
7368 }
7369 else
7361 CompareOpc = 967;
7362 isDot = 1;
7363 } else
73707364 return false;
73717365
73727366 break;
73757369 case Intrinsic::ppc_altivec_vcmpgtuw_p: CompareOpc = 646; isDot = 1; break;
73767370 case Intrinsic::ppc_altivec_vcmpgtud_p:
73777371 if (Subtarget.hasP8Altivec()) {
7378 CompareOpc = 711;
7379 isDot = 1;
7380 }
7381 else
7372 CompareOpc = 711;
7373 isDot = 1;
7374 } else
73827375 return false;
73837376
73847377 break;
73917384 case Intrinsic::ppc_altivec_vcmpequw: CompareOpc = 134; isDot = 0; break;
73927385 case Intrinsic::ppc_altivec_vcmpequd:
73937386 if (Subtarget.hasP8Altivec()) {
7394 CompareOpc = 199;
7395 isDot = 0;
7396 }
7397 else
7387 CompareOpc = 199;
7388 isDot = 0;
7389 } else
73987390 return false;
73997391
74007392 break;
74057397 case Intrinsic::ppc_altivec_vcmpgtsw: CompareOpc = 902; isDot = 0; break;
74067398 case Intrinsic::ppc_altivec_vcmpgtsd:
74077399 if (Subtarget.hasP8Altivec()) {
7408 CompareOpc = 967;
7409 isDot = 0;
7410 }
7411 else
7400 CompareOpc = 967;
7401 isDot = 0;
7402 } else
74127403 return false;
74137404
74147405 break;
74177408 case Intrinsic::ppc_altivec_vcmpgtuw: CompareOpc = 646; isDot = 0; break;
74187409 case Intrinsic::ppc_altivec_vcmpgtud:
74197410 if (Subtarget.hasP8Altivec()) {
7420 CompareOpc = 711;
7421 isDot = 0;
7422 }
7423 else
7411 CompareOpc = 711;
7412 isDot = 0;
7413 } else
74247414 return false;
74257415
74267416 break;
78267816 SDValue Idx = DAG.getConstant(i, dl, BasePtr.getValueType());
78277817 Idx = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, Idx);
78287818
7829 Stores.push_back(DAG.getTruncStore(StoreChain, dl, Loads[i], Idx,
7830 SN->getPointerInfo().getWithOffset(i),
7831 MVT::i8 /* memory type */,
7832 SN->isNonTemporal(), SN->isVolatile(),
7833 1 /* alignment */, SN->getAAInfo()));
7819 Stores.push_back(DAG.getTruncStore(
7820 StoreChain, dl, Loads[i], Idx, SN->getPointerInfo().getWithOffset(i),
7821 MVT::i8 /* memory type */, SN->isNonTemporal(), SN->isVolatile(),
7822 1 /* alignment */, SN->getAAInfo()));
78347823 }
78357824
78367825 StoreChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
92249213 int64_t Offset1 = 0, Offset2 = 0;
92259214 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG);
92269215 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG);
9227 if (Base1 == Base2 && Offset1 == (Offset2 + Dist*Bytes))
9228 return true;
9229
9216 if (Base1 == Base2 && Offset1 == (Offset2 + Dist * Bytes))
9217 return true;
9218
92309219 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
92319220 const GlobalValue *GV1 = nullptr;
92329221 const GlobalValue *GV2 = nullptr;
99599948 "Invalid extension type");
99609949 EVT ShiftAmountTy = getShiftAmountTy(N->getValueType(0), DAG.getDataLayout());
99619950 SDValue ShiftCst =
9962 DAG.getConstant(N->getValueSizeInBits(0) - PromBits, dl, ShiftAmountTy);
9963 return DAG.getNode(ISD::SRA, dl, N->getValueType(0),
9964 DAG.getNode(ISD::SHL, dl, N->getValueType(0),
9965 N->getOperand(0), ShiftCst), ShiftCst);
9951 DAG.getConstant(N->getValueSizeInBits(0) - PromBits, dl, ShiftAmountTy);
9952 return DAG.getNode(
9953 ISD::SRA, dl, N->getValueType(0),
9954 DAG.getNode(ISD::SHL, dl, N->getValueType(0), N->getOperand(0), ShiftCst),
9955 ShiftCst);
99669956 }
99679957
99689958 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
458458 // We need to store the CR in the low 4-bits of the saved value. First, issue
459459 // an MFOCRF to save all of the CRBits and, if needed, kill the SrcReg.
460460 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)
461 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
462
461 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
462
463463 // If the saved register wasn't CR0, shift the bits left so that they are in
464464 // CR0's slot.
465465 if (SrcReg != PPC::CR0) {
548548 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
549549
550550 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)
551 .addReg(getCRFromCRBit(SrcReg));
552
551 .addReg(getCRFromCRBit(SrcReg));
552
553553 // If the saved register wasn't CR0LT, shift the bits left so that the bit to
554554 // store is the first one. Mask all but that bit.
555555 unsigned Reg1 = Reg;
601601 unsigned ShiftBits = getEncodingValue(DestReg);
602602 // rlwimi r11, r10, 32-ShiftBits, ..., ...
603603 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWIMI8 : PPC::RLWIMI), RegO)
604 .addReg(RegO, RegState::Kill).addReg(Reg, RegState::Kill)
605 .addImm(ShiftBits ? 32-ShiftBits : 0)
606 .addImm(ShiftBits).addImm(ShiftBits);
607
604 .addReg(RegO, RegState::Kill)
605 .addReg(Reg, RegState::Kill)
606 .addImm(ShiftBits ? 32 - ShiftBits : 0)
607 .addImm(ShiftBits)
608 .addImm(ShiftBits);
609
608610 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF),
609611 getCRFromCRBit(DestReg))
610612 .addReg(RegO, RegState::Kill)
633635 unsigned SrcReg = MI.getOperand(0).getReg();
634636
635637 BuildMI(MBB, II, dl, TII.get(PPC::MFVRSAVEv), Reg)
636 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
637
638 addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::STW))
639 .addReg(Reg, RegState::Kill),
640 FrameIndex);
638 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
639
640 addFrameReference(
641 BuildMI(MBB, II, dl, TII.get(PPC::STW)).addReg(Reg, RegState::Kill),
642 FrameIndex);
641643
642644 // Discard the pseudo instruction.
643645 MBB.erase(II);
122122 }
123123
124124 if (OL != CodeGenOpt::None) {
125 if (!FullFS.empty())
125 if (!FullFS.empty())
126126 FullFS = "+invariant-function-descriptors," + FullFS;
127127 else
128128 FullFS = "+invariant-function-descriptors";
359359 char &llvm::PPCVSXFMAMutateID = PPCVSXFMAMutate::ID;
360360
361361 char PPCVSXFMAMutate::ID = 0;
362 FunctionPass*
363 llvm::createPPCVSXFMAMutatePass() { return new PPCVSXFMAMutate(); }
364
365
362 FunctionPass *llvm::createPPCVSXFMAMutatePass() {
363 return new PPCVSXFMAMutate();
364 }
22512251
22522252 // Append default arguments to "ins[bwld]"
22532253 if (Name.startswith("ins") && Operands.size() == 1 &&
2254 (Name == "insb" || Name == "insw" || Name == "insl" ||
2255 Name == "insd" )) {
2256 AddDefaultSrcDestOperands(Operands,
2254 (Name == "insb" || Name == "insw" || Name == "insl" || Name == "insd")) {
2255 AddDefaultSrcDestOperands(Operands,
22572256 X86Operand::CreateReg(X86::DX, NameLoc, NameLoc),
22582257 DefaultMemDIOperand(NameLoc));
22592258 }
20932093
20942094 #include "X86GenCallingConv.inc"
20952095
2096 bool
2097 X86TargetLowering::CanLowerReturn(CallingConv::ID CallConv,
2098 MachineFunction &MF, bool isVarArg,
2099 const SmallVectorImpl &Outs,
2100 LLVMContext &Context) const {
2096 bool X86TargetLowering::CanLowerReturn(
2097 CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg,
2098 const SmallVectorImpl &Outs, LLVMContext &Context) const {
21012099 SmallVector RVLocs;
21022100 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
21032101 return CCInfo.CheckReturn(Outs, RetCC_X86);
25302528 return makeArrayRef(std::begin(XMMArgRegs64Bit), std::end(XMMArgRegs64Bit));
25312529 }
25322530
2533 SDValue
2534 X86TargetLowering::LowerFormalArguments(SDValue Chain,
2535 CallingConv::ID CallConv,
2536 bool isVarArg,
2537 const SmallVectorImpl &Ins,
2538 SDLoc dl,
2539 SelectionDAG &DAG,
2540 SmallVectorImpl &InVals)
2541 const {
2531 SDValue X86TargetLowering::LowerFormalArguments(
2532 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
2533 const SmallVectorImpl &Ins, SDLoc dl, SelectionDAG &DAG,
2534 SmallVectorImpl &InVals) const {
25422535 MachineFunction &MF = DAG.getMachineFunction();
25432536 X86MachineFunctionInfo *FuncInfo = MF.getInfo();
25442537 const TargetFrameLowering &TFI = *Subtarget->getFrameLowering();
35493542
35503543 /// Check whether the call is eligible for tail call optimization. Targets
35513544 /// that want to do tail call optimization should implement this function.
3552 bool
3553 X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
3554 CallingConv::ID CalleeCC,
3555 bool isVarArg,
3556 bool isCalleeStructRet,
3557 bool isCallerStructRet,
3558 Type *RetTy,
3559 const SmallVectorImpl &Outs,
3560 const SmallVectorImpl &OutVals,
3561 const SmallVectorImpl &Ins,
3562 SelectionDAG &DAG) const {
3545 bool X86TargetLowering::IsEligibleForTailCallOptimization(
3546 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
3547 bool isCalleeStructRet, bool isCallerStructRet, Type *RetTy,
3548 const SmallVectorImpl &Outs,
3549 const SmallVectorImpl &OutVals,
3550 const SmallVectorImpl &Ins, SelectionDAG &DAG) const {
35633551 if (!IsTailCallConvention(CalleeCC) && !IsCCallConvention(CalleeCC))
35643552 return false;
35653553
2217922167
2218022168 // See if we can recurse into the operand to combine more things.
2218122169 switch (Op.getOpcode()) {
22182 case X86ISD::PSHUFB:
22183 HasPSHUFB = true;
22184 case X86ISD::PSHUFD:
22185 case X86ISD::PSHUFHW:
22186 case X86ISD::PSHUFLW:
22187 if (Op.getOperand(0).hasOneUse() &&
22188 combineX86ShufflesRecursively(Op.getOperand(0), Root, Mask, Depth + 1,
22189 HasPSHUFB, DAG, DCI, Subtarget))
22190 return true;
22191 break;
22192
22193 case X86ISD::UNPCKL:
22194 case X86ISD::UNPCKH:
22195 assert(Op.getOperand(0) == Op.getOperand(1) && "We only combine unary shuffles!");
22196 // We can't check for single use, we have to check that this shuffle is the only user.
22197 if (Op->isOnlyUserOf(Op.getOperand(0).getNode()) &&
22198 combineX86ShufflesRecursively(Op.getOperand(0), Root, Mask, Depth + 1,
22199 HasPSHUFB, DAG, DCI, Subtarget))
22200 return true;
22201 break;
22170 case X86ISD::PSHUFB:
22171 HasPSHUFB = true;
22172 case X86ISD::PSHUFD:
22173 case X86ISD::PSHUFHW:
22174 case X86ISD::PSHUFLW:
22175 if (Op.getOperand(0).hasOneUse() &&
22176 combineX86ShufflesRecursively(Op.getOperand(0), Root, Mask, Depth + 1,
22177 HasPSHUFB, DAG, DCI, Subtarget))
22178 return true;
22179 break;
22180
22181 case X86ISD::UNPCKL:
22182 case X86ISD::UNPCKH:
22183 assert(Op.getOperand(0) == Op.getOperand(1) &&
22184 "We only combine unary shuffles!");
22185 // We can't check for single use, we have to check that this shuffle is the
22186 // only user.
22187 if (Op->isOnlyUserOf(Op.getOperand(0).getNode()) &&
22188 combineX86ShufflesRecursively(Op.getOperand(0), Root, Mask, Depth + 1,
22189 HasPSHUFB, DAG, DCI, Subtarget))
22190 return true;
22191 break;
2220222192 }
2220322193
2220422194 // Minor canonicalization of the accumulated shuffle mask to make it easier
537537 return Modified;
538538 }
539539
540 FunctionPass *llvm::createFloat2IntPass() {
541 return new Float2Int();
542 }
543
540 FunctionPass *llvm::createFloat2IntPass() { return new Float2Int(); }