llvm.org GIT mirror llvm / d474181
ArrayRef-ize the Feature and Processor tables for SubtargetFeatures. This removes arguments passed everywhere and allows the use of standard iteration over lists. Should be no functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208127 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 6 years ago
5 changed file(s) with 73 addition(s) and 98 deletion(s). Raw diff Collapse all Expand all
2727 ///
2828 class MCSubtargetInfo {
2929 std::string TargetTriple; // Target triple
30 const SubtargetFeatureKV *ProcFeatures; // Processor feature list
31 const SubtargetFeatureKV *ProcDesc; // Processor descriptions
30 ArrayRef ProcFeatures; // Processor feature list
31 ArrayRef ProcDesc; // Processor descriptions
3232
3333 // Scheduler machine model
3434 const SubtargetInfoKV *ProcSchedModels;
4040 const InstrStage *Stages; // Instruction itinerary stages
4141 const unsigned *OperandCycles; // Itinerary operand cycles
4242 const unsigned *ForwardingPaths; // Forwarding paths
43 unsigned NumFeatures; // Number of processor features
44 unsigned NumProcs; // Number of processors
4543 uint64_t FeatureBits; // Feature bits for current CPU + FS
4644
4745 public:
4846 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
49 const SubtargetFeatureKV *PF,
50 const SubtargetFeatureKV *PD,
47 ArrayRef PF,
48 ArrayRef PD,
5149 const SubtargetInfoKV *ProcSched,
5250 const MCWriteProcResEntry *WPR,
5351 const MCWriteLatencyEntry *WL,
5452 const MCReadAdvanceEntry *RA,
5553 const InstrStage *IS,
56 const unsigned *OC, const unsigned *FP,
57 unsigned NF, unsigned NP);
54 const unsigned *OC, const unsigned *FP);
5855
5956 /// getTargetTriple - Return the target triple string.
6057 StringRef getTargetTriple() const {
1717 #ifndef LLVM_MC_SUBTARGETFEATURE_H
1818 #define LLVM_MC_SUBTARGETFEATURE_H
1919
20 #include "llvm/ADT/ArrayRef.h"
2021 #include "llvm/ADT/Triple.h"
2122 #include "llvm/Support/DataTypes.h"
22 #include
2323
2424 namespace llvm {
2525 class raw_ostream;
8282 /// ToggleFeature - Toggle a feature and returns the newly updated feature
8383 /// bits.
8484 uint64_t ToggleFeature(uint64_t Bits, const StringRef String,
85 const SubtargetFeatureKV *FeatureTable,
86 size_t FeatureTableSize);
85 ArrayRef FeatureTable);
8786
8887 /// Get feature bits of a CPU.
8988 uint64_t getFeatureBits(const StringRef CPU,
90 const SubtargetFeatureKV *CPUTable,
91 size_t CPUTableSize,
92 const SubtargetFeatureKV *FeatureTable,
93 size_t FeatureTableSize);
89 ArrayRef CPUTable,
90 ArrayRef FeatureTable);
9491
9592 /// Print feature string.
9693 void print(raw_ostream &OS) const;
2323 void
2424 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
2525 SubtargetFeatures Features(FS);
26 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
27 ProcFeatures, NumFeatures);
28
26 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
2927 InitCPUSchedModel(CPU);
3028 }
3129
3937
4038 void
4139 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
42 const SubtargetFeatureKV *PF,
43 const SubtargetFeatureKV *PD,
40 ArrayRef PF,
41 ArrayRef PD,
4442 const SubtargetInfoKV *ProcSched,
4543 const MCWriteProcResEntry *WPR,
4644 const MCWriteLatencyEntry *WL,
4745 const MCReadAdvanceEntry *RA,
4846 const InstrStage *IS,
4947 const unsigned *OC,
50 const unsigned *FP,
51 unsigned NF, unsigned NP) {
48 const unsigned *FP) {
5249 TargetTriple = TT;
5350 ProcFeatures = PF;
5451 ProcDesc = PD;
6057 Stages = IS;
6158 OperandCycles = OC;
6259 ForwardingPaths = FP;
63 NumFeatures = NF;
64 NumProcs = NP;
6560
6661 InitMCProcessorInfo(CPU, FS);
6762 }
7772 /// bits. This version will also change all implied bits.
7873 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
7974 SubtargetFeatures Features;
80 FeatureBits = Features.ToggleFeature(FeatureBits, FS,
81 ProcFeatures, NumFeatures);
75 FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures);
8276 return FeatureBits;
8377 }
8478
8781 MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
8882 assert(ProcSchedModels && "Processor machine model not available!");
8983
84 unsigned NumProcs = ProcDesc.size();
9085 #ifndef NDEBUG
9186 for (size_t i = 1; i < NumProcs; i++) {
9287 assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 &&
104104 }
105105
106106 /// Find KV in array using binary search.
107 static const SubtargetFeatureKV *Find(StringRef S, const SubtargetFeatureKV *A,
108 size_t L) {
109 // Determine the end of the array
110 const SubtargetFeatureKV *Hi = A + L;
107 static const SubtargetFeatureKV *Find(StringRef S,
108 ArrayRef A) {
111109 // Binary search the array
112 const SubtargetFeatureKV *F = std::lower_bound(A, Hi, S);
110 auto F = std::lower_bound(A.begin(), A.end(), S);
113111 // If not found then return NULL
114 if (F == Hi || StringRef(F->Key) != S) return nullptr;
112 if (F == A.end() || StringRef(F->Key) != S) return nullptr;
115113 // Return the found array item
116114 return F;
117115 }
118116
119117 /// getLongestEntryLength - Return the length of the longest entry in the table.
120118 ///
121 static size_t getLongestEntryLength(const SubtargetFeatureKV *Table,
122 size_t Size) {
119 static size_t getLongestEntryLength(ArrayRef Table) {
123120 size_t MaxLen = 0;
124 for (size_t i = 0; i < Size; i++)
125 MaxLen = std::max(MaxLen, std::strlen(Table[i].Key));
121 for (auto &I : Table)
122 MaxLen = std::max(MaxLen, std::strlen(I.Key));
126123 return MaxLen;
127124 }
128125
129126 /// Display help for feature choices.
130127 ///
131 static void Help(const SubtargetFeatureKV *CPUTable, size_t CPUTableSize,
132 const SubtargetFeatureKV *FeatTable,
133 size_t FeatTableSize) {
128 static void Help(ArrayRef CPUTable,
129 ArrayRef FeatTable) {
134130 // Determine the length of the longest CPU and Feature entries.
135 unsigned MaxCPULen = getLongestEntryLength(CPUTable, CPUTableSize);
136 unsigned MaxFeatLen = getLongestEntryLength(FeatTable, FeatTableSize);
131 unsigned MaxCPULen = getLongestEntryLength(CPUTable);
132 unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
137133
138134 // Print the CPU table.
139135 errs() << "Available CPUs for this target:\n\n";
140 for (size_t i = 0; i != CPUTableSize; i++)
141 errs() << format(" %-*s - %s.\n",
142 MaxCPULen, CPUTable[i].Key, CPUTable[i].Desc);
136 for (auto &CPU : CPUTable)
137 errs() << format(" %-*s - %s.\n", MaxCPULen, CPU.Key, CPU.Desc);
143138 errs() << '\n';
144139
145140 // Print the Feature table.
146141 errs() << "Available features for this target:\n\n";
147 for (size_t i = 0; i != FeatTableSize; i++)
148 errs() << format(" %-*s - %s.\n",
149 MaxFeatLen, FeatTable[i].Key, FeatTable[i].Desc);
142 for (auto &Feature : FeatTable)
143 errs() << format(" %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc);
150144 errs() << '\n';
151145
152146 errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
172166 ///
173167 static
174168 void SetImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
175 const SubtargetFeatureKV *FeatureTable,
176 size_t FeatureTableSize) {
177 for (size_t i = 0; i < FeatureTableSize; ++i) {
178 const SubtargetFeatureKV &FE = FeatureTable[i];
179
169 ArrayRef FeatureTable) {
170 for (auto &FE : FeatureTable) {
180171 if (FeatureEntry->Value == FE.Value) continue;
181172
182173 if (FeatureEntry->Implies & FE.Value) {
183174 Bits |= FE.Value;
184 SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
175 SetImpliedBits(Bits, &FE, FeatureTable);
185176 }
186177 }
187178 }
191182 ///
192183 static
193184 void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
194 const SubtargetFeatureKV *FeatureTable,
195 size_t FeatureTableSize) {
196 for (size_t i = 0; i < FeatureTableSize; ++i) {
197 const SubtargetFeatureKV &FE = FeatureTable[i];
198
185 ArrayRef FeatureTable) {
186 for (auto &FE : FeatureTable) {
199187 if (FeatureEntry->Value == FE.Value) continue;
200188
201189 if (FE.Implies & FeatureEntry->Value) {
202190 Bits &= ~FE.Value;
203 ClearImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
191 ClearImpliedBits(Bits, &FE, FeatureTable);
204192 }
205193 }
206194 }
207195
208196 /// ToggleFeature - Toggle a feature and returns the newly updated feature
209197 /// bits.
210 uint64_t
211 SubtargetFeatures::ToggleFeature(uint64_t Bits, const StringRef Feature,
212 const SubtargetFeatureKV *FeatureTable,
213 size_t FeatureTableSize) {
198 uint64_t SubtargetFeatures::ToggleFeature(
199 uint64_t Bits, const StringRef Feature,
200 ArrayRef FeatureTable) {
201
214202 // Find feature in table.
215203 const SubtargetFeatureKV *FeatureEntry =
216 Find(StripFlag(Feature), FeatureTable, FeatureTableSize);
204 Find(StripFlag(Feature), FeatureTable);
217205 // If there is a match
218206 if (FeatureEntry) {
219207 if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) {
220208 Bits &= ~FeatureEntry->Value;
221209
222210 // For each feature that implies this, clear it.
223 ClearImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
211 ClearImpliedBits(Bits, FeatureEntry, FeatureTable);
224212 } else {
225213 Bits |= FeatureEntry->Value;
226214
227215 // For each feature that this implies, set it.
228 SetImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
216 SetImpliedBits(Bits, FeatureEntry, FeatureTable);
229217 }
230218 } else {
231219 errs() << "'" << Feature
239227
240228 /// getFeatureBits - Get feature bits a CPU.
241229 ///
242 uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU,
243 const SubtargetFeatureKV *CPUTable,
244 size_t CPUTableSize,
245 const SubtargetFeatureKV *FeatureTable,
246 size_t FeatureTableSize) {
247 if (!FeatureTableSize || !CPUTableSize)
230 uint64_t
231 SubtargetFeatures::getFeatureBits(const StringRef CPU,
232 ArrayRef CPUTable,
233 ArrayRef FeatureTable) {
234
235 if (CPUTable.empty() || FeatureTable.empty())
248236 return 0;
249237
250238 #ifndef NDEBUG
251 for (size_t i = 1; i < CPUTableSize; i++) {
239 for (size_t i = 1, e = CPUTable.size(); i != e; ++i) {
252240 assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 &&
253241 "CPU table is not sorted");
254242 }
255 for (size_t i = 1; i < FeatureTableSize; i++) {
243 for (size_t i = 1, e = FeatureTable.size(); i != e; ++i) {
256244 assert(strcmp(FeatureTable[i - 1].Key, FeatureTable[i].Key) < 0 &&
257245 "CPU features table is not sorted");
258246 }
261249
262250 // Check if help is needed
263251 if (CPU == "help")
264 Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
252 Help(CPUTable, FeatureTable);
265253
266254 // Find CPU entry if CPU name is specified.
267255 else if (!CPU.empty()) {
268 const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
256 const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable);
257
269258 // If there is a match
270259 if (CPUEntry) {
271260 // Set base feature bits
272261 Bits = CPUEntry->Value;
273262
274263 // Set the feature implied by this CPU feature, if any.
275 for (size_t i = 0; i < FeatureTableSize; ++i) {
276 const SubtargetFeatureKV &FE = FeatureTable[i];
264 for (auto &FE : FeatureTable) {
277265 if (CPUEntry->Value & FE.Value)
278 SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
266 SetImpliedBits(Bits, &FE, FeatureTable);
279267 }
280268 } else {
281269 errs() << "'" << CPU
285273 }
286274
287275 // Iterate through each feature
288 for (size_t i = 0, E = Features.size(); i < E; i++) {
289 const StringRef Feature = Features[i];
290
276 for (auto &Feature : Features) {
291277 // Check for help
292278 if (Feature == "+help")
293 Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
279 Help(CPUTable, FeatureTable);
294280
295281 // Find feature in table.
296282 const SubtargetFeatureKV *FeatureEntry =
297 Find(StripFlag(Feature), FeatureTable, FeatureTableSize);
283 Find(StripFlag(Feature), FeatureTable);
298284 // If there is a match
299285 if (FeatureEntry) {
300286 // Enable/disable feature in bits
302288 Bits |= FeatureEntry->Value;
303289
304290 // For each feature that this implies, set it.
305 SetImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
291 SetImpliedBits(Bits, FeatureEntry, FeatureTable);
306292 } else {
307293 Bits &= ~FeatureEntry->Value;
308294
309295 // For each feature that implies this, clear it.
310 ClearImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
296 ClearImpliedBits(Bits, FeatureEntry, FeatureTable);
311297 }
312298 } else {
313299 errs() << "'" << Feature
14531453 if (NumFeatures)
14541454 OS << Target << "FeatureKV, ";
14551455 else
1456 OS << "0, ";
1456 OS << "None, ";
14571457 if (NumProcs)
14581458 OS << Target << "SubTypeKV, ";
14591459 else
1460 OS << "0, ";
1460 OS << "None, ";
14611461 OS << '\n'; OS.indent(22);
14621462 OS << Target << "ProcSchedKV, "
14631463 << Target << "WriteProcResTable, "
14671467 OS << '\n'; OS.indent(22);
14681468 OS << Target << "Stages, "
14691469 << Target << "OperandCycles, "
1470 << Target << "ForwardingPaths, ";
1470 << Target << "ForwardingPaths";
14711471 } else
1472 OS << "0, 0, 0, ";
1473 OS << NumFeatures << ", " << NumProcs << ");\n}\n\n";
1472 OS << "0, 0, 0";
1473 OS << ");\n}\n\n";
14741474
14751475 OS << "} // End llvm namespace \n";
14761476
15311531 << " : TargetSubtargetInfo() {\n"
15321532 << " InitMCSubtargetInfo(TT, CPU, FS, ";
15331533 if (NumFeatures)
1534 OS << Target << "FeatureKV, ";
1534 OS << "makeArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), ";
15351535 else
1536 OS << "0, ";
1536 OS << "None, ";
15371537 if (NumProcs)
1538 OS << Target << "SubTypeKV, ";
1538 OS << "makeArrayRef(" << Target << "SubTypeKV, " << NumProcs << "), ";
15391539 else
1540 OS << "0, ";
1540 OS << "None, ";
15411541 OS << '\n'; OS.indent(22);
15421542 OS << Target << "ProcSchedKV, "
15431543 << Target << "WriteProcResTable, "
15471547 if (SchedModels.hasItineraries()) {
15481548 OS << Target << "Stages, "
15491549 << Target << "OperandCycles, "
1550 << Target << "ForwardingPaths, ";
1550 << Target << "ForwardingPaths";
15511551 } else
1552 OS << "0, 0, 0, ";
1553 OS << NumFeatures << ", " << NumProcs << ");\n}\n\n";
1552 OS << "0, 0, 0";
1553 OS << ");\n}\n\n";
15541554
15551555 EmitSchedModelHelpers(ClassName, OS);
15561556