llvm.org GIT mirror llvm / d462ba8
Teach LegalizeTypes how to expand and promote CTLZ, CTTZ and CTPOP. The expansion code differs from that in LegalizeDAG in that it chooses to take the CTLZ/CTTZ count from the Hi/Lo part depending on whether the Hi/Lo value is zero, not on whether CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the width of the type is) for it. I made this change because the optimizers may well know that Hi/Lo is zero and exploit it. The promotion code for CTTZ also differs from that in LegalizeDAG: it uses an "or" to get the right result when the original value is zero, rather than using a compare and select. This also means the value doesn't need to be zero extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8 Duncan Sands 12 years ago
4 changed file(s) with 123 addition(s) and 34 deletion(s). Raw diff Collapse all Expand all
158158
159159 // Result Promotion.
160160 void PromoteResult(SDNode *N, unsigned ResNo);
161 SDOperand PromoteResult_UNDEF(SDNode *N);
162161 SDOperand PromoteResult_Constant(SDNode *N);
163 SDOperand PromoteResult_TRUNCATE(SDNode *N);
164 SDOperand PromoteResult_INT_EXTEND(SDNode *N);
162 SDOperand PromoteResult_CTLZ(SDNode *N);
163 SDOperand PromoteResult_CTPOP(SDNode *N);
164 SDOperand PromoteResult_CTTZ(SDNode *N);
165165 SDOperand PromoteResult_FP_ROUND(SDNode *N);
166166 SDOperand PromoteResult_FP_TO_XINT(SDNode *N);
167 SDOperand PromoteResult_INT_EXTEND(SDNode *N);
168 SDOperand PromoteResult_LOAD(LoadSDNode *N);
169 SDOperand PromoteResult_SDIV(SDNode *N);
170 SDOperand PromoteResult_SELECT (SDNode *N);
171 SDOperand PromoteResult_SELECT_CC(SDNode *N);
167172 SDOperand PromoteResult_SETCC(SDNode *N);
168 SDOperand PromoteResult_LOAD(LoadSDNode *N);
173 SDOperand PromoteResult_SHL(SDNode *N);
169174 SDOperand PromoteResult_SimpleIntBinOp(SDNode *N);
170 SDOperand PromoteResult_SDIV(SDNode *N);
171 SDOperand PromoteResult_UDIV(SDNode *N);
172 SDOperand PromoteResult_SHL(SDNode *N);
173175 SDOperand PromoteResult_SRA(SDNode *N);
174176 SDOperand PromoteResult_SRL(SDNode *N);
175 SDOperand PromoteResult_SELECT (SDNode *N);
176 SDOperand PromoteResult_SELECT_CC(SDNode *N);
177
177 SDOperand PromoteResult_TRUNCATE(SDNode *N);
178 SDOperand PromoteResult_UDIV(SDNode *N);
179 SDOperand PromoteResult_UNDEF(SDNode *N);
180
178181 // Operand Promotion.
179182 bool PromoteOperand(SDNode *N, unsigned OperandNo);
180183 SDOperand PromoteOperand_ANY_EXTEND(SDNode *N);
201204
202205 // Result Expansion.
203206 void ExpandResult(SDNode *N, unsigned ResNo);
207 void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
208 void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
209 void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
210 void ExpandResult_BUILD_PAIR (SDNode *N, SDOperand &Lo, SDOperand &Hi);
211 void ExpandResult_Constant (SDNode *N, SDOperand &Lo, SDOperand &Hi);
212 void ExpandResult_CTLZ (SDNode *N, SDOperand &Lo, SDOperand &Hi);
213 void ExpandResult_CTPOP (SDNode *N, SDOperand &Lo, SDOperand &Hi);
214 void ExpandResult_CTTZ (SDNode *N, SDOperand &Lo, SDOperand &Hi);
215 void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
216 void ExpandResult_MERGE_VALUES(SDNode *N, SDOperand &Lo, SDOperand &Hi);
217 void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
218 void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
219 void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
204220 void ExpandResult_UNDEF (SDNode *N, SDOperand &Lo, SDOperand &Hi);
205 void ExpandResult_Constant (SDNode *N, SDOperand &Lo, SDOperand &Hi);
206 void ExpandResult_BUILD_PAIR (SDNode *N, SDOperand &Lo, SDOperand &Hi);
207 void ExpandResult_MERGE_VALUES(SDNode *N, SDOperand &Lo, SDOperand &Hi);
208 void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
209221 void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
210 void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
211 void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
212 void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
213 void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
214 void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
215 void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
216222
217223 void ExpandResult_Logical (SDNode *N, SDOperand &Lo, SDOperand &Hi);
218224 void ExpandResult_BSWAP (SDNode *N, SDOperand &Lo, SDOperand &Hi);
8181 case ISD::SHL:
8282 case ISD::SRA:
8383 case ISD::SRL: ExpandResult_Shift(N, Lo, Hi); break;
84 }
85
84
85 case ISD::CTLZ: ExpandResult_CTLZ(N, Lo, Hi); break;
86 case ISD::CTPOP: ExpandResult_CTPOP(N, Lo, Hi); break;
87 case ISD::CTTZ: ExpandResult_CTTZ(N, Lo, Hi); break;
88 }
89
8690 // If Lo/Hi is null, the sub-method took care of registering results etc.
8791 if (Lo.Val)
8892 SetExpandedOp(SDOperand(N, ResNo), Lo, Hi);
614618 #endif
615619 }
616620
621 void DAGTypeLegalizer::ExpandResult_CTLZ(SDNode *N,
622 SDOperand &Lo, SDOperand &Hi) {
623 // ctlz (HiLo) -> Hi != 0 ? ctlz(Hi) : (ctlz(Lo)+32)
624 GetExpandedOp(N->getOperand(0), Lo, Hi);
625 MVT::ValueType NVT = Lo.getValueType();
626
627 SDOperand HiNotZero = DAG.getSetCC(TLI.getSetCCResultTy(), Hi,
628 DAG.getConstant(0, NVT), ISD::SETNE);
629
630 SDOperand LoLZ = DAG.getNode(ISD::CTLZ, NVT, Lo);
631 SDOperand HiLZ = DAG.getNode(ISD::CTLZ, NVT, Hi);
632
633 Lo = DAG.getNode(ISD::SELECT, NVT, HiNotZero, HiLZ,
634 DAG.getNode(ISD::ADD, NVT, LoLZ,
635 DAG.getConstant(MVT::getSizeInBits(NVT), NVT)));
636 Hi = DAG.getConstant(0, NVT);
637 }
638
639 void DAGTypeLegalizer::ExpandResult_CTPOP(SDNode *N,
640 SDOperand &Lo, SDOperand &Hi) {
641 // ctpop(HiLo) -> ctpop(Hi)+ctpop(Lo)
642 GetExpandedOp(N->getOperand(0), Lo, Hi);
643 MVT::ValueType NVT = Lo.getValueType();
644 Lo = DAG.getNode(ISD::ADD, NVT, DAG.getNode(ISD::CTPOP, NVT, Lo),
645 DAG.getNode(ISD::CTPOP, NVT, Hi));
646 Hi = DAG.getConstant(0, NVT);
647 }
648
649 void DAGTypeLegalizer::ExpandResult_CTTZ(SDNode *N,
650 SDOperand &Lo, SDOperand &Hi) {
651 // cttz (HiLo) -> Lo != 0 ? cttz(Lo) : (cttz(Hi)+32)
652 GetExpandedOp(N->getOperand(0), Lo, Hi);
653 MVT::ValueType NVT = Lo.getValueType();
654
655 SDOperand LoNotZero = DAG.getSetCC(TLI.getSetCCResultTy(), Lo,
656 DAG.getConstant(0, NVT), ISD::SETNE);
657
658 SDOperand LoLZ = DAG.getNode(ISD::CTTZ, NVT, Lo);
659 SDOperand HiLZ = DAG.getNode(ISD::CTTZ, NVT, Hi);
660
661 Lo = DAG.getNode(ISD::SELECT, NVT, LoNotZero, LoLZ,
662 DAG.getNode(ISD::ADD, NVT, HiLZ,
663 DAG.getConstant(MVT::getSizeInBits(NVT), NVT)));
664 Hi = DAG.getConstant(0, NVT);
665 }
617666
618667 /// ExpandShiftByConstant - N is a shift by a value that needs to be expanded,
619668 /// and the shift amount is a constant 'Amt'. Expand the operation.
6969 case ISD::SELECT: Result = PromoteResult_SELECT(N); break;
7070 case ISD::SELECT_CC: Result = PromoteResult_SELECT_CC(N); break;
7171
72 case ISD::CTLZ: Result = PromoteResult_CTLZ(N); break;
73 case ISD::CTPOP: Result = PromoteResult_CTPOP(N); break;
74 case ISD::CTTZ: Result = PromoteResult_CTTZ(N); break;
7275 }
7376
7477 // If Result is null, the sub-method took care of registering the result.
264267 N->getOperand(1), LHS, RHS, N->getOperand(4));
265268 }
266269
270 SDOperand DAGTypeLegalizer::PromoteResult_CTLZ(SDNode *N) {
271 SDOperand Op = GetPromotedOp(N->getOperand(0));
272 MVT::ValueType OVT = N->getValueType(0);
273 MVT::ValueType NVT = Op.getValueType();
274 // Zero extend to the promoted type and do the count there.
275 Op = DAG.getNode(ISD::CTLZ, NVT, DAG.getZeroExtendInReg(Op, OVT));
276 // Subtract off the extra leading bits in the bigger type.
277 return DAG.getNode(ISD::SUB, NVT, Op,
278 DAG.getConstant(MVT::getSizeInBits(NVT) -
279 MVT::getSizeInBits(OVT), NVT));
280 }
281
282 SDOperand DAGTypeLegalizer::PromoteResult_CTPOP(SDNode *N) {
283 SDOperand Op = GetPromotedOp(N->getOperand(0));
284 MVT::ValueType OVT = N->getValueType(0);
285 MVT::ValueType NVT = Op.getValueType();
286 // Zero extend to the promoted type and do the count there.
287 return DAG.getNode(ISD::CTPOP, NVT, DAG.getZeroExtendInReg(Op, OVT));
288 }
289
290 SDOperand DAGTypeLegalizer::PromoteResult_CTTZ(SDNode *N) {
291 SDOperand Op = GetPromotedOp(N->getOperand(0));
292 MVT::ValueType OVT = N->getValueType(0);
293 MVT::ValueType NVT = Op.getValueType();
294 // The count is the same in the promoted type except if the original
295 // value was zero. This can be handled by setting the bit just off
296 // the top of the original type.
297 Op = DAG.getNode(ISD::OR, NVT, Op,
298 // FIXME: Do this using an APINT constant.
299 DAG.getConstant(1UL << MVT::getSizeInBits(OVT), NVT));
300 return DAG.getNode(ISD::CTTZ, NVT, Op);
301 }
267302
268303 //===----------------------------------------------------------------------===//
269304 // Operand Promotion
0 ; RUN: llvm-as < %s | llc
11
2 @.str3 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1]
2 @.str = internal constant [14 x i8] c"%lld %d %d %d\00"
33
4 define i32 @main() nounwind {
4 define i32 @main(i64 %arg) nounwind {
55 entry:
6 br label %bb30
7
8 bb30: ; preds = %bb30, %entry
9 %l.024 = phi i64 [ -10000, %entry ], [ 0, %bb30 ] ; [#uses=2]
10 %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %l.024 ) ; [#uses=1]
11 trunc i64 %tmp37 to i32 ; :0 [#uses=1]
12 %tmp40 = tail call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([56 x i8]* @.str3, i32 0, i32 0), i64 %l.024, i32 %0, i32 0, i32 0 ) nounwind ; [#uses=0]
13 br i1 false, label %bb30, label %bb9.i
14
15 bb9.i: ; preds = %bb30
6 %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg ) ; [#uses=1]
7 %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg ) ; [#uses=1]
8 %tmp57 = tail call i64 @llvm.ctpop.i64( i64 %arg ) ; [#uses=1]
9 %tmp38 = trunc i64 %tmp37 to i32 ; :0 [#uses=1]
10 %tmp48 = trunc i64 %tmp47 to i32 ; :0 [#uses=1]
11 %tmp58 = trunc i64 %tmp57 to i32 ; :0 [#uses=1]
12 %tmp40 = tail call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 %tmp38, i32 %tmp48, i32 %tmp58 ) nounwind ; [#uses=0]
1613 ret i32 0
1714 }
1815
1916 declare i32 @printf(i8* noalias , ...) nounwind
2017
2118 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
19 declare i64 @llvm.cttz.i64(i64) nounwind readnone
20 declare i64 @llvm.ctpop.i64(i64) nounwind readnone