Mark shortening NaN conversions as Inexact. PR 2856.
Improve description of unsupported formats.
gitsvnid: https://llvm.org/svn/llvmproject/llvm/trunk@57185 911773080d340410b5e696231b3b80d8
Dale Johannesen
11 years ago
1726  1726  APInt::tcShiftLeft(significandParts(), newPartCount, shift); 
1727  1727  else if (shift < 0) 
1728  1728  APInt::tcShiftRight(significandParts(), newPartCount, shift); 
1729  // If the new size is shorter, we lost information.  
1730  fs = (shift < 0) ? opInexact : opOK;  
1729  1731  // gcc forces the Quiet bit on, which means (float)(double)(float_sNan) 
1730  1732  // does not give you back the same bits. This is dubious, and we 
1731  1733  // don't currently do it. You're really supposed to get 
1732  1734  // an invalid operation signal at runtime, but nobody does that. 
1733  fs = opOK;  
1734  1735  } else { 
1735  1736  semantics = &toSemantics; 
1736  1737  fs = opOK; 
2632  2633  return api.bitsToDouble(); 
2633  2634  } 
2634  2635  
2635  /// Integer bit is explicit in this format. Current Intel book does not  
2636  /// define meaning of:  
2637  /// exponent = all 1's, integer bit not set.  
2638  /// exponent = 0, integer bit set. (formerly "psuedodenormals")  
2639 
/// 

2636  /// Integer bit is explicit in this format. Intel hardware (387 and later)⏎  
2637  /// does not support these bit patterns:  
2638  /// exponent = all 1's, integer bit 0, significand 0 ("pseudoinfinity")  
2639  /// exponent = all 1's, integer bit 0, significand nonzero ("pseudoNaN")  
2640  /// exponent = 0, integer bit 1 ("pseudodenormal")  
2641  /// exponent!=0 nor all 1's, integer bit 0 ("unnormal")  
2642  /// At the moment, the first two are treated as NaNs, the second two as Normal.  
2640  2643  void 
2641  2644  APFloat::initFromF80LongDoubleAPInt(const APInt &api) 
2642  2645  { 