llvm.org GIT mirror llvm / d369b41
ARMAsmParser: clean up of isImmediate functions - we are now using immediate AsmOperands so that the range check functions are tablegen'ed. - Big bonus is that error messages become much more accurate, i.e. instead of a useless "invalid operand" error message it will not say that the immediate operand must in range [x,y], which is why regression tests needed updating. More tablegen operand descriptions could probably benefit from using immediateAsmOperand, but this is a first good step to get rid of most of the nearly identical range check functions. I will address the remaining immediate operands in next clean ups. Differential Revision: https://reviews.llvm.org/D31333 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299358 91177308-0d34-0410-b5e6-96231b3b80d8 Sjoerd Meijer 3 years ago
14 changed file(s) with 195 addition(s) and 284 deletion(s). Raw diff Collapse all Expand all
183183
184184 // ARM special operands for disassembly only.
185185 //
186 def SetEndAsmOperand : ImmAsmOperand {
186 def SetEndAsmOperand : ImmAsmOperand<0,1> {
187187 let Name = "SetEndImm";
188188 let ParserMethod = "parseSetEndImm";
189189 }
220220 // 16 imm6<5:4> = '01', 16 - is encoded in imm6<3:0>
221221 // 32 imm6<5> = '1', 32 - is encoded in imm6<4:0>
222222 // 64 64 - is encoded in imm6<5:0>
223 def shr_imm8_asm_operand : ImmAsmOperand { let Name = "ShrImm8"; }
223 def shr_imm8_asm_operand : ImmAsmOperand<1,8> { let Name = "ShrImm8"; }
224224 def shr_imm8 : Operand, ImmLeaf 0 && Imm <= 8; }]> {
225225 let EncoderMethod = "getShiftRight8Imm";
226226 let DecoderMethod = "DecodeShiftRight8Imm";
227227 let ParserMatchClass = shr_imm8_asm_operand;
228228 }
229 def shr_imm16_asm_operand : ImmAsmOperand { let Name = "ShrImm16"; }
229 def shr_imm16_asm_operand : ImmAsmOperand<1,16> { let Name = "ShrImm16"; }
230230 def shr_imm16 : Operand, ImmLeaf 0 && Imm <= 16; }]> {
231231 let EncoderMethod = "getShiftRight16Imm";
232232 let DecoderMethod = "DecodeShiftRight16Imm";
233233 let ParserMatchClass = shr_imm16_asm_operand;
234234 }
235 def shr_imm32_asm_operand : ImmAsmOperand { let Name = "ShrImm32"; }
235 def shr_imm32_asm_operand : ImmAsmOperand<1,32> { let Name = "ShrImm32"; }
236236 def shr_imm32 : Operand, ImmLeaf 0 && Imm <= 32; }]> {
237237 let EncoderMethod = "getShiftRight32Imm";
238238 let DecoderMethod = "DecodeShiftRight32Imm";
239239 let ParserMatchClass = shr_imm32_asm_operand;
240240 }
241 def shr_imm64_asm_operand : ImmAsmOperand { let Name = "ShrImm64"; }
241 def shr_imm64_asm_operand : ImmAsmOperand<1,64> { let Name = "ShrImm64"; }
242242 def shr_imm64 : Operand, ImmLeaf 0 && Imm <= 64; }]> {
243243 let EncoderMethod = "getShiftRight64Imm";
244244 let DecoderMethod = "DecodeShiftRight64Imm";
956956 }
957957
958958 // PKH instructions
959 def PKHLSLAsmOperand : ImmAsmOperand {
959 def PKHLSLAsmOperand : ImmAsmOperand<0,31> {
960960 let Name = "PKHLSLImm";
961961 let ParserMethod = "parsePKHLSLImm";
962962 }
440440 //
441441
442442 // Immediate operands with a shared generic asm render method.
443 class ImmAsmOperand : AsmOperandClass { let RenderMethod = "addImmOperands"; }
443 class ImmAsmOperand : AsmOperandClass {
444 let RenderMethod = "addImmOperands";
445 let PredicateMethod = "isImmediate<" # Low # "," # High # ">";
446 let DiagnosticType = "ImmRange" # Low # "_" # High;
447 }
448
449 class ImmAsmOperandMinusOne : AsmOperandClass {
450 let PredicateMethod = "isImmediate<" # Low # "," # High # ">";
451 let DiagnosticType = "ImmRange" # Low # "_" # High;
452 }
444453
445454 // Operands that are part of a memory addressing mode.
446455 class MemOperand : Operand { let OperandType = "OPERAND_MEMORY"; }
662671 }]>;
663672
664673 /// imm0_1 predicate - Immediate in the range [0,1].
665 def Imm0_1AsmOperand: ImmAsmOperand { let Name = "Imm0_1"; }
674 def Imm0_1AsmOperand: ImmAsmOperand<0,1> { let Name = "Imm0_1"; }
666675 def imm0_1 : Operand { let ParserMatchClass = Imm0_1AsmOperand; }
667676
668677 /// imm0_3 predicate - Immediate in the range [0,3].
669 def Imm0_3AsmOperand: ImmAsmOperand { let Name = "Imm0_3"; }
678 def Imm0_3AsmOperand: ImmAsmOperand<0,3> { let Name = "Imm0_3"; }
670679 def imm0_3 : Operand { let ParserMatchClass = Imm0_3AsmOperand; }
671680
672681 /// imm0_7 predicate - Immediate in the range [0,7].
673 def Imm0_7AsmOperand: ImmAsmOperand { let Name = "Imm0_7"; }
682 def Imm0_7AsmOperand: ImmAsmOperand<0,7> {
683 let Name = "Imm0_7";
684 }
674685 def imm0_7 : Operand, ImmLeaf
675686 return Imm >= 0 && Imm < 8;
676687 }]> {
677688 let ParserMatchClass = Imm0_7AsmOperand;
678689 }
679690
691 /// imm8_255 predicate - Immediate in the range [8,255].
692 def Imm8_255AsmOperand: ImmAsmOperand<8,255> { let Name = "Imm8_255"; }
693 def imm8_255 : Operand, ImmLeaf
694 return Imm >= 8 && Imm < 256;
695 }]> {
696 let ParserMatchClass = Imm8_255AsmOperand;
697 }
698
680699 /// imm8 predicate - Immediate is exactly 8.
681 def Imm8AsmOperand: ImmAsmOperand { let Name = "Imm8"; }
700 def Imm8AsmOperand: ImmAsmOperand<8,8> { let Name = "Imm8"; }
682701 def imm8 : Operand, ImmLeaf {
683702 let ParserMatchClass = Imm8AsmOperand;
684703 }
685704
686705 /// imm16 predicate - Immediate is exactly 16.
687 def Imm16AsmOperand: ImmAsmOperand { let Name = "Imm16"; }
706 def Imm16AsmOperand: ImmAsmOperand<16,16> { let Name = "Imm16"; }
688707 def imm16 : Operand, ImmLeaf {
689708 let ParserMatchClass = Imm16AsmOperand;
690709 }
691710
692711 /// imm32 predicate - Immediate is exactly 32.
693 def Imm32AsmOperand: ImmAsmOperand { let Name = "Imm32"; }
712 def Imm32AsmOperand: ImmAsmOperand<32,32> { let Name = "Imm32"; }
694713 def imm32 : Operand, ImmLeaf {
695714 let ParserMatchClass = Imm32AsmOperand;
696715 }
698717 def imm8_or_16 : ImmLeaf;
699718
700719 /// imm1_7 predicate - Immediate in the range [1,7].
701 def Imm1_7AsmOperand: ImmAsmOperand { let Name = "Imm1_7"; }
720 def Imm1_7AsmOperand: ImmAsmOperand<1,7> { let Name = "Imm1_7"; }
702721 def imm1_7 : Operand, ImmLeaf 0 && Imm < 8; }]> {
703722 let ParserMatchClass = Imm1_7AsmOperand;
704723 }
705724
706725 /// imm1_15 predicate - Immediate in the range [1,15].
707 def Imm1_15AsmOperand: ImmAsmOperand { let Name = "Imm1_15"; }
726 def Imm1_15AsmOperand: ImmAsmOperand<1,15> { let Name = "Imm1_15"; }
708727 def imm1_15 : Operand, ImmLeaf 0 && Imm < 16; }]> {
709728 let ParserMatchClass = Imm1_15AsmOperand;
710729 }
711730
712731 /// imm1_31 predicate - Immediate in the range [1,31].
713 def Imm1_31AsmOperand: ImmAsmOperand { let Name = "Imm1_31"; }
732 def Imm1_31AsmOperand: ImmAsmOperand<1,31> { let Name = "Imm1_31"; }
714733 def imm1_31 : Operand, ImmLeaf 0 && Imm < 32; }]> {
715734 let ParserMatchClass = Imm1_31AsmOperand;
716735 }
717736
718737 /// imm0_15 predicate - Immediate in the range [0,15].
719 def Imm0_15AsmOperand: ImmAsmOperand {
738 def Imm0_15AsmOperand: ImmAsmOperand<0,15> {
720739 let Name = "Imm0_15";
721740 let DiagnosticType = "ImmRange0_15";
722741 }
727746 }
728747
729748 /// imm0_31 predicate - True if the 32-bit immediate is in the range [0,31].
730 def Imm0_31AsmOperand: ImmAsmOperand { let Name = "Imm0_31"; }
749 def Imm0_31AsmOperand: ImmAsmOperand<0,31> { let Name = "Imm0_31"; }
731750 def imm0_31 : Operand, ImmLeaf
732751 return Imm >= 0 && Imm < 32;
733752 }]> {
735754 }
736755
737756 /// imm0_32 predicate - True if the 32-bit immediate is in the range [0,32].
738 def Imm0_32AsmOperand: ImmAsmOperand { let Name = "Imm0_32"; }
757 def Imm0_32AsmOperand: ImmAsmOperand<0,32> { let Name = "Imm0_32"; }
739758 def imm0_32 : Operand, ImmLeaf
740 return Imm >= 0 && Imm < 32;
759 return Imm >= 0 && Imm < 33;
741760 }]> {
742761 let ParserMatchClass = Imm0_32AsmOperand;
743762 }
744763
745764 /// imm0_63 predicate - True if the 32-bit immediate is in the range [0,63].
746 def Imm0_63AsmOperand: ImmAsmOperand { let Name = "Imm0_63"; }
765 def Imm0_63AsmOperand: ImmAsmOperand<0,63> { let Name = "Imm0_63"; }
747766 def imm0_63 : Operand, ImmLeaf
748767 return Imm >= 0 && Imm < 64;
749768 }]> {
751770 }
752771
753772 /// imm0_239 predicate - Immediate in the range [0,239].
754 def Imm0_239AsmOperand : ImmAsmOperand {
773 def Imm0_239AsmOperand : ImmAsmOperand<0,239> {
755774 let Name = "Imm0_239";
756775 let DiagnosticType = "ImmRange0_239";
757776 }
760779 }
761780
762781 /// imm0_255 predicate - Immediate in the range [0,255].
763 def Imm0_255AsmOperand : ImmAsmOperand { let Name = "Imm0_255"; }
782 def Imm0_255AsmOperand : ImmAsmOperand<0,255> { let Name = "Imm0_255"; }
764783 def imm0_255 : Operand, ImmLeaf= 0 && Imm < 256; }]> {
765784 let ParserMatchClass = Imm0_255AsmOperand;
766785 }
767786
768 /// imm0_65535 - An immediate is in the range [0.65535].
769 def Imm0_65535AsmOperand: ImmAsmOperand { let Name = "Imm0_65535"; }
787 /// imm0_65535 - An immediate is in the range [0,65535].
788 def Imm0_65535AsmOperand: ImmAsmOperand<0,65535> { let Name = "Imm0_65535"; }
770789 def imm0_65535 : Operand, ImmLeaf
771790 return Imm >= 0 && Imm < 65536;
772791 }]> {
784803 // FIXME: This really needs a Thumb version separate from the ARM version.
785804 // While the range is the same, and can thus use the same match class,
786805 // the encoding is different so it should have a different encoder method.
787 def Imm0_65535ExprAsmOperand: ImmAsmOperand { let Name = "Imm0_65535Expr"; }
806 def Imm0_65535ExprAsmOperand: AsmOperandClass {
807 let Name = "Imm0_65535Expr";
808 let RenderMethod = "addImmOperands";
809 }
810
788811 def imm0_65535_expr : Operand {
789812 let EncoderMethod = "getHiLo16ImmOpValue";
790813 let ParserMatchClass = Imm0_65535ExprAsmOperand;
791814 }
792815
793 def Imm256_65535ExprAsmOperand: ImmAsmOperand { let Name = "Imm256_65535Expr"; }
816 def Imm256_65535ExprAsmOperand: ImmAsmOperand<256,65535> { let Name = "Imm256_65535Expr"; }
794817 def imm256_65535_expr : Operand {
795818 let ParserMatchClass = Imm256_65535ExprAsmOperand;
796819 }
797820
798821 /// imm24b - True if the 32-bit immediate is encodable in 24 bits.
799 def Imm24bitAsmOperand: ImmAsmOperand { let Name = "Imm24bit"; }
822 def Imm24bitAsmOperand: ImmAsmOperand<0,0xffffff> { let Name = "Imm24bit"; }
800823 def imm24b : Operand, ImmLeaf
801824 return Imm >= 0 && Imm <= 0xffffff;
802825 }]> {
825848 return CurDAG->getTargetConstant((int)N->getZExtValue() - 1, SDLoc(N),
826849 MVT::i32);
827850 }]>;
828 def Imm1_32AsmOperand: AsmOperandClass { let Name = "Imm1_32"; }
851 def Imm1_32AsmOperand: ImmAsmOperandMinusOne<1,32> {
852 let Name = "Imm1_32";
853 }
829854 def imm1_32 : Operand, PatLeaf<(imm), [{
830855 uint64_t Imm = N->getZExtValue();
831856 return Imm > 0 && Imm <= 32;
839864 return CurDAG->getTargetConstant((int)N->getZExtValue() - 1, SDLoc(N),
840865 MVT::i32);
841866 }]>;
842 def Imm1_16AsmOperand: AsmOperandClass { let Name = "Imm1_16"; }
867 def Imm1_16AsmOperand: ImmAsmOperandMinusOne<1,16> { let Name = "Imm1_16"; }
843868 def imm1_16 : Operand, PatLeaf<(imm), [{ return Imm > 0 && Imm <= 16; }],
844869 imm1_16_XFORM> {
845870 let PrintMethod = "printImmPlusOneOperand";
1818 unsigned Imm = N->getZExtValue();
1919 return CurDAG->getTargetConstant((Imm == 32 ? 0 : Imm), SDLoc(N), MVT::i32);
2020 }]>;
21 def ThumbSRImmAsmOperand: AsmOperandClass { let Name = "ImmThumbSR"; }
21 def ThumbSRImmAsmOperand: ImmAsmOperand<1,32> { let Name = "ImmThumbSR"; }
2222 def imm_sr : Operand, PatLeaf<(imm), [{
2323 uint64_t Imm = N->getZExtValue();
2424 return Imm > 0 && Imm <= 32;
5252 return ~((uint32_t)N->getZExtValue()) < 256;
5353 }]>;
5454
55 def imm8_255 : ImmLeaf
56 return Imm >= 8 && Imm < 256;
57 }]>;
5855 def imm8_255_neg : PatLeaf<(i32 imm), [{
5956 unsigned Val = -N->getZExtValue();
6057 return Val >= 8 && Val < 256;
7575 // t2_so_imm - Match a 32-bit immediate operand, which is an
7676 // 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit
7777 // immediate splatted into multiple bytes of the word.
78 def t2_so_imm_asmoperand : ImmAsmOperand { let Name = "T2SOImm"; }
78 def t2_so_imm_asmoperand : AsmOperandClass {
79 let Name = "T2SOImm";
80 let RenderMethod = "addImmOperands";
81
82 }
7983 def t2_so_imm : Operand, ImmLeaf
8084 return ARM_AM::getT2SOImmVal(Imm) != -1;
8185 }]> {
115119 let ParserMatchClass = t2_so_imm_neg_asmoperand;
116120 }
117121
118 /// imm0_4095 predicate - True if the 32-bit immediate is in the range [0.4095].
119 def imm0_4095_asmoperand: ImmAsmOperand { let Name = "Imm0_4095"; }
122 /// imm0_4095 predicate - True if the 32-bit immediate is in the range [0,4095].
123 def imm0_4095_asmoperand: ImmAsmOperand<0,4095> { let Name = "Imm0_4095"; }
120124 def imm0_4095 : Operand, ImmLeaf
121125 return Imm >= 0 && Imm < 4096;
122126 }]> {
914914 int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue()));
915915 return Val != -1;
916916 }
917 bool isFBits16() const {
917
918 template
919 bool isImmediate() const {
918920 if (!isImm()) return false;
919921 const MCConstantExpr *CE = dyn_cast(getImm());
920922 if (!CE) return false;
921923 int64_t Value = CE->getValue();
922 return Value >= 0 && Value <= 16;
923 }
924 bool isFBits32() const {
924 return Value >= N && Value <= M;
925 }
926 template
927 bool isImmediateS4() const {
925928 if (!isImm()) return false;
926929 const MCConstantExpr *CE = dyn_cast(getImm());
927930 if (!CE) return false;
928931 int64_t Value = CE->getValue();
929 return Value >= 1 && Value <= 32;
932 return ((Value & 3) == 0) && Value >= N && Value <= M;
933 }
934 bool isFBits16() const {
935 return isImmediate<0, 17>();
936 }
937 bool isFBits32() const {
938 return isImmediate<1, 33>();
930939 }
931940 bool isImm8s4() const {
932 if (!isImm()) return false;
933 const MCConstantExpr *CE = dyn_cast(getImm());
934 if (!CE) return false;
935 int64_t Value = CE->getValue();
936 return ((Value & 3) == 0) && Value >= -1020 && Value <= 1020;
941 return isImmediateS4<-1020, 1020>();
937942 }
938943 bool isImm0_1020s4() const {
939 if (!isImm()) return false;
940 const MCConstantExpr *CE = dyn_cast(getImm());
941 if (!CE) return false;
942 int64_t Value = CE->getValue();
943 return ((Value & 3) == 0) && Value >= 0 && Value <= 1020;
944 return isImmediateS4<0, 1020>();
944945 }
945946 bool isImm0_508s4() const {
946 if (!isImm()) return false;
947 const MCConstantExpr *CE = dyn_cast(getImm());
948 if (!CE) return false;
949 int64_t Value = CE->getValue();
950 return ((Value & 3) == 0) && Value >= 0 && Value <= 508;
947 return isImmediateS4<0, 508>();
951948 }
952949 bool isImm0_508s4Neg() const {
953950 if (!isImm()) return false;
957954 // explicitly exclude zero. we want that to use the normal 0_508 version.
958955 return ((Value & 3) == 0) && Value > 0 && Value <= 508;
959956 }
960 bool isImm0_239() const {
961 if (!isImm()) return false;
962 const MCConstantExpr *CE = dyn_cast(getImm());
963 if (!CE) return false;
964 int64_t Value = CE->getValue();
965 return Value >= 0 && Value < 240;
966 }
967 bool isImm0_255() const {
968 if (!isImm()) return false;
969 const MCConstantExpr *CE = dyn_cast(getImm());
970 if (!CE) return false;
971 int64_t Value = CE->getValue();
972 return Value >= 0 && Value < 256;
973 }
974 bool isImm0_4095() const {
975 if (!isImm()) return false;
976 const MCConstantExpr *CE = dyn_cast(getImm());
977 if (!CE) return false;
978 int64_t Value = CE->getValue();
979 return Value >= 0 && Value < 4096;
980 }
981957 bool isImm0_4095Neg() const {
982958 if (!isImm()) return false;
983959 const MCConstantExpr *CE = dyn_cast(getImm());
985961 int64_t Value = -CE->getValue();
986962 return Value > 0 && Value < 4096;
987963 }
988 bool isImm0_1() const {
989 if (!isImm()) return false;
990 const MCConstantExpr *CE = dyn_cast(getImm());
991 if (!CE) return false;
992 int64_t Value = CE->getValue();
993 return Value >= 0 && Value < 2;
994 }
995 bool isImm0_3() const {
996 if (!isImm()) return false;
997 const MCConstantExpr *CE = dyn_cast(getImm());
998 if (!CE) return false;
999 int64_t Value = CE->getValue();
1000 return Value >= 0 && Value < 4;
1001 }
1002964 bool isImm0_7() const {
1003 if (!isImm()) return false;
1004 const MCConstantExpr *CE = dyn_cast(getImm());
1005 if (!CE) return false;
1006 int64_t Value = CE->getValue();
1007 return Value >= 0 && Value < 8;
1008 }
1009 bool isImm0_15() const {
1010 if (!isImm()) return false;
1011 const MCConstantExpr *CE = dyn_cast(getImm());
1012 if (!CE) return false;
1013 int64_t Value = CE->getValue();
1014 return Value >= 0 && Value < 16;
1015 }
1016 bool isImm0_31() const {
1017 if (!isImm()) return false;
1018 const MCConstantExpr *CE = dyn_cast(getImm());
1019 if (!CE) return false;
1020 int64_t Value = CE->getValue();
1021 return Value >= 0 && Value < 32;
1022 }
1023 bool isImm0_63() const {
1024 if (!isImm()) return false;
1025 const MCConstantExpr *CE = dyn_cast(getImm());
1026 if (!CE) return false;
1027 int64_t Value = CE->getValue();
1028 return Value >= 0 && Value < 64;
1029 }
1030 bool isImm8() const {
1031 if (!isImm()) return false;
1032 const MCConstantExpr *CE = dyn_cast(getImm());
1033 if (!CE) return false;
1034 int64_t Value = CE->getValue();
1035 return Value == 8;
1036 }
1037 bool isImm16() const {
1038 if (!isImm()) return false;
1039 const MCConstantExpr *CE = dyn_cast(getImm());
1040 if (!CE) return false;
1041 int64_t Value = CE->getValue();
1042 return Value == 16;
1043 }
1044 bool isImm32() const {
1045 if (!isImm()) return false;
1046 const MCConstantExpr *CE = dyn_cast(getImm());
1047 if (!CE) return false;
1048 int64_t Value = CE->getValue();
1049 return Value == 32;
1050 }
1051 bool isShrImm8() const {
1052 if (!isImm()) return false;
1053 const MCConstantExpr *CE = dyn_cast(getImm());
1054 if (!CE) return false;
1055 int64_t Value = CE->getValue();
1056 return Value > 0 && Value <= 8;
1057 }
1058 bool isShrImm16() const {
1059 if (!isImm()) return false;
1060 const MCConstantExpr *CE = dyn_cast(getImm());
1061 if (!CE) return false;
1062 int64_t Value = CE->getValue();
1063 return Value > 0 && Value <= 16;
1064 }
1065 bool isShrImm32() const {
1066 if (!isImm()) return false;
1067 const MCConstantExpr *CE = dyn_cast(getImm());
1068 if (!CE) return false;
1069 int64_t Value = CE->getValue();
1070 return Value > 0 && Value <= 32;
1071 }
1072 bool isShrImm64() const {
1073 if (!isImm()) return false;
1074 const MCConstantExpr *CE = dyn_cast(getImm());
1075 if (!CE) return false;
1076 int64_t Value = CE->getValue();
1077 return Value > 0 && Value <= 64;
1078 }
1079 bool isImm1_7() const {
1080 if (!isImm()) return false;
1081 const MCConstantExpr *CE = dyn_cast(getImm());
1082 if (!CE) return false;
1083 int64_t Value = CE->getValue();
1084 return Value > 0 && Value < 8;
1085 }
1086 bool isImm1_15() const {
1087 if (!isImm()) return false;
1088 const MCConstantExpr *CE = dyn_cast(getImm());
1089 if (!CE) return false;
1090 int64_t Value = CE->getValue();
1091 return Value > 0 && Value < 16;
1092 }
1093 bool isImm1_31() const {
1094 if (!isImm()) return false;
1095 const MCConstantExpr *CE = dyn_cast(getImm());
1096 if (!CE) return false;
1097 int64_t Value = CE->getValue();
1098 return Value > 0 && Value < 32;
965 return isImmediate<0, 7>();
1099966 }
1100967 bool isImm1_16() const {
1101 if (!isImm()) return false;
1102 const MCConstantExpr *CE = dyn_cast(getImm());
1103 if (!CE) return false;
1104 int64_t Value = CE->getValue();
1105 return Value > 0 && Value < 17;
968 return isImmediate<1, 16>();
1106969 }
1107970 bool isImm1_32() const {
1108 if (!isImm()) return false;
1109 const MCConstantExpr *CE = dyn_cast(getImm());
1110 if (!CE) return false;
1111 int64_t Value = CE->getValue();
1112 return Value > 0 && Value < 33;
1113 }
1114 bool isImm0_32() const {
1115 if (!isImm()) return false;
1116 const MCConstantExpr *CE = dyn_cast(getImm());
1117 if (!CE) return false;
1118 int64_t Value = CE->getValue();
1119 return Value >= 0 && Value < 33;
1120 }
1121 bool isImm0_65535() const {
1122 if (!isImm()) return false;
1123 const MCConstantExpr *CE = dyn_cast(getImm());
1124 if (!CE) return false;
1125 int64_t Value = CE->getValue();
1126 return Value >= 0 && Value < 65536;
971 return isImmediate<1, 32>();
972 }
973 bool isImm8_255() const {
974 return isImmediate<8, 255>();
1127975 }
1128976 bool isImm256_65535Expr() const {
1129977 if (!isImm()) return false;
1144992 return Value >= 0 && Value < 65536;
1145993 }
1146994 bool isImm24bit() const {
1147 if (!isImm()) return false;
1148 const MCConstantExpr *CE = dyn_cast(getImm());
1149 if (!CE) return false;
1150 int64_t Value = CE->getValue();
1151 return Value >= 0 && Value <= 0xffffff;
995 return isImmediate<0, 0xffffff + 1>();
1152996 }
1153997 bool isImmThumbSR() const {
1154 if (!isImm()) return false;
1155 const MCConstantExpr *CE = dyn_cast(getImm());
1156 if (!CE) return false;
1157 int64_t Value = CE->getValue();
1158 return Value > 0 && Value < 33;
998 return isImmediate<1, 33>();
1159999 }
11601000 bool isPKHLSLImm() const {
1161 if (!isImm()) return false;
1162 const MCConstantExpr *CE = dyn_cast(getImm());
1163 if (!CE) return false;
1164 int64_t Value = CE->getValue();
1165 return Value >= 0 && Value < 32;
1001 return isImmediate<0, 32>();
11661002 }
11671003 bool isPKHASRImm() const {
1168 if (!isImm()) return false;
1169 const MCConstantExpr *CE = dyn_cast(getImm());
1170 if (!CE) return false;
1171 int64_t Value = CE->getValue();
1172 return Value > 0 && Value <= 32;
1004 return isImmediate<0, 33>();
11731005 }
11741006 bool isAdrLabel() const {
11751007 // If we have an immediate that's not a constant, treat it as a label
91578989 MatchResult = MatchInstruction(Operands, Inst, ErrorInfo, MatchingInlineAsm,
91588990 PendConditionalInstruction, Out);
91598991
8992 SMLoc ErrorLoc;
8993 if (ErrorInfo < Operands.size()) {
8994 ErrorLoc = ((ARMOperand &)*Operands[ErrorInfo]).getStartLoc();
8995 if (ErrorLoc == SMLoc())
8996 ErrorLoc = IDLoc;
8997 }
8998
91608999 switch (MatchResult) {
91619000 case Match_Success:
91629001 // Context sensitive operand constraints aren't handled by the matcher,
92469085 return Error(IDLoc, "instruction variant requires ARMv8 or later");
92479086 case Match_RequiresFlagSetting:
92489087 return Error(IDLoc, "no flag-preserving variant of this instruction available");
9249 case Match_ImmRange0_15: {
9250 SMLoc ErrorLoc = ((ARMOperand &)*Operands[ErrorInfo]).getStartLoc();
9251 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
9088 case Match_ImmRange0_1:
9089 return Error(ErrorLoc, "immediate operand must be in the range [0,1]");
9090 case Match_ImmRange0_3:
9091 return Error(ErrorLoc, "immediate operand must be in the range [0,3]");
9092 case Match_ImmRange0_7:
9093 return Error(ErrorLoc, "immediate operand must be in the range [0,7]");
9094 case Match_ImmRange0_15:
92529095 return Error(ErrorLoc, "immediate operand must be in the range [0,15]");
9253 }
9254 case Match_ImmRange0_239: {
9255 SMLoc ErrorLoc = ((ARMOperand &)*Operands[ErrorInfo]).getStartLoc();
9256 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
9096 case Match_ImmRange0_31:
9097 return Error(ErrorLoc, "immediate operand must be in the range [0,31]");
9098 case Match_ImmRange0_32:
9099 return Error(ErrorLoc, "immediate operand must be in the range [0,32]");
9100 case Match_ImmRange0_63:
9101 return Error(ErrorLoc, "immediate operand must be in the range [0,63]");
9102 case Match_ImmRange0_239:
92579103 return Error(ErrorLoc, "immediate operand must be in the range [0,239]");
9258 }
9104 case Match_ImmRange0_255:
9105 return Error(ErrorLoc, "immediate operand must be in the range [0,255]");
9106 case Match_ImmRange0_4095:
9107 return Error(ErrorLoc, "immediate operand must be in the range [0,4095]");
9108 case Match_ImmRange0_65535:
9109 return Error(ErrorLoc, "immediate operand must be in the range [0,65535]");
9110 case Match_ImmRange1_7:
9111 return Error(ErrorLoc, "immediate operand must be in the range [1,7]");
9112 case Match_ImmRange1_8:
9113 return Error(ErrorLoc, "immediate operand must be in the range [1,8]");
9114 case Match_ImmRange1_15:
9115 return Error(ErrorLoc, "immediate operand must be in the range [1,15]");
9116 case Match_ImmRange1_16:
9117 return Error(ErrorLoc, "immediate operand must be in the range [1,16]");
9118 case Match_ImmRange1_31:
9119 return Error(ErrorLoc, "immediate operand must be in the range [1,31]");
9120 case Match_ImmRange1_32:
9121 return Error(ErrorLoc, "immediate operand must be in the range [1,32]");
9122 case Match_ImmRange1_64:
9123 return Error(ErrorLoc, "immediate operand must be in the range [1,64]");
9124 case Match_ImmRange8_8:
9125 return Error(ErrorLoc, "immediate operand must be 8.");
9126 case Match_ImmRange16_16:
9127 return Error(ErrorLoc, "immediate operand must be 16.");
9128 case Match_ImmRange32_32:
9129 return Error(ErrorLoc, "immediate operand must be 32.");
9130 case Match_ImmRange256_65535:
9131 return Error(ErrorLoc, "immediate operand must be in the range [255,65535]");
9132 case Match_ImmRange0_16777215:
9133 return Error(ErrorLoc, "immediate operand must be in the range [0,0xffffff]");
92599134 case Match_AlignedMemoryRequiresNone:
92609135 case Match_DupAlignedMemoryRequiresNone:
92619136 case Match_AlignedMemoryRequires16:
191191 //CHECK-ERROR: error: too few operands for instruction
192192 //CHECK-ERROR: setpan
193193 //CHECK-ERROR: ^
194 //CHECK-ERROR: error: invalid operand for instruction
194 //CHECK-ERROR: error: immediate operand must be in the range [0,1]
195195 //CHECK-ERROR: setpan #-1
196196 //CHECK-ERROR: ^
197 //CHECK-ERROR: error: invalid operand for instruction
197 //CHECK-ERROR: error: immediate operand must be in the range [0,1]
198198 //CHECK-ERROR: setpan #2
199199 //CHECK-ERROR: ^
200200
9292 @ Out of range 16-bit immediate on BKPT
9393 bkpt #65536
9494
95 @ CHECK-ERRORS: error: invalid operand for instruction
95 @ CHECK-ERRORS: error: immediate operand must be in the range [0,65535]
96 @ CHECK-ERRORS: bkpt #65536
97 @ CHECK-ERRORS: ^
9698
9799 @ Out of range immediates for v8 HLT instruction.
98100 hlt #65536
99101 hlt #-1
100 @CHECK-ERRORS: error: invalid operand for instruction
102 @CHECK-ERRORS: error: immediate operand must be in the range [0,65535]
101103 @CHECK-ERRORS: hlt #65536
102 @CHECK-ERRORS: ^
103 @CHECK-ERRORS: error: invalid operand for instruction
104 @CHECK-ERRORS: ^
105 @CHECK-ERRORS: error: immediate operand must be in the range [0,65535]
104106 @CHECK-ERRORS: hlt #-1
105 @CHECK-ERRORS: ^
107 @CHECK-ERRORS: ^
106108
107109 @ Illegal condition code for v8 HLT instruction.
108110 hlteq #2
122124 cdp2 p7, #2, c1, c1, c1, #8
123125 cdp2 p7, #1, c1, c1, c1, #8
124126
125 @ CHECK-ERRORS: error: invalid operand for instruction
126 @ CHECK-ERRORS: error: invalid operand for instruction
127 @ CHECK-ERRORS: error: invalid operand for instruction
128 @ CHECK-ERRORS: error: invalid operand for instruction
127 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,7]
128 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,7]
129 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,7]
130 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,7]
131 @ CHECK-ERRORS-V8: error: invalid operand for instruction
132 @ CHECK-ERRORS-V8: error: invalid operand for instruction
133 @ CHECK-ERRORS-V8: error: invalid operand for instruction
134 @ CHECK-ERRORS-V8: error: invalid operand for instruction
129135
130136 @ Out of range immediates for DBG
131137 dbg #-1
135141 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
136142 @ Double-check that we're synced up with the right diagnostics.
137143 @ CHECK-ERRORS: dbg #16
144 @ CHECK-ERRORS: ^
138145
139146 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2
140147 mcr p7, #8, r5, c1, c1, #4
143150 mcr2 p7, #1, r5, c1, c1, #8
144151 mcrr p7, #16, r5, r4, c1
145152 mcrr2 p7, #16, r5, r4, c1
146 @ CHECK-ERRORS: error: invalid operand for instruction
147 @ CHECK-ERRORS: error: invalid operand for instruction
148 @ CHECK-ERRORS: error: invalid operand for instruction
149 @ CHECK-ERRORS: error: invalid operand for instruction
153 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
154 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
155 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
156 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
150157 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
151158 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
152159 @ CHECK-ERRORS-V8: error: invalid operand for instruction
160167 @ Out of range immediate for MOV
161168 movw r9, 0x10000
162169 @ CHECK-ERRORS: error: invalid operand for instruction
170 @ CHECK-ERRORS: movw r9, 0x10000
171 @ CHECK-ERRORS: ^
163172
164173 @ Invalid 's' bit usage for MOVW
165174 movs r6, #0xffff
166175 movwseq r9, #0xffff
167 @ CHECK-ERRORS: error: invalid operand for instruction
176 @ CHECK-ERRORS: error: immediate operand must be in the range [0,255]
168177 @ CHECK-ERRORS: error: instruction 'movw' can not set flags, but 's' suffix specified
169178
170179 @ Out of range immediate for MOVT
171180 movt r9, 0x10000
172181 @ CHECK-ERRORS: error: invalid operand for instruction
182 @ CHECK-ERRORS: movt r9, 0x10000
183 @ CHECK-ERRORS: ^
173184
174185 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
175186 mrc p14, #8, r1, c1, c2, #4
178189 mrc2 p14, #0, r1, c1, c2, #9
179190 mrrc p7, #16, r5, r4, c1
180191 mrrc2 p7, #17, r5, r4, c1
181 @ CHECK-ERRORS: error: invalid operand for instruction
182 @ CHECK-ERRORS: error: invalid operand for instruction
183 @ CHECK-ERRORS: error: invalid operand for instruction
184 @ CHECK-ERRORS: error: invalid operand for instruction
192 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
193 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
194 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
195 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
185196 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
186197 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
187198 @ CHECK-ERRORS-V8: error: invalid operand for instruction
241252 ssat r8, #1, r10, lsl fred
242253 ssat r8, #1, r10, lsl #fred
243254
244 @ CHECK-ERRORS: error: invalid operand for instruction
255 @ CHECK-ERRORS: error: immediate operand must be in the range [1,32]
245256 @ CHECK-ERRORS: ssat r8, #0, r10, lsl #8
246257 @ CHECK-ERRORS: ^
247 @ CHECK-ERRORS: error: invalid operand for instruction
258 @ CHECK-ERRORS: error: immediate operand must be in the range [1,32]
248259 @ CHECK-ERRORS: ssat r8, #33, r10, lsl #8
249260 @ CHECK-ERRORS: ^
250261 @ CHECK-ERRORS: error: 'lsr' shift amount must be in range [0,31]
273284 ssat16 r2, #0, r7
274285 ssat16 r3, #17, r5
275286
276 @ CHECK-ERRORS: error: invalid operand for instruction
287 @ CHECK-ERRORS: error: immediate operand must be in the range [1,16]
277288 @ CHECK-ERRORS: ssat16 r2, #0, r7
278289 @ CHECK-ERRORS: ^
279 @ CHECK-ERRORS: error: invalid operand for instruction
290 @ CHECK-ERRORS: error: immediate operand must be in the range [1,16]
280291 @ CHECK-ERRORS: ssat16 r3, #17, r5
281292 @ CHECK-ERRORS: ^
282293
291302
292303 @ Out of range immediate on SVC
293304 svc #0x1000000
294 @ CHECK-ERRORS: error: invalid operand for instruction
305 @ CHECK-ERRORS: error: immediate operand must be in the range [0,0xffffff]
295306 @ CHECK-ERRORS: svc #0x1000000
296307 @ CHECK-ERRORS: ^
297308
406417
407418 @ Bad CPS instruction format.
408419 cps f,#1
409 @ CHECK-ERRORS: error: invalid operand for instruction
420 @ CHECK-ERRORS: error: immediate operand must be in the range [0,31]
410421 @ CHECK-ERRORS: cps f,#1
411422 @ CHECK-ERRORS: ^
412423
99 # CHECK: error: invalid operand for instruction
1010
1111 ADD.W r0, r0, #0xFF01FF01
12 # CHECK: error: invalid operand for instruction
12 # CHECK: error: immediate operand must be in the range [0,7]
55 # CHECK: error: instruction requires: arm-mode
66
77 ADDs r0, #0xFFFFFEFF
8 # CHECK: error: invalid operand for instruction
8 # CHECK: error: immediate operand must be in the range [0,255]
99
1010 SUBs r1, r0, #0xFFFFFFF5
1111 # CHECK: error: instruction requires: arm-mode
1212
1313 SUBs r0, #0xFFFFFEFF
14 # CHECK: error: invalid operand for instruction
14 # CHECK: error: immediate operand must be in the range [0,255]
2727
2828 @ Out of range immediates for ASR instruction.
2929 asrs r2, r3, #33
30 @ CHECK-ERRORS: error: invalid operand for instruction
30 @ CHECK-ERRORS: error: immediate operand must be in the range [0,32]
3131 @ CHECK-ERRORS: asrs r2, r3, #33
3232 @ CHECK-ERRORS: ^
3333
5050 @CHECK-ERRORS-V8: error: instruction requires: arm-mode
5151 @CHECK-ERRORS-V8: hlt #64
5252 @CHECK-ERRORS-V8: ^
53 @CHECK-ERRORS: error: invalid operand for instruction
53 @CHECK-ERRORS: error: immediate operand must be in the range [0,65535]
5454 @CHECK-ERRORS: hlt #-1
5555 @CHECK-ERRORS: ^
5656
152152 @ Out of range immediates for LSL instruction.
153153 lsls r4, r5, #-1
154154 lsls r4, r5, #32
155 @ CHECK-ERRORS: error: invalid operand for instruction
155 @ CHECK-ERRORS: error: immediate operand must be in the range [0,31]
156156 @ CHECK-ERRORS: lsls r4, r5, #-1
157157 @ CHECK-ERRORS: ^
158 @ CHECK-ERRORS: error: invalid operand for instruction
158 @ CHECK-ERRORS: error: immediate operand must be in the range [0,31]
159159 @ CHECK-ERRORS: lsls r4, r5, #32
160160 @ CHECK-ERRORS: ^
161161
183183 @ Out of range immediate for SVC instruction.
184184 svc #-1
185185 svc #256
186 @ CHECK-ERRORS: error: invalid operand for instruction
186 @ CHECK-ERRORS: error: immediate operand must be in the range [0,0xffffff]
187187 @ CHECK-ERRORS: svc #-1
188188 @ CHECK-ERRORS: ^
189189 @ CHECK-ERRORS: error: instruction requires: arm-mode
2121 setend be
2222 setend le
2323
24 @ CHECK: error: invalid operand for instruction
25 @ CHECK: error: invalid operand for instruction
24 @ CHECK: error: immediate operand must be in the range [0,1]
25 @ CHECK: error: immediate operand must be in the range [0,1]
3838 mrc2 p14, #0, r1, c1, c2, #9
3939 mrrc p7, #16, r5, r4, c1
4040 mrrc2 p7, #17, r5, r4, c1
41 @ CHECK-ERRORS: error: invalid operand for instruction
42 @ CHECK-ERRORS: error: invalid operand for instruction
43 @ CHECK-ERRORS: error: invalid operand for instruction
44 @ CHECK-ERRORS: error: invalid operand for instruction
41 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
42 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
43 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
44 @ CHECK-ERRORS: error: immediate operand must be in the range [0,7]
4545 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
4646 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
4747 @ CHECK-ERRORS-V8: error: invalid operand for instruction
7878 mov r0, foo2
7979 movw r0, foo2
8080 movt r0, foo2
81 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
82 @ CHECK-ERRORS: ^
81 @ CHECK-ERRORS: error: instruction requires: arm-mode
8382 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
8483 @ CHECK-ERRORS: ^
8584 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
1212
1313 udf #65536
1414
15 @ CHECK: error: invalid operand for instruction
15 @ CHECK: error: immediate operand must be in the range [0,65535]
1616 @ CHECK: udf #65536
1717 @ CHECK: ^
1818
1818
1919 udf.w #65536
2020
21 @ CHECK: error: invalid operand for instruction
21 @ CHECK: error: immediate operand must be in the range [0,65535]
2222 @ CHECK: udf.w #65536
2323 @ CHECK: ^
2424