llvm.org GIT mirror llvm / d27c991
Fix "Control reaches the end of non-void function" warnings, patch by David Chisnall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 11 years ago
11 changed file(s) with 19 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
165165 assert(0 && "Unsupported!");
166166 }
167167 assert(0 && "Illegal empty element");
168 return 0; // Not reached
168169 }
169170
170171 /// find_next - Returns the index of the next set bit starting from the
209209 return getTypeAction(NVT) == Promote ? getTypeToTransformTo(NVT) : NVT;
210210 }
211211 assert(0 && "Unsupported extended type!");
212 return MVT::ValueType(); // Not reached
212213 }
213214
214215 /// getTypeToExpandTo - For types supported by the target, this is an
439440 return getRegisterType(getTypeToTransformTo(VT));
440441 }
441442 assert(0 && "Unsupported extended type!");
443 return MVT::ValueType(); // Not reached
442444 }
443445
444446 /// getNumRegisters - Return the number of registers that this ValueType will
463465 return (BitWidth + RegWidth - 1) / RegWidth;
464466 }
465467 assert(0 && "Unsupported extended type!");
468 return 0; // Not reached
466469 }
467470
468471 /// ShouldShrinkFPConstant - If true, then instruction selection should
807807 return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
808808
809809 assert(0 && "Unknown mismatch!");
810 return SDOperand();
810811 }
811812
812813 /// getCopyToParts - Create a series of nodes that contain the specified value
7777 assert(0 && "LLVMGenericValueToFloat supports only float and double.");
7878 break;
7979 }
80 return 0; // Not reached
8081 }
8182
8283 void LLVMDisposeGenericValue(LLVMGenericValueRef GenVal) {
918918 }
919919 }
920920 }
921 return 0; // Not reached
921922 }
922923
923924 /// GetFunctionSize - Returns the size of the specified MachineFunction.
306306 default:
307307 assert(0 && "Unknown opcode");
308308 }
309 return 0; // Not reached
309310 }
310311
311312 // Branch analysis.
258258 cerr << "CallingConvID = " << CallingConvID << '\n';
259259 assert(0 && "Unsupported calling convention");
260260 }
261 return ""; // Not reached
261262 }
262263
263264
303304 cerr << "Type = " << *Ty << '\n';
304305 assert(0 && "Invalid primitive type");
305306 }
307 return ""; // Not reached
306308 }
307309
308310
330332 cerr << "Type = " << *Ty << '\n';
331333 assert(0 && "Invalid type in getTypeName()");
332334 }
335 return ""; // Not reached
333336 }
334337
335338
373376 cerr << "TypeID = " << Ty->getTypeID() << '\n';
374377 assert(0 && "Invalid type in TypeToPostfix()");
375378 }
379 return ""; // Not reached
376380 }
377381
378382
14451449 cerr << "Bits = " << N << '\n';
14461450 assert(0 && "Unsupported integer width");
14471451 }
1452 return 0; // Not reached
14481453 }
14491454
14501455
180180 LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG)
181181 {
182182 assert(0 && "TLS not implemented for MIPS.");
183 return SDOperand(); // Not reached
183184 }
184185
185186 SDOperand MipsTargetLowering::
8080 case Mips::RA : return 31;
8181 default: assert(0 && "Unknown register number!");
8282 }
83 return 0; // Not reached
8384 }
8485
8586 void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
11031103 SDOperand PPCTargetLowering::LowerGlobalTLSAddress(SDOperand Op,
11041104 SelectionDAG &DAG) {
11051105 assert(0 && "TLS not implemented for PPC.");
1106 return SDOperand(); // Not reached
11061107 }
11071108
11081109 SDOperand PPCTargetLowering::LowerGlobalAddress(SDOperand Op,
11961197 const PPCSubtarget &Subtarget) {
11971198
11981199 assert(0 && "VAARG in ELF32 ABI not implemented yet!");
1200 return SDOperand(); // Not reached
11991201 }
12001202
12011203 SDOperand PPCTargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG,
243243 *Node2 = getNodeForBlock(BB2);
244244 return Node1 && Node2 && Node1->dominates(Node2);
245245 }
246 return false; // Not reached
246247 }
247248
248249 private:
14121413 if (!Node) return false;
14131414 return Top->dominates(Node);
14141415 }
1416 return false; // Not reached
14151417 }
14161418
14171419 // aboveOrBelow - true if the Instruction either dominates or is dominated