llvm.org GIT mirror llvm / d14542f
Merging r314896: ------------------------------------------------------------------------ r314896 | dylanmckay | 2017-10-04 23:33:36 +1300 (Wed, 04 Oct 2017) | 3 lines [AVR] Elaborate LDWRdPtr into `ld r, X++; ld r+1, X` Patch by Gergo Erdi. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@315834 91177308-0d34-0410-b5e6-96231b3b80d8 Dylan McKay 1 year, 10 months ago
8 changed file(s) with 33 addition(s) and 33 deletion(s). Raw diff Collapse all Expand all
582582 unsigned TmpReg = 0; // 0 for no temporary register
583583 unsigned SrcReg = MI.getOperand(1).getReg();
584584 bool SrcIsKill = MI.getOperand(1).isKill();
585 OpLo = AVR::LDRdPtr;
586 OpHi = AVR::LDDRdPtrQ;
585 OpLo = AVR::LDRdPtrPi;
586 OpHi = AVR::LDRdPtr;
587587 TRI->splitReg(DstReg, DstLoReg, DstHiReg);
588588
589589 // Use a temporary register if src and dst registers are the same.
596596 // Load low byte.
597597 auto MIBLO = buildMI(MBB, MBBI, OpLo)
598598 .addReg(CurDstLoReg, RegState::Define)
599 .addReg(SrcReg, RegState::Define)
599600 .addReg(SrcReg);
600601
601602 // Push low byte onto stack if necessary.
605606 // Load high byte.
606607 auto MIBHI = buildMI(MBB, MBBI, OpHi)
607608 .addReg(CurDstHiReg, RegState::Define)
608 .addReg(SrcReg, getKillRegState(SrcIsKill))
609 .addImm(1);
609 .addReg(SrcReg, getKillRegState(SrcIsKill));
610610
611611 if (TmpReg) {
612612 // Move the high byte into the final destination.
11511151 //
11521152 // Expands to:
11531153 // ld Rd, P+
1154 // ld Rd+1, P+
1154 // ld Rd+1, P
11551155 let Constraints = "@earlyclobber $reg" in
11561156 def LDWRdPtr : Pseudo<(outs DREGS:$reg),
1157 (ins PTRDISPREGS:$ptrreg),
1157 (ins PTRREGS:$ptrreg),
11581158 "ldw\t$reg, $ptrreg",
11591159 [(set i16:$reg, (load i16:$ptrreg))]>,
11601160 Requires<[HasSRAM]>;
11631163 // Indirect loads (with postincrement or predecrement).
11641164 let mayLoad = 1,
11651165 hasSideEffects = 0,
1166 Constraints = "$ptrreg = $base_wb,@earlyclobber $reg,@earlyclobber $base_wb" in
1166 Constraints = "$ptrreg = $base_wb,@earlyclobber $reg" in
11671167 {
11681168 def LDRdPtrPi : FSTLD<0,
11691169 0b01,
22 ; CHECK-LABEL: atomic_load16
33 ; CHECK: in r0, 63
44 ; CHECK-NEXT: cli
5 ; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]+
56 ; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]
6 ; CHECK-NEXT: ldd [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]+
77 ; CHECK-NEXT: out 63, r0
88 define i16 @atomic_load16(i16* %foo) {
99 %val = load atomic i16, i16* %foo unordered, align 2
2828 ; CHECK-LABEL: atomic_load_add16
2929 ; CHECK: in r0, 63
3030 ; CHECK-NEXT: cli
31 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]
32 ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+
31 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+
32 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
3333 ; CHECK-NEXT: add [[RR1]], [[TMP:r[0-9]+]]
3434 ; CHECK-NEXT: adc [[RR2]], [[TMP:r[0-9]+]]
3535 ; CHECK-NEXT: st [[RD1]], [[RR1]]
4343 ; CHECK-LABEL: atomic_load_sub16
4444 ; CHECK: in r0, 63
4545 ; CHECK-NEXT: cli
46 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]
47 ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+
46 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+
47 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
4848 ; CHECK-NEXT: sub [[RR1]], [[TMP:r[0-9]+]]
4949 ; CHECK-NEXT: sbc [[RR2]], [[TMP:r[0-9]+]]
5050 ; CHECK-NEXT: st [[RD1]], [[RR1]]
5858 ; CHECK-LABEL: atomic_load_and16
5959 ; CHECK: in r0, 63
6060 ; CHECK-NEXT: cli
61 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]
62 ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+
61 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+
62 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
6363 ; CHECK-NEXT: and [[RR1]], [[TMP:r[0-9]+]]
6464 ; CHECK-NEXT: and [[RR2]], [[TMP:r[0-9]+]]
6565 ; CHECK-NEXT: st [[RD1]], [[RR1]]
7373 ; CHECK-LABEL: atomic_load_or16
7474 ; CHECK: in r0, 63
7575 ; CHECK-NEXT: cli
76 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]
77 ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+
76 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+
77 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
7878 ; CHECK-NEXT: or [[RR1]], [[TMP:r[0-9]+]]
7979 ; CHECK-NEXT: or [[RR2]], [[TMP:r[0-9]+]]
8080 ; CHECK-NEXT: st [[RD1]], [[RR1]]
8888 ; CHECK-LABEL: atomic_load_xor16
8989 ; CHECK: in r0, 63
9090 ; CHECK-NEXT: cli
91 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]
92 ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+
91 ; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+
92 ; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]
9393 ; CHECK-NEXT: eor [[RR1]], [[TMP:r[0-9]+]]
9494 ; CHECK-NEXT: eor [[RR2]], [[TMP:r[0-9]+]]
9595 ; CHECK-NEXT: st [[RD1]], [[RR1]]
88
99 define i16 @load16(i16* %x) {
1010 ; CHECK-LABEL: load16:
11 ; CHECK: ld r24, {{[YZ]}}
12 ; CHECK: ldd r25, {{[YZ]}}+1
11 ; CHECK: ld r24, {{[XYZ]}}+
12 ; CHECK: ld r25, {{[XYZ]}}
1313 %1 = load i16, i16* %x
1414 ret i16 %1
1515 }
4444
4545 define i16 @load16nodisp(i16* %x) {
4646 ; CHECK-LABEL: load16nodisp:
47 ; CHECK: movw r30, r24
48 ; CHECK: subi r30, 192
49 ; CHECK: sbci r31, 255
50 ; CHECK: ld r24, {{[YZ]}}
51 ; CHECK: ldd r25, {{[YZ]}}+1
47 ; CHECK: movw r26, r24
48 ; CHECK: subi r26, 192
49 ; CHECK: sbci r27, 255
50 ; CHECK: ld r24, {{[XYZ]}}+
51 ; CHECK: ld r25, {{[XYZ]}}
5252 %1 = getelementptr inbounds i16, i16* %x, i64 32
5353 %2 = load i16, i16* %1
5454 ret i16 %2
1717
1818 ; CHECK-LABEL: test_ldwrdptr
1919
20 ; CHECK: ld [[SCRATCH:r[0-9]+]], Z
20 ; CHECK: ld [[SCRATCH:r[0-9]+]], Z+
2121 ; CHECK-NEXT: push [[SCRATCH]]
22 ; CHECK-NEXT: ldd [[SCRATCH]], Z+1
22 ; CHECK-NEXT: ld [[SCRATCH]], Z
2323 ; CHECK-NEXT: mov r31, [[SCRATCH]]
2424 ; CHECK-NEXT: pop r30
2525
1616
1717 ; CHECK-LABEL: test_ldwrdptr
1818
19 ; CHECK: %r0 = LDRdPtr %r31r30
20 ; CHECK-NEXT: early-clobber %r1 = LDDRdPtrQ %r31r30, 1
19 ; CHECK: %r0, %r31r30 = LDRdPtrPi %r31r30
20 ; CHECK-NEXT: %r1 = LDRdPtr %r31r30
2121
2222 %r1r0 = LDWRdPtr %r31r30
2323 ...
1616
1717 ; CHECK-LABEL: test_ldwrdptrpd
1818
19 ; CHECK: early-clobber %r1, early-clobber %r31r30 = LDRdPtrPd killed %r31r30
20 ; CHECK-NEXT: early-clobber %r0, early-clobber %r31r30 = LDRdPtrPd killed %r31r30
19 ; CHECK: early-clobber %r1, %r31r30 = LDRdPtrPd killed %r31r30
20 ; CHECK-NEXT: early-clobber %r0, %r31r30 = LDRdPtrPd killed %r31r30
2121
2222 %r1r0, %r31r30 = LDWRdPtrPd %r31r30
2323 ...
1616
1717 ; CHECK-LABEL: test_ldwrdptrpi
1818
19 ; CHECK: early-clobber %r0, early-clobber %r31r30 = LDRdPtrPi killed %r31r30
20 ; CHECK-NEXT: early-clobber %r1, early-clobber %r31r30 = LDRdPtrPi killed %r31r30
19 ; CHECK: early-clobber %r0, %r31r30 = LDRdPtrPi killed %r31r30
20 ; CHECK-NEXT: early-clobber %r1, %r31r30 = LDRdPtrPi killed %r31r30
2121
2222 %r1r0, %r31r30 = LDWRdPtrPi %r31r30
2323 ...