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[Power9] Exploit vector extract with variable index. This patch adds the exploitation for new power 9 instructions which extract variable elements from vectors: VEXTUBLX VEXTUBRX VEXTUHLX VEXTUHRX VEXTUWLX VEXTUWRX Differential Revision: https://reviews.llvm.org/D34032 Commit on behalf of Zaara Syeda (syzaara@ca.ibm.com) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307174 91177308-0d34-0410-b5e6-96231b3b80d8 Tony Jiang 2 years ago
2 changed file(s) with 259 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
19001900 def : Pat<(v4i32 (int_ppc_vsx_lxvw4x_be xoaddr:$src)), (LXVW4X xoaddr:$src)>;
19011901 def : Pat<(v2f64 (int_ppc_vsx_lxvd2x_be xoaddr:$src)), (LXVD2X xoaddr:$src)>;
19021902
1903 // Variable index unsigned vector_extract on Power9
1904 let Predicates = [HasP9Altivec, IsLittleEndian] in {
1905 def : Pat<(i64 (anyext (i32 (vector_extract v16i8:$S, i64:$Idx)))),
1906 (VEXTUBRX $Idx, $S)>;
1907
1908 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, i64:$Idx)))),
1909 (VEXTUHRX (RLWINM8 $Idx, 1, 28, 30), $S)>;
1910 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 0)))),
1911 (VEXTUHRX (LI8 0), $S)>;
1912 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 1)))),
1913 (VEXTUHRX (LI8 2), $S)>;
1914 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 2)))),
1915 (VEXTUHRX (LI8 4), $S)>;
1916 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 3)))),
1917 (VEXTUHRX (LI8 6), $S)>;
1918 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 4)))),
1919 (VEXTUHRX (LI8 8), $S)>;
1920 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 5)))),
1921 (VEXTUHRX (LI8 10), $S)>;
1922 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 6)))),
1923 (VEXTUHRX (LI8 12), $S)>;
1924 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 7)))),
1925 (VEXTUHRX (LI8 14), $S)>;
1926
1927 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, i64:$Idx)))),
1928 (VEXTUWRX (RLWINM8 $Idx, 2, 28, 29), $S)>;
1929 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 0)))),
1930 (VEXTUWRX (LI8 0), $S)>;
1931 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 1)))),
1932 (VEXTUWRX (LI8 4), $S)>;
1933 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 2)))),
1934 (VEXTUWRX (LI8 8), $S)>;
1935 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 3)))),
1936 (VEXTUWRX (LI8 12), $S)>;
1937
1938 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, i64:$Idx)))),
1939 (EXTSW (VEXTUWRX (RLWINM8 $Idx, 2, 28, 29), $S))>;
1940 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 0)))),
1941 (EXTSW (VEXTUWRX (LI8 0), $S))>;
1942 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 1)))),
1943 (EXTSW (VEXTUWRX (LI8 4), $S))>;
1944 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 2)))),
1945 (EXTSW (VEXTUWRX (LI8 8), $S))>;
1946 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 3)))),
1947 (EXTSW (VEXTUWRX (LI8 12), $S))>;
1948 }
1949 let Predicates = [HasP9Altivec, IsBigEndian] in {
1950 def : Pat<(i64 (anyext (i32 (vector_extract v16i8:$S, i64:$Idx)))),
1951 (VEXTUBLX $Idx, $S)>;
1952
1953 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, i64:$Idx)))),
1954 (VEXTUHLX (RLWINM8 $Idx, 1, 28, 30), $S)>;
1955 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 0)))),
1956 (VEXTUHLX (LI8 0), $S)>;
1957 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 1)))),
1958 (VEXTUHLX (LI8 2), $S)>;
1959 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 2)))),
1960 (VEXTUHLX (LI8 4), $S)>;
1961 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 3)))),
1962 (VEXTUHLX (LI8 6), $S)>;
1963 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 4)))),
1964 (VEXTUHLX (LI8 8), $S)>;
1965 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 5)))),
1966 (VEXTUHLX (LI8 10), $S)>;
1967 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 6)))),
1968 (VEXTUHLX (LI8 12), $S)>;
1969 def : Pat<(i64 (anyext (i32 (vector_extract v8i16:$S, 7)))),
1970 (VEXTUHLX (LI8 14), $S)>;
1971
1972 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, i64:$Idx)))),
1973 (VEXTUWLX (RLWINM8 $Idx, 2, 28, 29), $S)>;
1974 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 0)))),
1975 (VEXTUWLX (LI8 0), $S)>;
1976 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 1)))),
1977 (VEXTUWLX (LI8 4), $S)>;
1978 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 2)))),
1979 (VEXTUWLX (LI8 8), $S)>;
1980 def : Pat<(i64 (zext (i32 (vector_extract v4i32:$S, 3)))),
1981 (VEXTUWLX (LI8 12), $S)>;
1982
1983 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, i64:$Idx)))),
1984 (EXTSW (VEXTUWLX (RLWINM8 $Idx, 2, 28, 29), $S))>;
1985 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 0)))),
1986 (EXTSW (VEXTUWLX (LI8 0), $S))>;
1987 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 1)))),
1988 (EXTSW (VEXTUWLX (LI8 4), $S))>;
1989 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 2)))),
1990 (EXTSW (VEXTUWLX (LI8 8), $S))>;
1991 def : Pat<(i64 (sext (i32 (vector_extract v4i32:$S, 3)))),
1992 (EXTSW (VEXTUWLX (LI8 12), $S))>;
1993 }
1994
19031995 let Predicates = [IsLittleEndian, HasDirectMove] in {
19041996 // v16i8 scalar <-> vector conversions (LE)
19051997 def : Pat<(v16i8 (scalar_to_vector i32:$A)),
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck %s -check-prefix=CHECK-LE
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck %s -check-prefix=CHECK-BE
3
4 define zeroext i8 @test1(<16 x i8> %a, i32 signext %index) {
5 ; CHECK-LE-LABEL: test1:
6 ; CHECK-LE: # BB#0: # %entry
7 ; CHECK-LE-NEXT: vextubrx 3, 5, 2
8 ; CHECK-LE-NEXT: clrldi 3, 3, 56
9 ; CHECK-LE-NEXT: blr
10 ; CHECK-BE-LABEL: test1:
11 ; CHECK-BE: # BB#0: # %entry
12 ; CHECK-BE-NEXT: vextublx 3, 5, 2
13 ; CHECK-BE-NEXT: clrldi 3, 3, 56
14 ; CHECK-BE-NEXT: blr
15
16 entry:
17 %vecext = extractelement <16 x i8> %a, i32 %index
18 ret i8 %vecext
19 }
20
21 define signext i8 @test2(<16 x i8> %a, i32 signext %index) {
22 ; CHECK-LE-LABEL: test2:
23 ; CHECK-LE: # BB#0: # %entry
24 ; CHECK-LE-NEXT: vextubrx 3, 5, 2
25 ; CHECK-LE-NEXT: extsb 3, 3
26 ; CHECK-LE-NEXT: blr
27 ; CHECK-BE-LABEL: test2:
28 ; CHECK-BE: # BB#0: # %entry
29 ; CHECK-BE-NEXT: vextublx 3, 5, 2
30 ; CHECK-BE-NEXT: extsb 3, 3
31 ; CHECK-BE-NEXT: blr
32
33 entry:
34 %vecext = extractelement <16 x i8> %a, i32 %index
35 ret i8 %vecext
36 }
37
38 define zeroext i16 @test3(<8 x i16> %a, i32 signext %index) {
39 ; CHECK-LE-LABEL: test3:
40 ; CHECK-LE: # BB#0: # %entry
41 ; CHECK-LE-NEXT: rlwinm 3, 5, 1, 28, 30
42 ; CHECK-LE-NEXT: vextuhrx 3, 3, 2
43 ; CHECK-LE-NEXT: clrldi 3, 3, 48
44 ; CHECK-LE-NEXT: blr
45 ; CHECK-BE-LABEL: test3:
46 ; CHECK-BE: # BB#0: # %entry
47 ; CHECK-BE-NEXT: rlwinm 3, 5, 1, 28, 30
48 ; CHECK-BE-NEXT: vextuhlx 3, 3, 2
49 ; CHECK-BE-NEXT: clrldi 3, 3, 48
50 ; CHECK-BE-NEXT: blr
51
52 entry:
53 %vecext = extractelement <8 x i16> %a, i32 %index
54 ret i16 %vecext
55 }
56
57 define signext i16 @test4(<8 x i16> %a, i32 signext %index) {
58 ; CHECK-LE-LABEL: test4:
59 ; CHECK-LE: # BB#0: # %entry
60 ; CHECK-LE-NEXT: rlwinm 3, 5, 1, 28, 30
61 ; CHECK-LE-NEXT: vextuhrx 3, 3, 2
62 ; CHECK-LE-NEXT: extsh 3, 3
63 ; CHECK-LE-NEXT: blr
64 ; CHECK-BE-LABEL: test4:
65 ; CHECK-BE: # BB#0: # %entry
66 ; CHECK-BE-NEXT: rlwinm 3, 5, 1, 28, 30
67 ; CHECK-BE-NEXT: vextuhlx 3, 3, 2
68 ; CHECK-BE-NEXT: extsh 3, 3
69 ; CHECK-BE-NEXT: blr
70
71 entry:
72 %vecext = extractelement <8 x i16> %a, i32 %index
73 ret i16 %vecext
74 }
75
76 define zeroext i32 @test5(<4 x i32> %a, i32 signext %index) {
77 ; CHECK-LE-LABEL: test5:
78 ; CHECK-LE: # BB#0: # %entry
79 ; CHECK-LE-NEXT: rlwinm 3, 5, 2, 28, 29
80 ; CHECK-LE-NEXT: vextuwrx 3, 3, 2
81 ; CHECK-LE-NEXT: blr
82 ; CHECK-BE-LABEL: test5:
83 ; CHECK-BE: # BB#0: # %entry
84 ; CHECK-BE-NEXT: rlwinm 3, 5, 2, 28, 29
85 ; CHECK-BE-NEXT: vextuwlx 3, 3, 2
86 ; CHECK-BE-NEXT: blr
87
88 entry:
89 %vecext = extractelement <4 x i32> %a, i32 %index
90 ret i32 %vecext
91 }
92
93 define signext i32 @test6(<4 x i32> %a, i32 signext %index) {
94 ; CHECK-LE-LABEL: test6:
95 ; CHECK-LE: # BB#0: # %entry
96 ; CHECK-LE-NEXT: rlwinm 3, 5, 2, 28, 29
97 ; CHECK-LE-NEXT: vextuwrx 3, 3, 2
98 ; CHECK-LE-NEXT: extsw 3, 3
99 ; CHECK-LE-NEXT: blr
100 ; CHECK-BE-LABEL: test6:
101 ; CHECK-BE: # BB#0: # %entry
102 ; CHECK-BE-NEXT: rlwinm 3, 5, 2, 28, 29
103 ; CHECK-BE-NEXT: vextuwlx 3, 3, 2
104 ; CHECK-BE-NEXT: extsw 3, 3
105 ; CHECK-BE-NEXT: blr
106
107 entry:
108 %vecext = extractelement <4 x i32> %a, i32 %index
109 ret i32 %vecext
110 }
111
112 ; Test with immediate index
113 define zeroext i8 @test7(<16 x i8> %a) {
114 ; CHECK-LE-LABEL: test7:
115 ; CHECK-LE: # BB#0: # %entry
116 ; CHECK-LE-NEXT: li 3, 1
117 ; CHECK-LE-NEXT: vextubrx 3, 3, 2
118 ; CHECK-LE-NEXT: clrldi 3, 3, 56
119 ; CHECK-LE-NEXT: blr
120 ; CHECK-BE-LABEL: test7:
121 ; CHECK-BE: # BB#0: # %entry
122 ; CHECK-BE-NEXT: li 3, 1
123 ; CHECK-BE-NEXT: vextublx 3, 3, 2
124 ; CHECK-BE-NEXT: clrldi 3, 3, 56
125 ; CHECK-BE-NEXT: blr
126
127 entry:
128 %vecext = extractelement <16 x i8> %a, i32 1
129 ret i8 %vecext
130 }
131
132 define zeroext i16 @test8(<8 x i16> %a) {
133 ; CHECK-LE-LABEL: test8:
134 ; CHECK-LE: # BB#0: # %entry
135 ; CHECK-LE-NEXT: li 3, 2
136 ; CHECK-LE-NEXT: vextuhrx 3, 3, 2
137 ; CHECK-LE-NEXT: clrldi 3, 3, 48
138 ; CHECK-LE-NEXT: blr
139 ; CHECK-BE-LABEL: test8:
140 ; CHECK-BE: # BB#0: # %entry
141 ; CHECK-BE-NEXT: li 3, 2
142 ; CHECK-BE-NEXT: vextuhlx 3, 3, 2
143 ; CHECK-BE-NEXT: clrldi 3, 3, 48
144 ; CHECK-BE-NEXT: blr
145
146 entry:
147 %vecext = extractelement <8 x i16> %a, i32 1
148 ret i16 %vecext
149 }
150
151 define zeroext i32 @test9(<4 x i32> %a) {
152 ; CHECK-LE-LABEL: test9:
153 ; CHECK-LE: # BB#0: # %entry
154 ; CHECK-LE-NEXT: li 3, 4
155 ; CHECK-LE-NEXT: vextuwrx 3, 3, 2
156 ; CHECK-LE-NEXT: blr
157 ; CHECK-BE-LABEL: test9:
158 ; CHECK-BE: # BB#0: # %entry
159 ; CHECK-BE-NEXT: li 3, 4
160 ; CHECK-BE-NEXT: vextuwlx 3, 3, 2
161 ; CHECK-BE-NEXT: blr
162
163 entry:
164 %vecext = extractelement <4 x i32> %a, i32 1
165 ret i32 %vecext
166 }