llvm.org GIT mirror llvm / d0b82b3
Refactoring of formal parameter flags. Enable properly use of zext/sext/aext stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8 Anton Korobeynikov 13 years ago
12 changed file(s) with 73 addition(s) and 72 deletion(s). Raw diff Collapse all Expand all
2929 class TargetLowering;
3030 class FunctionLoweringInfo;
3131 class HazardRecognizer;
32
33 namespace SDISelParamFlags {
34 enum Flags {
35 NoFlagSet = 0,
36 Signed = 1<<0,
37 SignedOffs = 0,
38 InReg = 1<<1,
39 InRegOffs = 1,
40 StructReturn = 1<<2,
41 StructReturnOffs = 2,
42 OrigAlignment = 0x1F<<27,
43 OrigAlignmentOffs = 27
44 };
45 }
46
32
4733 /// SelectionDAGISel - This is the common base class used for SelectionDAG-based
4834 /// pattern-matching instruction selectors.
4935 class SelectionDAGISel : public FunctionPass {
4747 unsigned short NumVTs;
4848 };
4949
50
5150 /// ISD namespace - This namespace contains an enum which represents all of the
5251 /// SelectionDAG node types and value types.
5352 ///
5453 namespace ISD {
54 namespace ParamFlags {
55 enum Flags {
56 NoFlagSet = 0,
57 ZExt = 1<<0, ///< Parameter should be zero extended
58 ZExtOffs = 0,
59 SExt = 1<<1, ///< Parameter should be sign extended
60 SExtOffs = 1,
61 InReg = 1<<2, ///< Parameter should be passed in register
62 InRegOffs = 2,
63 StructReturn = 1<<3, ///< Hidden struct-return pointer
64 StructReturnOffs = 3,
65 OrigAlignment = 0x1F<<27,
66 OrigAlignmentOffs = 27
67 };
68 }
69
5570 //===--------------------------------------------------------------------===//
5671 /// ISD::NodeType enum - This enum defines all of the operators valid in a
5772 /// SelectionDAG.
764764 struct ArgListEntry {
765765 SDOperand Node;
766766 const Type* Ty;
767 bool isSigned;
767 bool isSExt;
768 bool isZExt;
768769 bool isInReg;
769770 bool isSRet;
770771
771 ArgListEntry():isSigned(false), isInReg(false), isSRet(false) { };
772 ArgListEntry():isSExt(false), isZExt(false), isInReg(false), isSRet(false) { };
772773 };
773774 typedef std::vector ArgListTy;
774775 virtual std::pair
22412241
22422242 const char *FnName = 0;
22432243 if (Node->getOpcode() == ISD::MEMSET) {
2244 Entry.Node = Tmp2; Entry.isSigned = false; Entry.Ty = IntPtrTy;
2245 Entry.isInReg = false; Entry.isSRet = false;
2244 Entry.Node = Tmp2; Entry.Ty = IntPtrTy;
22462245 Args.push_back(Entry);
22472246 // Extend the (previously legalized) ubyte argument to be an int value
22482247 // for the call.
22502249 Tmp3 = DAG.getNode(ISD::TRUNCATE, MVT::i32, Tmp3);
22512250 else
22522251 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3);
2253 Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSigned = true;
2254 Entry.isInReg = false; Entry.isSRet = false;
2252 Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
22552253 Args.push_back(Entry);
2256 Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false;
2254 Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSExt = false;
22572255 Args.push_back(Entry);
22582256
22592257 FnName = "memset";
22602258 } else if (Node->getOpcode() == ISD::MEMCPY ||
22612259 Node->getOpcode() == ISD::MEMMOVE) {
22622260 Entry.Ty = IntPtrTy;
2263 Entry.isSigned = false; Entry.isInReg = false; Entry.isSRet = false;
22642261 Entry.Node = Tmp2; Args.push_back(Entry);
22652262 Entry.Node = Tmp3; Args.push_back(Entry);
22662263 Entry.Node = Tmp4; Args.push_back(Entry);
42274224 MVT::ValueType ArgVT = Node->getOperand(i).getValueType();
42284225 const Type *ArgTy = MVT::getTypeForValueType(ArgVT);
42294226 Entry.Node = Node->getOperand(i); Entry.Ty = ArgTy;
4230 Entry.isSigned = isSigned; Entry.isInReg = false; Entry.isSRet = false;
4227 Entry.isSExt = isSigned;
42314228 Args.push_back(Entry);
42324229 }
42334230 SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy());
22782278 Value *Arg = I.getOperand(i);
22792279 SDOperand ArgNode = getValue(Arg);
22802280 Entry.Node = ArgNode; Entry.Ty = Arg->getType();
2281 Entry.isSigned = FTy->paramHasAttr(i, FunctionType::SExtAttribute);
2281 Entry.isSExt = FTy->paramHasAttr(i, FunctionType::SExtAttribute);
2282 Entry.isZExt = FTy->paramHasAttr(i, FunctionType::ZExtAttribute);
22822283 Entry.isInReg = FTy->paramHasAttr(i, FunctionType::InRegAttribute);
22832284 Entry.isSRet = FTy->paramHasAttr(i, FunctionType::StructRetAttribute);
22842285 Args.push_back(Entry);
29822983 TargetLowering::ArgListEntry Entry;
29832984 Entry.Node = Src;
29842985 Entry.Ty = TLI.getTargetData()->getIntPtrType();
2985 Entry.isSigned = false;
2986 Entry.isInReg = false;
2987 Entry.isSRet = false;
29882986 Args.push_back(Entry);
29892987
29902988 std::pair Result =
30002998 TargetLowering::ArgListEntry Entry;
30012999 Entry.Node = getValue(I.getOperand(0));
30023000 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3003 Entry.isSigned = false;
3004 Entry.isInReg = false;
3005 Entry.isSRet = false;
30063001 Args.push_back(Entry);
30073002 MVT::ValueType IntPtr = TLI.getPointerTy();
30083003 std::pair Result =
30983093 for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
30993094 I != E; ++I, ++j) {
31003095 MVT::ValueType VT = getValueType(I->getType());
3101 unsigned Flags = SDISelParamFlags::NoFlagSet;
3096 unsigned Flags = ISD::ParamFlags::NoFlagSet;
31023097 unsigned OriginalAlignment =
31033098 getTargetData()->getABITypeAlignment(I->getType());
31043099
31053100 // FIXME: Distinguish between a formal with no [sz]ext attribute from one
31063101 // that is zero extended!
31073102 if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute))
3108 Flags &= ~(SDISelParamFlags::Signed);
3103 Flags &= ~(ISD::ParamFlags::SExt);
31093104 if (FTy->paramHasAttr(j, FunctionType::SExtAttribute))
3110 Flags |= SDISelParamFlags::Signed;
3105 Flags |= ISD::ParamFlags::SExt;
31113106 if (FTy->paramHasAttr(j, FunctionType::InRegAttribute))
3112 Flags |= SDISelParamFlags::InReg;
3107 Flags |= ISD::ParamFlags::InReg;
31133108 if (FTy->paramHasAttr(j, FunctionType::StructRetAttribute))
3114 Flags |= SDISelParamFlags::StructReturn;
3115 Flags |= (OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs);
3109 Flags |= ISD::ParamFlags::StructReturn;
3110 Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs);
31163111
31173112 switch (getTypeAction(VT)) {
31183113 default: assert(0 && "Unknown type action!");
31353130 RetVals.push_back(NVT);
31363131 // if it isn't first piece, alignment must be 1
31373132 if (i > 0)
3138 Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) |
3139 (1 << SDISelParamFlags::OrigAlignmentOffs);
3133 Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) |
3134 (1 << ISD::ParamFlags::OrigAlignmentOffs);
31403135 Ops.push_back(DAG.getConstant(Flags, MVT::i32));
31413136 }
31423137 } else {
32453240 if (TLI.getTypeAction(VT) != TargetLowering::Expand) {
32463241 // if it isn't first piece, alignment must be 1
32473242 if (!isFirst)
3248 Flags = (Flags & (~SDISelParamFlags::OrigAlignment)) |
3249 (1 << SDISelParamFlags::OrigAlignmentOffs);
3243 Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) |
3244 (1 << ISD::ParamFlags::OrigAlignmentOffs);
32503245 Ops.push_back(Arg);
32513246 Ops.push_back(DAG.getConstant(Flags, MVT::i32));
32523247 return;
32933288 for (unsigned i = 0, e = Args.size(); i != e; ++i) {
32943289 MVT::ValueType VT = getValueType(Args[i].Ty);
32953290 SDOperand Op = Args[i].Node;
3296 unsigned Flags = SDISelParamFlags::NoFlagSet;
3291 unsigned Flags = ISD::ParamFlags::NoFlagSet;
32973292 unsigned OriginalAlignment =
32983293 getTargetData()->getABITypeAlignment(Args[i].Ty);
32993294
3300 if (Args[i].isSigned)
3301 Flags |= SDISelParamFlags::Signed;
3295 if (Args[i].isSExt)
3296 Flags |= ISD::ParamFlags::SExt;
3297 if (Args[i].isZExt)
3298 Flags |= ISD::ParamFlags::ZExt;
33023299 if (Args[i].isInReg)
3303 Flags |= SDISelParamFlags::InReg;
3300 Flags |= ISD::ParamFlags::InReg;
33043301 if (Args[i].isSRet)
3305 Flags |= SDISelParamFlags::StructReturn;
3306 Flags |= OriginalAlignment << SDISelParamFlags::OrigAlignmentOffs;
3302 Flags |= ISD::ParamFlags::StructReturn;
3303 Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs;
33073304
33083305 switch (getTypeAction(VT)) {
33093306 default: assert(0 && "Unknown type action!");
33133310 break;
33143311 case Promote:
33153312 if (MVT::isInteger(VT)) {
3316 unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
3313 unsigned ExtOp;
3314 if (Args[i].isSExt)
3315 ExtOp = ISD::SIGN_EXTEND;
3316 else if (Args[i].isZExt)
3317 ExtOp = ISD::ZERO_EXTEND;
3318 else
3319 ExtOp = ISD::ANY_EXTEND;
33173320 Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op);
33183321 } else {
33193322 assert(MVT::isFloatingPoint(VT) && "Not int or FP?");
2626 #include "llvm/CodeGen/MachineFunction.h"
2727 #include "llvm/CodeGen/MachineInstrBuilder.h"
2828 #include "llvm/CodeGen/SelectionDAG.h"
29 #include "llvm/CodeGen/SelectionDAGISel.h"
3029 #include "llvm/CodeGen/SSARegMap.h"
3130 #include "llvm/Target/TargetOptions.h"
3231 #include "llvm/ADT/VectorExtras.h"
346345 NeededGPRs = 0;
347346 StackPad = 0;
348347 GPRPad = 0;
349 unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs);
348 unsigned align = (Flags >> ISD::ParamFlags::OrigAlignmentOffs);
350349 GPRPad = NumGPRs % ((align + 3)/4);
351350 StackPad = StackOffset % align;
352351 unsigned firstGPR = NumGPRs + GPRPad;
336336 case MVT::i32:
337337 // Promote the integer to 64 bits. If the input type is signed use a
338338 // sign extend, otherwise use a zero extend.
339 if (Args[i].isSigned)
339 if (Args[i].isSExt)
340340 Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].Node);
341 else if (Args[i].isZExt)
342 Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node);
341343 else
342 Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node);
344 Args[i].Node = DAG.getNode(ISD::ANY_EXTEND, MVT::i64, Args[i].Node);
343345 break;
344346 case MVT::i64:
345347 case MVT::f64:
340340 case MVT::i32: {
341341 //promote to 64-bits, sign/zero extending based on type
342342 //of the argument
343 ISD::NodeType ExtendKind = ISD::ZERO_EXTEND;
344 if (Args[i].isSigned)
343 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
344 if (Args[i].isSExt)
345345 ExtendKind = ISD::SIGN_EXTEND;
346 else if (Args[i].isZExt)
347 ExtendKind = ISD::ZERO_EXTEND;
346348 Val = DAG.getNode(ExtendKind, MVT::i64, Val);
347349 // XXX: fall through
348350 }
515515 case MVT::i16: {
516516 // Promote the integer to 32-bits. If the input type is signed, use a
517517 // sign extend, otherwise use a zero extend.
518 ISD::NodeType ExtendKind = ISD::ZERO_EXTEND;
519 if (Args[i].isSigned)
518 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
519 if (Args[i].isSExt)
520520 ExtendKind = ISD::SIGN_EXTEND;
521 else if (Args[i].isZExt)
522 ExtendKind = ISD::ZERO_EXTEND;
521523 Val = DAG.getNode(ExtendKind, MVT::i32, Val);
522524 // FALL THROUGH
523525 }
3737
3838 /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply
3939 /// the specified action.
40 class CCIfInReg : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {}
40 class CCIfInReg : CCIf<"ArgFlags & ISD::ParamFlags::InReg", A> {}
4141
4242
4343 /// CCAssignToReg - This action matches if there is a register in the specified
2828 #include "llvm/CodeGen/MachineFunction.h"
2929 #include "llvm/CodeGen/MachineInstrBuilder.h"
3030 #include "llvm/CodeGen/SelectionDAG.h"
31 #include "llvm/CodeGen/SelectionDAGISel.h"
3231 #include "llvm/CodeGen/SSARegMap.h"
3332 #include "llvm/Support/MathExtras.h"
3433 #include "llvm/Target/TargetOptions.h"
676675 // If this is an sret function, the return should pop the hidden pointer.
677676 if (NumArgs &&
678677 (cast(Op.getOperand(3))->getValue() &
679 SDISelParamFlags::StructReturn))
678 ISD::ParamFlags::StructReturn))
680679 BytesToPopOnReturn = 4;
681680
682681 BytesCallerReserves = StackSize;
750749 // If the first argument is an sret pointer, remember it.
751750 bool isSRet = NumOps &&
752751 (cast(Op.getOperand(6))->getValue() &
753 SDISelParamFlags::StructReturn);
752 ISD::ParamFlags::StructReturn);
754753
755754 if (!MemOpChains.empty())
756755 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
34073406 TargetLowering::ArgListEntry Entry;
34083407 Entry.Node = Op.getOperand(1);
34093408 Entry.Ty = IntPtrTy;
3410 Entry.isSigned = false;
3411 Entry.isInReg = false;
3412 Entry.isSRet = false;
34133409 Args.push_back(Entry);
34143410 // Extend the unsigned i8 argument to be an int value for the call.
34153411 Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2));
34163412 Entry.Ty = IntPtrTy;
3417 Entry.isSigned = false;
3418 Entry.isInReg = false;
3419 Entry.isSRet = false;
34203413 Args.push_back(Entry);
34213414 Entry.Node = Op.getOperand(3);
34223415 Args.push_back(Entry);
35673560 TargetLowering::ArgListTy Args;
35683561 TargetLowering::ArgListEntry Entry;
35693562 Entry.Ty = getTargetData()->getIntPtrType();
3570 Entry.isSigned = false;
3571 Entry.isInReg = false;
3572 Entry.isSRet = false;
35733563 Entry.Node = Op.getOperand(1); Args.push_back(Entry);
35743564 Entry.Node = Op.getOperand(2); Args.push_back(Entry);
35753565 Entry.Node = Op.getOperand(3); Args.push_back(Entry);
122122 } else if (Action->isSubClassOf("CCPromoteToType")) {
123123 Record *DestTy = Action->getValueAsDef("DestTy");
124124 O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n";
125 O << IndentStr << "LocInfo = (ArgFlags & SDISelParamFlags::Signed) ? \n"
126 << IndentStr << IndentStr << "CCValAssign::SExt : CCValAssign::ZExt;\n";
125 O << IndentStr << "if (ArgFlags & ISD::ParamFlags::SExt)\n"
126 << IndentStr << IndentStr << "LocInfo = CCValAssign::SExt;\n"
127 << IndentStr << "else if (ArgFlags & ISD::ParamFlags::ZExt)\n"
128 << IndentStr << IndentStr << "LocInfo = CCValAssign::ZExt;\n"
129 << IndentStr << "else\n"
130 << IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n";
127131 } else {
128132 Action->dump();
129133 throw "Unknown CCAction!";