llvm.org GIT mirror llvm / cfce1b9
[MemCpyOpt] Don't emit IR in an unspecified order Argument evaluation order is one of the edge cases where Clang differs from GCC, yielding different IR depending on which compiler LLVM was built with. Make the order deterministic and tune the test to actually verify the order instead of trying to hide it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286126 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 3 years ago
2 changed file(s) with 32 addition(s) and 32 deletion(s). Raw diff Collapse all Expand all
10791079 DestSize = Builder.CreateZExt(DestSize, SrcSize->getType());
10801080 }
10811081
1082 Value *MemsetLen =
1083 Builder.CreateSelect(Builder.CreateICmpULE(DestSize, SrcSize),
1084 ConstantInt::getNullValue(DestSize->getType()),
1085 Builder.CreateSub(DestSize, SrcSize));
1082 Value *Ule = Builder.CreateICmpULE(DestSize, SrcSize);
1083 Value *SizeDiff = Builder.CreateSub(DestSize, SrcSize);
1084 Value *MemsetLen = Builder.CreateSelect(
1085 Ule, ConstantInt::getNullValue(DestSize->getType()), SizeDiff);
10861086 Builder.CreateMemSet(Builder.CreateGEP(Dest, SrcSize), MemSet->getOperand(1),
10871087 MemsetLen, Align);
10881088
22 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
33
44 ; CHECK-LABEL: define void @test
5 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
6 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
7 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, %src_size
8 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
5 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
6 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, %src_size
7 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
8 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
99 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[DST]], i8 %c, i64 [[SIZE]], i32 1, i1 false)
1010 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %src_size, i32 1, i1 false)
1111 ; CHECK-NEXT: ret void
1616 }
1717
1818 ; CHECK-LABEL: define void @test_different_types_i32_i64
19 ; CHECK-DAG: [[DSTSIZE:%[0-9]+]] = zext i32 %dst_size to i64
20 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
21 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 [[DSTSIZE]], %src_size
22 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i64 [[DSTSIZE]], %src_size
23 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
19 ; CHECK: [[DSTSIZE:%[0-9]+]] = zext i32 %dst_size to i64
20 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i64 [[DSTSIZE]], %src_size
21 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i64 [[DSTSIZE]], %src_size
22 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
23 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
2424 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[DST]], i8 %c, i64 [[SIZE]], i32 1, i1 false)
2525 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %src_size, i32 1, i1 false)
2626 ; CHECK-NEXT: ret void
3131 }
3232
3333 ; CHECK-LABEL: define void @test_different_types_i128_i32
34 ; CHECK-DAG: [[SRCSIZE:%[0-9]+]] = zext i32 %src_size to i128
35 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i128 [[SRCSIZE]]
36 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i128 %dst_size, [[SRCSIZE]]
37 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i128 %dst_size, [[SRCSIZE]]
38 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i128 0, i128 [[SIZEDIFF]]
34 ; CHECK: [[SRCSIZE:%[0-9]+]] = zext i32 %src_size to i128
35 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i128 %dst_size, [[SRCSIZE]]
36 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i128 %dst_size, [[SRCSIZE]]
37 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i128 0, i128 [[SIZEDIFF]]
38 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i128 [[SRCSIZE]]
3939 ; CHECK-NEXT: call void @llvm.memset.p0i8.i128(i8* [[DST]], i8 %c, i128 [[SIZE]], i32 1, i1 false)
4040 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %src_size, i32 1, i1 false)
4141 ; CHECK-NEXT: ret void
4646 }
4747
4848 ; CHECK-LABEL: define void @test_different_types_i32_i128
49 ; CHECK-DAG: [[DSTSIZE:%[0-9]+]] = zext i32 %dst_size to i128
50 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i128 %src_size
51 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i128 [[DSTSIZE]], %src_size
52 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i128 [[DSTSIZE]], %src_size
53 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i128 0, i128 [[SIZEDIFF]]
49 ; CHECK: [[DSTSIZE:%[0-9]+]] = zext i32 %dst_size to i128
50 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i128 [[DSTSIZE]], %src_size
51 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i128 [[DSTSIZE]], %src_size
52 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i128 0, i128 [[SIZEDIFF]]
53 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i128 %src_size
5454 ; CHECK-NEXT: call void @llvm.memset.p0i8.i128(i8* [[DST]], i8 %c, i128 [[SIZE]], i32 1, i1 false)
5555 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i128(i8* %dst, i8* %src, i128 %src_size, i32 1, i1 false)
5656 ; CHECK-NEXT: ret void
6161 }
6262
6363 ; CHECK-LABEL: define void @test_different_types_i64_i32
64 ; CHECK-DAG: [[SRCSIZE:%[0-9]+]] = zext i32 %src_size to i64
65 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 [[SRCSIZE]]
66 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, [[SRCSIZE]]
67 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, [[SRCSIZE]]
68 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
64 ; CHECK: [[SRCSIZE:%[0-9]+]] = zext i32 %src_size to i64
65 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, [[SRCSIZE]]
66 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, [[SRCSIZE]]
67 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
68 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 [[SRCSIZE]]
6969 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[DST]], i8 %c, i64 [[SIZE]], i32 1, i1 false)
7070 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %src_size, i32 1, i1 false)
7171 ; CHECK-NEXT: ret void
101101
102102 ; CHECK-LABEL: define void @test_non_i8_dst_type
103103 ; CHECK-NEXT: %dst = bitcast i64* %dst_pi64 to i8*
104 ; CHECK-DAG: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
105 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
106 ; CHECK-DAG: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, %src_size
107 ; CHECK-DAG: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
104 ; CHECK: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
105 ; CHECK: [[SIZEDIFF:%[0-9]+]] = sub i64 %dst_size, %src_size
106 ; CHECK: [[SIZE:%[0-9]+]] = select i1 [[ULE]], i64 0, i64 [[SIZEDIFF]]
107 ; CHECK: [[DST:%[0-9]+]] = getelementptr i8, i8* %dst, i64 %src_size
108108 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[DST]], i8 %c, i64 [[SIZE]], i32 1, i1 false)
109109 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %src_size, i32 1, i1 false)
110110 ; CHECK-NEXT: ret void