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Merging r226945: ------------------------------------------------------------------------ r226945 | thomas.stellard | 2015-01-23 17:05:45 -0500 (Fri, 23 Jan 2015) | 9 lines R600/SI: Move i64 -> v2i32 load promotion into AMDGPUDAGToDAGISel::Select() We used to do this promotion during DAG legalization, but this caused an infinite loop in ExpandUnalignedLoad() because it assumed that i64 loads were legal if i64 was a legal type. It also seems better to report i64 loads as legal, since they actually are and we were just promoting them to simplify our tablegen files. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@227364 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 4 years ago
3 changed file(s) with 40 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
416416 N->getValueType(0), Ops);
417417 }
418418
419 case ISD::LOAD: {
420 // To simplify the TableGen patters, we replace all i64 loads with
421 // v2i32 loads. Alternatively, we could promote i64 loads to v2i32
422 // during DAG legalization, however, so places (ExpandUnalignedLoad)
423 // in the DAG legalizer assume that if i64 is legal, so doing this
424 // promotion early can cause problems.
425 EVT VT = N->getValueType(0);
426 LoadSDNode *LD = cast(N);
427 if (VT != MVT::i64 || LD->getExtensionType() != ISD::NON_EXTLOAD)
428 break;
429
430 SDValue NewLoad = CurDAG->getLoad(MVT::v2i32, SDLoc(N), LD->getChain(),
431 LD->getBasePtr(), LD->getMemOperand());
432 SDValue BitCast = CurDAG->getNode(ISD::BITCAST, SDLoc(N),
433 MVT::i64, NewLoad);
434 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 1), NewLoad.getValue(1));
435 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), BitCast);
436 SelectCode(NewLoad.getNode());
437 N = BitCast.getNode();
438 break;
439 }
440
419441 case AMDGPUISD::REGISTER_LOAD: {
420442 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS)
421443 break;
185185
186186 setOperationAction(ISD::LOAD, MVT::v2f32, Promote);
187187 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32);
188
189 setOperationAction(ISD::LOAD, MVT::i64, Promote);
190 AddPromotedToType(ISD::LOAD, MVT::i64, MVT::v2i32);
191188
192189 setOperationAction(ISD::LOAD, MVT::v4f32, Promote);
193190 AddPromotedToType(ISD::LOAD, MVT::v4f32, MVT::v4i32);
0 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
1
2 ; SI: @byte_aligned_load64
3 ; SI: ds_read_u8
4 ; SI: ds_read_u8
5 ; SI: ds_read_u8
6 ; SI: ds_read_u8
7 ; SI: ds_read_u8
8 ; SI: ds_read_u8
9 ; SI: ds_read_u8
10 ; SI: ds_read_u8
11 ; SI: s_endpgm
12 define void @byte_aligned_load64(i64 addrspace(1)* %out, i64 addrspace(3)* %in) {
13 entry:
14 %0 = load i64 addrspace(3)* %in, align 1
15 store i64 %0, i64 addrspace(1)* %out
16 ret void
17 }