llvm.org GIT mirror llvm / cef670a
Rip out emission of the regIsInRegClass function for the asm printer. It's slow, bloated and completely redundant with MCRegisterClass::contains. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153782 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 8 years ago
3 changed file(s) with 4 addition(s) and 68 deletion(s). Raw diff Collapse all Expand all
1818 #include "llvm/MC/MCInst.h"
1919 #include "llvm/MC/MCAsmInfo.h"
2020 #include "llvm/MC/MCExpr.h"
21 #include "llvm/MC/MCRegisterInfo.h"
2122 #include "llvm/Support/ErrorHandling.h"
2223 #include "llvm/Support/Format.h"
2324 #include "llvm/Support/FormattedStream.h"
704704 O << "}\n\n";
705705 }
706706
707 void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
708 CodeGenTarget Target(Records);
709
710 // Enumerate the register classes.
711 ArrayRef RegisterClasses =
712 Target.getRegBank().getRegClasses();
713
714 O << "namespace { // Register classes\n";
715 O << " enum RegClass {\n";
716
717 // Emit the register enum value for each RegisterClass.
718 for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) {
719 if (I != 0) O << ",\n";
720 O << " RC_" << RegisterClasses[I]->getName();
721 }
722
723 O << "\n };\n";
724 O << "} // end anonymous namespace\n\n";
725
726 // Emit a function that returns 'true' if a regsiter is part of a particular
727 // register class. I.e., RAX is part of GR64 on X86.
728 O << "static bool regIsInRegisterClass"
729 << "(unsigned RegClass, unsigned Reg) {\n";
730
731 // Emit the switch that checks if a register belongs to a particular register
732 // class.
733 O << " switch (RegClass) {\n";
734 O << " default: break;\n";
735
736 for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) {
737 const CodeGenRegisterClass &RC = *RegisterClasses[I];
738
739 // Give the register class a legal C name if it's anonymous.
740 std::string Name = RC.getName();
741 O << " case RC_" << Name << ":\n";
742
743 // Emit the register list now.
744 unsigned IE = RC.getOrder().size();
745 if (IE == 1) {
746 O << " if (Reg == " << getQualifiedName(RC.getOrder()[0]) << ")\n";
747 O << " return true;\n";
748 } else {
749 O << " switch (Reg) {\n";
750 O << " default: break;\n";
751
752 for (unsigned II = 0; II != IE; ++II) {
753 Record *Reg = RC.getOrder()[II];
754 O << " case " << getQualifiedName(Reg) << ":\n";
755 }
756
757 O << " return true;\n";
758 O << " }\n";
759 }
760
761 O << " break;\n";
762 }
763
764 O << " }\n\n";
765 O << " return false;\n";
766 O << "}\n\n";
767 }
768
769707 static unsigned CountNumOperands(StringRef AsmString) {
770708 unsigned NumOps = 0;
771709 std::pair ASM = AsmString.split(' ');
808746
809747 O << "\n#ifdef PRINT_ALIAS_INSTR\n";
810748 O << "#undef PRINT_ALIAS_INSTR\n\n";
811
812 EmitRegIsInRegClass(O);
813749
814750 // Emit the method that prints the alias instruction.
815751 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
876812
877813 if (!IAP->isOpMapped(ROName)) {
878814 IAP->addOperand(ROName, i);
879 Cond = std::string("regIsInRegisterClass(RC_") +
880 CGA->ResultOperands[i].getRecord()->getName() +
881 ", MI->getOperand(" + llvm::utostr(i) + ").getReg())";
815 Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
816 CGA->ResultOperands[i].getRecord()->getName() + "RegClassID)"
817 ".contains(MI->getOperand(" + llvm::utostr(i) + ").getReg())";
882818 IAP->addCond(Cond);
883819 } else {
884820 Cond = std::string("MI->getOperand(") +
3737 void EmitPrintInstruction(raw_ostream &o);
3838 void EmitGetRegisterName(raw_ostream &o);
3939 void EmitGetInstructionName(raw_ostream &o);
40 void EmitRegIsInRegClass(raw_ostream &O);
4140 void EmitPrintAliasInstruction(raw_ostream &O);
4241
4342 AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {