llvm.org GIT mirror llvm / ce734d5
Fix a bug in the ARM disassembler for wide branch conditional instructions where the symbolic operand's displacement was incorrectly shifted left by 1. rdar://11387046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156212 91177308-0d34-0410-b5e6-96231b3b80d8 Kevin Enderby 8 years ago
1 changed file(s) with 1 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
30153015
30163016 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
30173017 uint64_t Address, const void *Decoder) {
3018 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val<<1) + 4,
3018 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val) + 4,
30193019 true, 4, Inst, Decoder))
30203020 Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
30213021 return MCDisassembler::Success;