llvm.org GIT mirror llvm / ce52d84
gn build: Simplify Target build files Now that the cycle between MCTargetDesc and TargetInfo is gone (see revisions 360709 360718 360722 360724 360726 360731 360733 360735 360736), remove the dependency from TargetInfo on MCTargetDesc:tablegen. In most targets, this makes MCTargetDesc:tablegen have just a single use, so inline it there. For AArch64, ARM, and RISCV there's still a similar cycle between MCTargetDesc and Utils, so the MCTargetDesc:tablegen indirection is still needed there. Differential Revision: https://reviews.llvm.org/D63200 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363436 91177308-0d34-0410-b5e6-96231b3b80d8 Nico Weber a month ago
21 changed file(s) with 73 addition(s) and 159 deletion(s). Raw diff Collapse all Expand all
4444 group("tablegen") {
4545 visibility = [
4646 ":MCTargetDesc",
47 "../TargetInfo",
4847 "../Utils",
4948 ]
5049 public_deps = [
11 output_name = "LLVMAArch64Info"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [
1212 ]
1313 deps = [
1414 "//llvm/lib/Support",
15
16 # MCTargetDesc depends on Utils, so we can't depend on the full
17 # MCTargetDesc target here: it would form a cycle.
1518 "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
1619 ]
1720
3535 group("tablegen") {
3636 visibility = [
3737 ":MCTargetDesc",
38 "../TargetInfo",
3938 "../Utils",
4039 ]
4140 public_deps = [
4443 ":ARMGenSubtargetInfo",
4544 ]
4645 }
46
4747 static_library("MCTargetDesc") {
4848 output_name = "LLVMARMDesc"
4949 public_deps = [
11 output_name = "LLVMARMInfo"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/ARM/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [
1212 ]
1313 deps = [
1414 "//llvm/lib/Support",
15
16 # MCTargetDesc depends on Utils, so we can't depend on the full
17 # MCTargetDesc target here: it would form a cycle.
1518 "//llvm/lib/Target/ARM/MCTargetDesc:tablegen",
1619 ]
1720
66 }
77
88 tablegen("BPFGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../BPF.td"
1212 }
1818 }
1919
2020 tablegen("BPFGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../BPF.td"
2424 }
2525
2626 tablegen("BPFGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../BPF.td"
3030 }
3131
32 # This should contain tablegen targets generating .inc files included
33 # by other targets. .inc files only used by .cpp files in this directory
34 # should be in deps on the static_library instead.
35 group("tablegen") {
36 visibility = [
37 ":MCTargetDesc",
38 "../TargetInfo",
39 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMBPFDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
4038 public_deps = [
4139 ":BPFGenInstrInfo",
4240 ":BPFGenRegisterInfo",
4341 ":BPFGenSubtargetInfo",
44 ]
45 }
46
47 static_library("MCTargetDesc") {
48 output_name = "LLVMBPFDesc"
49 public_deps = [
50 ":tablegen",
5142 ]
5243 deps = [
5344 ":BPFGenAsmWriter",
11 output_name = "LLVMBPFInfo"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/BPF/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [
66 }
77
88 tablegen("HexagonGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../Hexagon.td"
1212 }
1818 }
1919
2020 tablegen("HexagonGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../Hexagon.td"
2424 }
2525
2626 tablegen("HexagonGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../Hexagon.td"
3030 }
3131
32 group("tablegen") {
33 visibility = [
34 ":MCTargetDesc",
35 "../TargetInfo",
36 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMHexagonDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
3738 public_deps = [
3839 ":HexagonGenInstrInfo",
3940 ":HexagonGenRegisterInfo",
4041 ":HexagonGenSubtargetInfo",
41 ]
42 }
43
44 static_library("MCTargetDesc") {
45 output_name = "LLVMHexagonDesc"
46 public_deps = [
47 ":tablegen",
4842 ]
4943 deps = [
5044 ":HexagonGenAsmWriter",
0 static_library("TargetInfo") {
11 output_name = "LLVMHexagonInfo"
22 deps = [
3 "//llvm/lib/IR",
43 "//llvm/lib/Support",
5
6 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
7 # MCTargetDesc target here: it would form a cycle.
8 "//llvm/lib/Target/Hexagon/MCTargetDesc:tablegen",
94 ]
105 include_dirs = [ ".." ]
116 sources = [
66 }
77
88 tablegen("LanaiGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../Lanai.td"
1212 }
1818 }
1919
2020 tablegen("LanaiGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../Lanai.td"
2424 }
2525
2626 tablegen("LanaiGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../Lanai.td"
3030 }
3131
32 # This should contain tablegen targets generating .inc files included
33 # by other targets. .inc files only used by .cpp files in this directory
34 # should be in deps on the static_library instead.
35 group("tablegen") {
36 visibility = [
37 ":MCTargetDesc",
38 "../TargetInfo",
39 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMLanaiDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
4038 public_deps = [
4139 ":LanaiGenInstrInfo",
4240 ":LanaiGenRegisterInfo",
4341 ":LanaiGenSubtargetInfo",
44 ]
45 }
46
47 static_library("MCTargetDesc") {
48 output_name = "LLVMLanaiDesc"
49 public_deps = [
50 ":tablegen",
5142 ]
5243 deps = [
5344 ":LanaiGenAsmWriter",
0 static_library("TargetInfo") {
11 output_name = "LLVMLanaiInfo"
22 deps = [
3 "//llvm/lib/IR",
43 "//llvm/lib/Support",
54 ]
65 include_dirs = [ ".." ]
66 }
77
88 tablegen("PPCGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../PPC.td"
1212 }
1818 }
1919
2020 tablegen("PPCGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../PPC.td"
2424 }
2525
2626 tablegen("PPCGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../PPC.td"
3030 }
3131
32 # This should contain tablegen targets generating .inc files included
33 # by other targets. .inc files only used by .cpp files in this directory
34 # should be in deps on the static_library instead.
35 group("tablegen") {
36 visibility = [
37 ":MCTargetDesc",
38 "../InstPrinter",
39 "../TargetInfo",
40 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMPowerPCDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
4138 public_deps = [
4239 ":PPCGenInstrInfo",
4340 ":PPCGenRegisterInfo",
4441 ":PPCGenSubtargetInfo",
45 ]
46 }
47
48 static_library("MCTargetDesc") {
49 output_name = "LLVMPowerPCDesc"
50 public_deps = [
51 ":tablegen",
5242 ]
5343 deps = [
5444 ":PPCGenAsmWriter",
11 output_name = "LLVMPowerPCInfo"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/PowerPC/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [
1313 deps = [
1414 "//llvm/lib/MC",
1515 "//llvm/lib/Support",
16
17 # MCTargetDesc depends on Utils, so we can't depend on the full
18 # MCTargetDesc target here: it would form a cycle.
1619 "//llvm/lib/Target/RISCV/MCTargetDesc:tablegen",
1720 ]
1821
66 }
77
88 tablegen("SparcGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../Sparc.td"
1212 }
1818 }
1919
2020 tablegen("SparcGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../Sparc.td"
2424 }
2525
2626 tablegen("SparcGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../Sparc.td"
3030 }
3131
32 # This should contain tablegen targets generating .inc files included
33 # by other targets. .inc files only used by .cpp files in this directory
34 # should be in deps on the static_library instead.
35 group("tablegen") {
36 visibility = [
37 ":MCTargetDesc",
38 "../TargetInfo",
39 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMSparcDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
4038 public_deps = [
4139 ":SparcGenInstrInfo",
4240 ":SparcGenRegisterInfo",
4341 ":SparcGenSubtargetInfo",
44 ]
45 }
46
47 static_library("MCTargetDesc") {
48 output_name = "LLVMSparcDesc"
49 public_deps = [
50 ":tablegen",
5142 ]
5243 deps = [
5344 ":SparcGenAsmWriter",
0 static_library("TargetInfo") {
11 output_name = "LLVMSparcInfo"
22 deps = [
3 "//llvm/lib/IR",
43 "//llvm/lib/Support",
5 "//llvm/lib/Target/Sparc/MCTargetDesc",
64 ]
75 include_dirs = [ ".." ]
86 sources = [
66 }
77
88 tablegen("WebAssemblyGenInstrInfo") {
9 visibility = [ ":tablegen" ]
9 visibility = [ ":MCTargetDesc" ]
1010 args = [ "-gen-instr-info" ]
1111 td_file = "../WebAssembly.td"
1212 }
1818 }
1919
2020 tablegen("WebAssemblyGenRegisterInfo") {
21 visibility = [ ":tablegen" ]
21 visibility = [ ":MCTargetDesc" ]
2222 args = [ "-gen-register-info" ]
2323 td_file = "../WebAssembly.td"
2424 }
2525
2626 tablegen("WebAssemblyGenSubtargetInfo") {
27 visibility = [ ":tablegen" ]
27 visibility = [ ":MCTargetDesc" ]
2828 args = [ "-gen-subtarget" ]
2929 td_file = "../WebAssembly.td"
3030 }
3131
32 # This should contain tablegen targets generating .inc files included
33 # by other targets. .inc files only used by .cpp files in this directory
34 # should be in deps on the static_library instead.
35 group("tablegen") {
36 visibility = [
37 ":MCTargetDesc",
38 "../InstPrinter",
39 "../TargetInfo",
40 "../Utils",
41 ]
32 static_library("MCTargetDesc") {
33 output_name = "LLVMWebAssemblyDesc"
34
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps instead.
4238 public_deps = [
4339 ":WebAssemblyGenInstrInfo",
4440 ":WebAssemblyGenRegisterInfo",
4541 ":WebAssemblyGenSubtargetInfo",
46 ]
47 }
48 static_library("MCTargetDesc") {
49 output_name = "LLVMWebAssemblyDesc"
50 public_deps = [
51 ":tablegen",
5242 ]
5343 deps = [
5444 ":WebAssemblyGenAsmWriter",
11 output_name = "LLVMWebAssemblyInfo"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/WebAssembly/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [
1515 }
1616
1717 tablegen("X86GenInstrInfo") {
18 visibility = [ ":tablegen" ]
18 visibility = [ ":MCTargetDesc" ]
1919 args = [ "-gen-instr-info" ]
2020 td_file = "../X86.td"
2121 }
2222
2323 tablegen("X86GenRegisterInfo") {
24 visibility = [ ":tablegen" ]
24 visibility = [ ":MCTargetDesc" ]
2525 args = [ "-gen-register-info" ]
2626 td_file = "../X86.td"
2727 }
2828
2929 tablegen("X86GenSubtargetInfo") {
30 visibility = [ ":tablegen" ]
30 visibility = [ ":MCTargetDesc" ]
3131 args = [ "-gen-subtarget" ]
3232 td_file = "../X86.td"
3333 }
3434
35 # This should contain tablegen targets generating .inc files included
36 # by other targets. .inc files only used by .cpp files in this directory
37 # should be in deps on the static_library instead.
38 group("tablegen") {
39 visibility = [
40 ":MCTargetDesc",
41 "../TargetInfo",
42 ]
35 static_library("MCTargetDesc") {
36 output_name = "LLVMX86Desc"
37
38 # This should contain tablegen targets generating .inc files included
39 # by other targets. .inc files only used by .cpp files in this directory
40 # should be in deps instead.
4341 public_deps = [
4442 ":X86GenInstrInfo",
4543 ":X86GenRegisterInfo",
4644 ":X86GenSubtargetInfo",
47 ]
48 }
49
50 static_library("MCTargetDesc") {
51 output_name = "LLVMX86Desc"
52 public_deps = [
53 ":tablegen",
5445 ]
5546 deps = [
5647 ":X86GenAsmWriter",
11 output_name = "LLVMX86Info"
22 deps = [
33 "//llvm/lib/Support",
4
5 # MCTargetDesc depends on TargetInfo, so we can't depend on the full
6 # MCTargetDesc target here: it would form a cycle.
7 "//llvm/lib/Target/X86/MCTargetDesc:tablegen",
84 ]
95 include_dirs = [ ".." ]
106 sources = [