llvm.org GIT mirror llvm / cd6ffd6
[X86] Use extended vector register classes in getRegForInlineAsmConstraint to support x/y/zmm16-31 when the type is mismatched. The FR32/FR64/VR128/VR256 register classes don't contain the upper 16 registers. For most cases we use the default implementation which will find any register class that contains the register in question if the VT is legal for the register class. But if the VT is i32 or i64, we won't find a matching register class and will instead up in the code modified in this patch. If the requested register is x/y/zmm16-31 we weren't returning a register class that contains those registers and will hit an assertion in the caller. To fix this, I've changed to use the extended register class instead. I don't believe we need a subtarget check to see if avx512 is enabled. The default implementation just pick whatever register class it finds first. I checked and we currently pick FR32X for XMM0 with an f32 type using the default implementation regardless of whether avx512 is enabled. So I assume its it is ok to do the same for i32. Differential Revision: https://reviews.llvm.org/D61457 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360102 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 1 year, 5 months ago
1 changed file(s) with 6 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
4420244202
4420344203 // TODO: Handle f128 and i128 in FR128RegClass after it is tested well.
4420444204 if (VT == MVT::f32 || VT == MVT::i32)
44205 Res.second = &X86::FR32RegClass;
44205 Res.second = &X86::FR32XRegClass;
4420644206 else if (VT == MVT::f64 || VT == MVT::i64)
44207 Res.second = &X86::FR64RegClass;
44208 else if (TRI->isTypeLegalForClass(X86::VR128RegClass, VT))
44209 Res.second = &X86::VR128RegClass;
44210 else if (TRI->isTypeLegalForClass(X86::VR256RegClass, VT))
44211 Res.second = &X86::VR256RegClass;
44207 Res.second = &X86::FR64XRegClass;
44208 else if (TRI->isTypeLegalForClass(X86::VR128XRegClass, VT))
44209 Res.second = &X86::VR128XRegClass;
44210 else if (TRI->isTypeLegalForClass(X86::VR256XRegClass, VT))
44211 Res.second = &X86::VR256XRegClass;
4421244212 else if (TRI->isTypeLegalForClass(X86::VR512RegClass, VT))
4421344213 Res.second = &X86::VR512RegClass;
4421444214 else {