llvm.org GIT mirror llvm / cd45ee9
X86: Use a callee save register for the swiftself parameter. It is very likely that the swiftself parameter is alive throughout most functions function so putting it into a callee save register should avoid spills for the callers with only a minimum amount of extra spills in the callees. Currently the generated code is correct but unnecessarily spills and reloads arguments passed in callee save registers, I will address this in upcoming patches. This also adds a missing check that for tail calls the preserved value of the caller must be the same as the callees parameter. Differential Revision: http://reviews.llvm.org/D18902 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266252 91177308-0d34-0410-b5e6-96231b3b80d8 Matthias Braun 3 years ago
4 changed file(s) with 96 addition(s) and 43 deletion(s). Raw diff Collapse all Expand all
296296 CCIfNest>>,
297297 CCIfNest>,
298298
299 // A SwiftSelf is passed in R10.
300 CCIfSwiftSelf>>,
299 // Pass SwiftSelf in a callee saved register.
300 CCIfSwiftSelf>>,
301301
302302 // A SwiftError is passed in R12.
303303 CCIfSwiftError>>,
18701870 return true;
18711871
18721872 // Push GPRs. It increases frame size.
1873 const MachineFunction &MF = *MBB.getParent();
18731874 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
18741875 for (unsigned i = CSI.size(); i != 0; --i) {
18751876 unsigned Reg = CSI[i - 1].getReg();
18761877
18771878 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
18781879 continue;
1879 // Add the callee-saved register as live-in. It's killed at the spill.
1880 MBB.addLiveIn(Reg);
1881
1882 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill)
1880
1881 bool isLiveIn = MF.getRegInfo().isLiveIn(Reg);
1882 if (!isLiveIn)
1883 MBB.addLiveIn(Reg);
1884
1885 // Do not set a kill flag on values that are also marked as live-in. This
1886 // happens with the @llvm-returnaddress intrinsic and with arguments
1887 // passed in callee saved registers.
1888 // Omitting the kill flags is conservatively correct even if the live-in
1889 // is not used after all.
1890 bool isKill = !isLiveIn;
1891 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(isKill))
18831892 .setMIFlag(MachineInstr::FrameSetup);
18841893 }
18851894
37733773 RetCC_X86, RetCC_X86))
37743774 return false;
37753775 // The callee has to preserve all registers the caller needs to preserve.
3776 const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
3777 const uint32_t *CallerPreserved = TRI->getCallPreservedMask(MF, CallerCC);
37763778 if (!CCMatch) {
3777 const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
3778 if (!TRI->regmaskSubsetEqual(TRI->getCallPreservedMask(MF, CallerCC),
3779 TRI->getCallPreservedMask(MF, CalleeCC)))
3779 const uint32_t *CalleePreserved = TRI->getCallPreservedMask(MF, CalleeCC);
3780 if (!TRI->regmaskSubsetEqual(CallerPreserved, CalleePreserved))
37803781 return false;
37813782 }
37823783
38453846 break;
38463847 }
38473848 }
3849 }
3850
3851 // Parameters passed in callee saved registers must have the same value in
3852 // caller and callee.
3853 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
3854 const CCValAssign &ArgLoc = ArgLocs[I];
3855 if (!ArgLoc.isRegLoc())
3856 continue;
3857 unsigned Reg = ArgLoc.getLocReg();
3858 // Only look at callee saved registers.
3859 if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
3860 continue;
3861 // Check that we pass the value used for the caller.
3862 // (We look for a CopyFromReg reading a virtual register that is used
3863 // for the function live-in value of register Reg)
3864 SDValue Value = OutVals[I];
3865 if (Value->getOpcode() != ISD::CopyFromReg)
3866 return false;
3867 unsigned ArgReg = cast(Value->getOperand(1))->getReg();
3868 const MachineRegisterInfo &MRI = MF.getRegInfo();
3869 if (MRI.getLiveInPhysReg(ArgReg) != Reg)
3870 return false;
38483871 }
38493872 }
38503873
None ; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
1 ; RUN: llc -O0 -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-O0 %s
2 ; RUN: llc -verify-machineinstrs < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck --check-prefix=CHECK-i386 %s
3 ; RUN: llc -O0 -verify-machineinstrs < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck --check-prefix=CHECK-i386-O0 %s
0 ; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
1 ; RUN: llc -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
42
5 ; Parameter with swiftself should be allocated to r10.
6 define void @check_swiftself(i32* swiftself %addr0) {
7 ; CHECK-LABEL: check_swiftself:
8 ; CHECK-O0-LABEL: check_swiftself:
9 ; CHECK-i386-LABEL: check_swiftself:
10 ; CHECK-i386-O0-LABEL: check_swiftself:
3 ; Parameter with swiftself should be allocated to r13.
4 ; CHECK-LABEL: swiftself_param:
5 ; CHECK: movq %r13, %rax
6 define i8 *@swiftself_param(i8* swiftself %addr0) {
7 ret i8 *%addr0
8 }
119
12 %val0 = load volatile i32, i32* %addr0
13 ; CHECK: movl (%r10),
14 ; CHECK-O0: movl (%r10),
15 ; CHECK-i386: movl {{[0-9a-f]+}}(%esp)
16 ; CHECK-i386-O0: movl {{[0-9a-f]+}}(%esp)
10 ; Check that r13 is used to pass a swiftself argument.
11 ; CHECK-LABEL: call_swiftself:
12 ; CHECK: movq %rdi, %r13
13 ; CHECK: callq {{_?}}swiftself_param
14 define i8 *@call_swiftself(i8* %arg) {
15 %res = call i8 *@swiftself_param(i8* swiftself %arg)
16 ret i8 *%res
17 }
18
19 ; r13 should be saved by the callee even if used for swiftself
20 ; CHECK-LABEL: swiftself_clobber:
21 ; CHECK: pushq %r13
22 ; ...
23 ; CHECK: popq %r13
24 define i8 *@swiftself_clobber(i8* swiftself %addr0) {
25 call void asm sideeffect "nop", "~{r13}"()
26 ret i8 *%addr0
27 }
28
29 ; Demonstrate that we do not need any movs when calling multiple functions
30 ; with swiftself argument.
31 ; CHECK-LABEL: swiftself_passthrough:
32 ; OPT-NOT: mov{{.*}}r13
33 ; OPT: callq {{_?}}swiftself_param
34 ; OPT-NOT: mov{{.*}}r13
35 ; OPT-NEXT: callq {{_?}}swiftself_param
36 define void @swiftself_passthrough(i8* swiftself %addr0) {
37 call i8 *@swiftself_param(i8* swiftself %addr0)
38 call i8 *@swiftself_param(i8* swiftself %addr0)
1739 ret void
1840 }
1941
20 @var8_3 = global i8 0
21 declare void @take_swiftself(i8* swiftself %addr0)
42 ; We can use a tail call if the callee swiftself is the same as the caller one.
43 ; CHECK-LABEL: swiftself_tail:
44 ; OPT: jmp {{_?}}swiftself_param
45 ; OPT-NOT: ret
46 define i8* @swiftself_tail(i8* swiftself %addr0) {
47 call void asm sideeffect "", "~{r13}"()
48 %res = tail call i8* @swiftself_param(i8* swiftself %addr0)
49 ret i8* %res
50 }
2251
23 define void @simple_args() {
24 ; CHECK-LABEL: simple_args:
25 ; CHECK-O0-LABEL: simple_args:
26 ; CHECK-i386-LABEL: simple_args:
27 ; CHECK-i386-O0-LABEL: simple_args:
28
29 call void @take_swiftself(i8* @var8_3)
30 ; CHECK: movl {{.*}}, %r10d
31 ; CHECK: callq {{_?}}take_swiftself
32 ; CHECK-O0: movabsq {{.*}}, %r10
33 ; CHECK-O0: callq {{_?}}take_swiftself
34 ; CHECK-i386: movl {{.*}}, (%esp)
35 ; CHECK-i386: calll {{.*}}take_swiftself
36 ; CHECK-i386-O0: movl {{.*}}, (%esp)
37 ; CHECK-i386-O0: calll {{.*}}take_swiftself
38
39 ret void
52 ; We can not use a tail call if the callee swiftself is not the same as the
53 ; caller one.
54 ; CHECK-LABEL: swiftself_notail:
55 ; CHECK: movq %rdi, %r13
56 ; CHECK: callq {{_?}}swiftself_param
57 ; CHECK: retq
58 define i8* @swiftself_notail(i8* swiftself %addr0, i8* %addr1) nounwind {
59 %res = tail call i8* @swiftself_param(i8* swiftself %addr1)
60 ret i8* %res
4061 }