llvm.org GIT mirror llvm / cccd276
Merging r203054: ------------------------------------------------------------------------ r203054 | hfinkel | 2014-03-05 20:28:23 -0500 (Wed, 05 Mar 2014) | 7 lines The PPC global base register cannot be r0 The global base register cannot be r0 because it might end up as the first argument to addi or addis. Fixes PR18316. I don't have a small stable test case. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205823 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 6 years ago
1 changed file(s) with 2 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
260260 DebugLoc dl;
261261
262262 if (PPCLowering.getPointerTy() == MVT::i32) {
263 GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::GPRCRegClass);
263 GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::GPRC_NOR0RegClass);
264264 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
265265 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
266266 } else {
267 GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::G8RCRegClass);
267 GlobalBaseReg = RegInfo->createVirtualRegister(&PPC::G8RC_NOX0RegClass);
268268 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8));
269269 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR8), GlobalBaseReg);
270270 }