llvm.org GIT mirror llvm / ca57933
Add support for parsing the not operator in Microsoft inline assembly This fixes http://llvm.org/PR20202 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212352 91177308-0d34-0410-b5e6-96231b3b80d8 Ehsan Akhgari 6 years ago
1 changed file(s) with 36 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
234234 IES_RSHIFT,
235235 IES_PLUS,
236236 IES_MINUS,
237 IES_NOT,
237238 IES_MULTIPLY,
238239 IES_DIVIDE,
239240 IES_LBRAC,
371372 State = IES_ERROR;
372373 break;
373374 case IES_PLUS:
375 case IES_NOT:
374376 case IES_MULTIPLY:
375377 case IES_DIVIDE:
376378 case IES_LPAREN:
400402 }
401403 PrevState = CurrState;
402404 }
405 void onNot() {
406 IntelExprState CurrState = State;
407 switch (State) {
408 default:
409 State = IES_ERROR;
410 break;
411 case IES_PLUS:
412 case IES_NOT:
413 State = IES_NOT;
414 break;
415 }
416 PrevState = CurrState;
417 }
403418 void onRegister(unsigned Reg) {
404419 IntelExprState CurrState = State;
405420 switch (State) {
437452 break;
438453 case IES_PLUS:
439454 case IES_MINUS:
455 case IES_NOT:
440456 State = IES_INTEGER;
441457 Sym = SymRef;
442458 SymName = SymRefName;
452468 break;
453469 case IES_PLUS:
454470 case IES_MINUS:
471 case IES_NOT:
455472 case IES_OR:
456473 case IES_AND:
457474 case IES_LSHIFT:
475492 PrevState == IES_OR || PrevState == IES_AND ||
476493 PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
477494 PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
478 PrevState == IES_LPAREN || PrevState == IES_LBRAC) &&
495 PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
496 PrevState == IES_NOT) &&
479497 CurrState == IES_MINUS) {
480498 // Unary minus. No need to pop the minus operand because it was never
481499 // pushed.
482500 IC.pushOperand(IC_IMM, -TmpInt); // Push -Imm.
501 } else if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
502 PrevState == IES_OR || PrevState == IES_AND ||
503 PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
504 PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
505 PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
506 PrevState == IES_NOT) &&
507 CurrState == IES_NOT) {
508 // Unary not. No need to pop the not operand because it was never
509 // pushed.
510 IC.pushOperand(IC_IMM, ~TmpInt); // Push ~Imm.
483511 } else {
484512 IC.pushOperand(IC_IMM, TmpInt);
485513 }
560588 break;
561589 case IES_PLUS:
562590 case IES_MINUS:
591 case IES_NOT:
563592 case IES_OR:
564593 case IES_AND:
565594 case IES_LSHIFT:
567596 case IES_MULTIPLY:
568597 case IES_DIVIDE:
569598 case IES_LPAREN:
570 // FIXME: We don't handle this type of unary minus, yet.
599 // FIXME: We don't handle this type of unary minus or not, yet.
571600 if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
572601 PrevState == IES_OR || PrevState == IES_AND ||
573602 PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
574603 PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
575 PrevState == IES_LPAREN || PrevState == IES_LBRAC) &&
576 CurrState == IES_MINUS) {
604 PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
605 PrevState == IES_NOT) &&
606 (CurrState == IES_MINUS || CurrState == IES_NOT)) {
577607 State = IES_ERROR;
578608 break;
579609 }
11401170 }
11411171 case AsmToken::Plus: SM.onPlus(); break;
11421172 case AsmToken::Minus: SM.onMinus(); break;
1173 case AsmToken::Tilde: SM.onNot(); break;
11431174 case AsmToken::Star: SM.onStar(); break;
11441175 case AsmToken::Slash: SM.onDivide(); break;
11451176 case AsmToken::Pipe: SM.onOr(); break;
15221553
15231554 // Immediate.
15241555 if (getLexer().is(AsmToken::Integer) || getLexer().is(AsmToken::Minus) ||
1525 getLexer().is(AsmToken::LParen)) {
1556 getLexer().is(AsmToken::Tilde) || getLexer().is(AsmToken::LParen)) {
15261557 AsmToken StartTok = Tok;
15271558 IntelExprStateMachine SM(/*Imm=*/0, /*StopOnLBrac=*/true,
15281559 /*AddImmPrefix=*/false);